JP3890647B2 - 不揮発性半導体記憶装置 - Google Patents
不揮発性半導体記憶装置 Download PDFInfo
- Publication number
- JP3890647B2 JP3890647B2 JP01856697A JP1856697A JP3890647B2 JP 3890647 B2 JP3890647 B2 JP 3890647B2 JP 01856697 A JP01856697 A JP 01856697A JP 1856697 A JP1856697 A JP 1856697A JP 3890647 B2 JP3890647 B2 JP 3890647B2
- Authority
- JP
- Japan
- Prior art keywords
- bit line
- sub
- line
- nand
- transistor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Images
Classifications
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/10—Programming or data input circuits
- G11C16/12—Programming voltage switching circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
- G11C16/0483—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells having several storage transistors connected in series
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C16/00—Erasable programmable read-only memories
- G11C16/02—Erasable programmable read-only memories electrically programmable
- G11C16/06—Auxiliary circuits, e.g. for writing into memory
- G11C16/24—Bit-line control circuits
-
- G—PHYSICS
- G11—INFORMATION STORAGE
- G11C—STATIC STORES
- G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
- G11C7/18—Bit line organisation; Bit line lay-out
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Semiconductor Memories (AREA)
- Non-Volatile Memory (AREA)
- Read Only Memory (AREA)
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP01856697A JP3890647B2 (ja) | 1997-01-31 | 1997-01-31 | 不揮発性半導体記憶装置 |
| KR1019980002469A KR19980070897A (ko) | 1997-01-31 | 1998-01-26 | 불휘발성 반도체기억장치 및 그 데이터프로그램방법 |
| US09/015,787 US5969990A (en) | 1997-01-31 | 1998-01-29 | Nonvolatile memory array with NAND string memory cell groups selectively connected to sub bit lines |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP01856697A JP3890647B2 (ja) | 1997-01-31 | 1997-01-31 | 不揮発性半導体記憶装置 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JPH10214494A JPH10214494A (ja) | 1998-08-11 |
| JPH10214494A5 JPH10214494A5 (enExample) | 2004-09-24 |
| JP3890647B2 true JP3890647B2 (ja) | 2007-03-07 |
Family
ID=11975183
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP01856697A Expired - Fee Related JP3890647B2 (ja) | 1997-01-31 | 1997-01-31 | 不揮発性半導体記憶装置 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US5969990A (enExample) |
| JP (1) | JP3890647B2 (enExample) |
| KR (1) | KR19980070897A (enExample) |
Families Citing this family (57)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2001167591A (ja) * | 1999-12-08 | 2001-06-22 | Matsushita Electric Ind Co Ltd | 半導体記憶装置 |
| US5687114A (en) | 1995-10-06 | 1997-11-11 | Agate Semiconductor, Inc. | Integrated circuit for storage and retrieval of multiple digital bits per nonvolatile memory cell |
| US6487116B2 (en) | 1997-03-06 | 2002-11-26 | Silicon Storage Technology, Inc. | Precision programming of nonvolatile memory cells |
| US5870335A (en) | 1997-03-06 | 1999-02-09 | Agate Semiconductor, Inc. | Precision programming of nonvolatile memory cells |
| US6282145B1 (en) | 1999-01-14 | 2001-08-28 | Silicon Storage Technology, Inc. | Array architecture and operating methods for digital multilevel nonvolatile memory integrated circuit system |
| US6396742B1 (en) | 2000-07-28 | 2002-05-28 | Silicon Storage Technology, Inc. | Testing of multilevel semiconductor memory |
| KR100385229B1 (ko) * | 2000-12-14 | 2003-05-27 | 삼성전자주식회사 | 스트링 선택 라인에 유도되는 노이즈 전압으로 인한프로그램 디스터브를 방지할 수 있는 불휘발성 반도체메모리 장치 및 그것의 프로그램 방법 |
| US6835987B2 (en) | 2001-01-31 | 2004-12-28 | Kabushiki Kaisha Toshiba | Non-volatile semiconductor memory device in which selection gate transistors and memory cells have different structures |
| JP2002289705A (ja) * | 2001-03-23 | 2002-10-04 | Fujitsu Ltd | 半導体メモリ |
| KR100387529B1 (ko) | 2001-06-11 | 2003-06-18 | 삼성전자주식회사 | 랜덤 억세스 가능한 메모리 셀 어레이를 갖는 불휘발성반도체 메모리 장치 |
| JP2003077282A (ja) * | 2001-08-31 | 2003-03-14 | Fujitsu Ltd | 不揮発性半導体記憶装置 |
| KR100463602B1 (ko) * | 2001-12-29 | 2004-12-29 | 주식회사 하이닉스반도체 | 불휘발성 강유전체 메모리의 배선 |
| KR100449953B1 (ko) * | 2002-05-16 | 2004-09-30 | 주식회사 하이닉스반도체 | 강유전체 메모리 장치의 셀어레이 |
| JP3863485B2 (ja) * | 2002-11-29 | 2006-12-27 | 株式会社東芝 | 不揮発性半導体記憶装置 |
| KR100492774B1 (ko) * | 2002-12-24 | 2005-06-07 | 주식회사 하이닉스반도체 | 라이트 보호 영역을 구비한 비휘발성 메모리 장치 |
| US7233522B2 (en) * | 2002-12-31 | 2007-06-19 | Sandisk 3D Llc | NAND memory array incorporating capacitance boosting of channel regions in unselected memory cells and method for operation of same |
| US7505321B2 (en) * | 2002-12-31 | 2009-03-17 | Sandisk 3D Llc | Programmable memory array structure incorporating series-connected transistor strings and methods for fabrication and operation of same |
| US6879505B2 (en) * | 2003-03-31 | 2005-04-12 | Matrix Semiconductor, Inc. | Word line arrangement having multi-layer word line segments for three-dimensional memory array |
| US7233024B2 (en) | 2003-03-31 | 2007-06-19 | Sandisk 3D Llc | Three-dimensional memory device incorporating segmented bit line memory array |
| US7177199B2 (en) * | 2003-10-20 | 2007-02-13 | Sandisk Corporation | Behavior based programming of non-volatile memory |
| US7221588B2 (en) * | 2003-12-05 | 2007-05-22 | Sandisk 3D Llc | Memory array incorporating memory cells arranged in NAND strings |
| WO2005066969A1 (en) * | 2003-12-26 | 2005-07-21 | Matsushita Electric Industrial Co., Ltd. | Memory device, memory circuit and semiconductor integrated circuit having variable resistance |
| KR100559716B1 (ko) * | 2004-04-01 | 2006-03-10 | 주식회사 하이닉스반도체 | 낸드 플래시 메모리 소자 및 이의 독출 방법 |
| US7177191B2 (en) * | 2004-12-30 | 2007-02-13 | Sandisk 3D Llc | Integrated circuit including memory array incorporating multiple types of NAND string structures |
| US7251160B2 (en) * | 2005-03-16 | 2007-07-31 | Sandisk Corporation | Non-volatile memory and method with power-saving read and program-verify operations |
| US7366022B2 (en) * | 2005-10-27 | 2008-04-29 | Sandisk Corporation | Apparatus for programming of multi-state non-volatile memory using smart verify |
| US7301817B2 (en) * | 2005-10-27 | 2007-11-27 | Sandisk Corporation | Method for programming of multi-state non-volatile memory using smart verify |
| WO2007079295A2 (en) * | 2005-11-25 | 2007-07-12 | Novelics Llc | Dense read-only memory |
| JP4945183B2 (ja) * | 2006-07-14 | 2012-06-06 | 株式会社東芝 | メモリコントローラ |
| US7881121B2 (en) * | 2006-09-25 | 2011-02-01 | Macronix International Co., Ltd. | Decoding method in an NROM flash memory array |
| KR100770754B1 (ko) * | 2006-10-12 | 2007-10-29 | 삼성전자주식회사 | 비휘발성 반도체 메모리 장치 및 그것의 프로그램 방법 |
| US7511996B2 (en) | 2006-11-30 | 2009-03-31 | Mosaid Technologies Incorporated | Flash memory program inhibit scheme |
| US7570520B2 (en) * | 2006-12-27 | 2009-08-04 | Sandisk Corporation | Non-volatile storage system with initial programming voltage based on trial |
| US7551482B2 (en) * | 2006-12-27 | 2009-06-23 | Sandisk Corporation | Method for programming with initial programming voltage based on trial |
| KR100850510B1 (ko) * | 2007-01-17 | 2008-08-05 | 삼성전자주식회사 | 분리된 스트링 선택 라인 구조를 갖는 플래시 메모리 장치 |
| KR100897603B1 (ko) * | 2007-06-20 | 2009-05-14 | 삼성전자주식회사 | 반도체 메모리 장치 |
| US7599224B2 (en) * | 2007-07-03 | 2009-10-06 | Sandisk Corporation | Systems for coarse/fine program verification in non-volatile memory using different reference levels for improved sensing |
| US7508715B2 (en) * | 2007-07-03 | 2009-03-24 | Sandisk Corporation | Coarse/fine program verification in non-volatile memory using different reference levels for improved sensing |
| US7643367B2 (en) * | 2007-08-15 | 2010-01-05 | Oki Semiconductor Co., Ltd. | Semiconductor memory device |
| JP2009059931A (ja) * | 2007-08-31 | 2009-03-19 | Toshiba Corp | 不揮発性半導体記憶装置 |
| KR100853481B1 (ko) * | 2007-11-01 | 2008-08-21 | 주식회사 하이닉스반도체 | 비휘발성 메모리 소자 및 그 독출방법 |
| US7755939B2 (en) * | 2008-01-15 | 2010-07-13 | Micron Technology, Inc. | System and devices including memory resistant to program disturb and methods of using, making, and operating the same |
| US7742324B2 (en) * | 2008-02-19 | 2010-06-22 | Micron Technology, Inc. | Systems and devices including local data lines and methods of using, making, and operating the same |
| US8482981B2 (en) * | 2008-05-30 | 2013-07-09 | Qimonda Ag | Method of forming an integrated circuit with NAND flash array segments and intra array multiplexers and corresponding integrated circuit with NAND flash array segments and intra array multiplexers |
| US20090302472A1 (en) * | 2008-06-05 | 2009-12-10 | Samsung Electronics Co., Ltd. | Non-volatile memory devices including shared bit lines and methods of fabricating the same |
| JP5231972B2 (ja) * | 2008-12-18 | 2013-07-10 | 力晶科技股▲ふん▼有限公司 | 不揮発性半導体記憶装置 |
| US9132421B2 (en) * | 2009-11-09 | 2015-09-15 | Shell Oil Company | Composition useful in the hydroprocessing of a hydrocarbon feedstock |
| JP5528869B2 (ja) * | 2010-03-23 | 2014-06-25 | スパンション エルエルシー | 不揮発性半導体記憶装置及びその読み出し方法 |
| JP5661353B2 (ja) * | 2010-07-06 | 2015-01-28 | スパンション エルエルシー | 不揮発性半導体記憶装置 |
| US8797806B2 (en) | 2011-08-15 | 2014-08-05 | Micron Technology, Inc. | Apparatus and methods including source gates |
| KR101915719B1 (ko) | 2012-04-26 | 2019-01-08 | 삼성전자주식회사 | 불휘발성 메모리 장치 및 그것의 프로그램 동작 방법 |
| US10541029B2 (en) | 2012-08-01 | 2020-01-21 | Micron Technology, Inc. | Partial block memory operations |
| US9318199B2 (en) | 2012-10-26 | 2016-04-19 | Micron Technology, Inc. | Partial page memory operations |
| JP2014127220A (ja) * | 2012-12-27 | 2014-07-07 | Toshiba Corp | 半導体記憶装置 |
| US8995195B2 (en) | 2013-02-12 | 2015-03-31 | Sandisk Technologies Inc. | Fast-reading NAND flash memory |
| KR20160062498A (ko) | 2014-11-25 | 2016-06-02 | 에스케이하이닉스 주식회사 | 반도체 메모리 장치 및 그것의 동작 방법 |
| JP6122478B1 (ja) * | 2015-10-22 | 2017-04-26 | ウィンボンド エレクトロニクス コーポレーション | 不揮発性半導体記憶装置 |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5448517A (en) * | 1987-06-29 | 1995-09-05 | Kabushiki Kaisha Toshiba | Electrically programmable nonvolatile semiconductor memory device with NAND cell structure |
| JPH07122080A (ja) * | 1993-08-31 | 1995-05-12 | Sony Corp | 半導体不揮発性記憶装置 |
| US5690347A (en) * | 1996-04-15 | 1997-11-25 | Tractor Trailer Safety Systems, Inc. | Tractor trailer integrated jackknife control device |
| US5715194A (en) * | 1996-07-24 | 1998-02-03 | Advanced Micro Devices, Inc. | Bias scheme of program inhibit for random programming in a nand flash memory |
-
1997
- 1997-01-31 JP JP01856697A patent/JP3890647B2/ja not_active Expired - Fee Related
-
1998
- 1998-01-26 KR KR1019980002469A patent/KR19980070897A/ko not_active Withdrawn
- 1998-01-29 US US09/015,787 patent/US5969990A/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| US5969990A (en) | 1999-10-19 |
| KR19980070897A (ko) | 1998-10-26 |
| JPH10214494A (ja) | 1998-08-11 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP3890647B2 (ja) | 不揮発性半導体記憶装置 | |
| KR100190089B1 (ko) | 플래쉬 메모리장치 및 그 구동방법 | |
| US7554848B2 (en) | Operating techniques for reducing program and read disturbs of a non-volatile memory | |
| US7263000B2 (en) | NAND type memory with dummy cells adjacent to select transistors being biased at different voltage during data erase | |
| JP3653186B2 (ja) | 不揮発性メモリ装置のプログラミング方法 | |
| US6295227B1 (en) | Non-volatile semiconductor memory device | |
| US5313432A (en) | Segmented, multiple-decoder memory array and method for programming a memory array | |
| KR100470572B1 (ko) | 반도체 기억 장치 및 그 동작 방법 | |
| JP2862584B2 (ja) | 不揮発性半導体メモリ装置 | |
| US6798683B2 (en) | Pattern layout of transfer transistors employed in row decoder | |
| US6072721A (en) | Semiconductor nonvolatile memory, method of data programming of same, and method of producing same | |
| US7924620B2 (en) | Nonvolatile semiconductor memory including charge accumulation layer and control gate | |
| JPH0836890A (ja) | 半導体不揮発性記憶装置 | |
| TWI713050B (zh) | 半導體記憶裝置 | |
| KR20070115604A (ko) | 비휘발성 반도체 메모리 | |
| JPH10149688A (ja) | 半導体不揮発性記憶装置およびそのデータプログラム方法 | |
| KR20220036634A (ko) | 네거티브 레벨 쉬프터 및 이를 포함하는 비휘발성 메모리 장치 | |
| KR100629987B1 (ko) | 3층 금속 배선을 이용한 플래시 메모리 아키텍처 | |
| KR100204804B1 (ko) | 플래시 메모리 장치의 구동방법 | |
| JPH10144807A (ja) | 不揮発性半導体記憶装置 | |
| JPH1186570A (ja) | 不揮発性半導体記憶装置及びその書き込み方法 | |
| JP2023172565A (ja) | フラッシュメモリ | |
| CN119790723A (zh) | 半导体存储装置 | |
| JP2024035989A (ja) | 半導体記憶装置 | |
| JPH11242892A (ja) | 不揮発性半導体記憶装置およびそのデータ書き込み方法 |
Legal Events
| Date | Code | Title | Description |
|---|---|---|---|
| A977 | Report on retrieval |
Free format text: JAPANESE INTERMEDIATE CODE: A971007 Effective date: 20060727 |
|
| A131 | Notification of reasons for refusal |
Free format text: JAPANESE INTERMEDIATE CODE: A131 Effective date: 20060808 |
|
| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20061010 |
|
| TRDD | Decision of grant or rejection written | ||
| A01 | Written decision to grant a patent or to grant a registration (utility model) |
Free format text: JAPANESE INTERMEDIATE CODE: A01 Effective date: 20061114 |
|
| A61 | First payment of annual fees (during grant procedure) |
Free format text: JAPANESE INTERMEDIATE CODE: A61 Effective date: 20061127 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20091215 Year of fee payment: 3 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20101215 Year of fee payment: 4 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20111215 Year of fee payment: 5 |
|
| FPAY | Renewal fee payment (event date is renewal date of database) |
Free format text: PAYMENT UNTIL: 20121215 Year of fee payment: 6 |
|
| LAPS | Cancellation because of no payment of annual fees |