JP2018507562A5 - - Google Patents
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- JP2018507562A5 JP2018507562A5 JP2017546134A JP2017546134A JP2018507562A5 JP 2018507562 A5 JP2018507562 A5 JP 2018507562A5 JP 2017546134 A JP2017546134 A JP 2017546134A JP 2017546134 A JP2017546134 A JP 2017546134A JP 2018507562 A5 JP2018507562 A5 JP 2018507562A5
- Authority
- JP
- Japan
- Prior art keywords
- single crystal
- crystal semiconductor
- layer
- polycrystalline silicon
- support substrate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
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- 239000004065 semiconductor Substances 0.000 claims 116
- 239000013078 crystal Substances 0.000 claims 79
- 239000000758 substrate Substances 0.000 claims 77
- 238000000034 method Methods 0.000 claims 70
- 229910021420 polycrystalline silicon Inorganic materials 0.000 claims 45
- 238000000151 deposition Methods 0.000 claims 11
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 8
- ZAMOUSCENKQFHK-UHFFFAOYSA-N Chlorine atom Chemical compound [Cl] ZAMOUSCENKQFHK-UHFFFAOYSA-N 0.000 claims 6
- VEXZGXHMUGYJMC-UHFFFAOYSA-N Hydrochloric acid Chemical compound Cl VEXZGXHMUGYJMC-UHFFFAOYSA-N 0.000 claims 6
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 claims 6
- 238000000137 annealing Methods 0.000 claims 6
- 239000000460 chlorine Substances 0.000 claims 6
- 229910052801 chlorine Inorganic materials 0.000 claims 6
- 239000007789 gas Substances 0.000 claims 6
- 239000001257 hydrogen Substances 0.000 claims 6
- 229910052739 hydrogen Inorganic materials 0.000 claims 6
- 125000004435 hydrogen atom Chemical class [H]* 0.000 claims 6
- IXCSERBJSXMMFS-UHFFFAOYSA-N hydrogen chloride Substances Cl.Cl IXCSERBJSXMMFS-UHFFFAOYSA-N 0.000 claims 6
- 229910000041 hydrogen chloride Inorganic materials 0.000 claims 6
- 229910052710 silicon Inorganic materials 0.000 claims 6
- 239000010703 silicon Substances 0.000 claims 6
- 238000005229 chemical vapour deposition Methods 0.000 claims 5
- 230000008021 deposition Effects 0.000 claims 5
- 239000012686 silicon precursor Substances 0.000 claims 5
- BLRPTPMANUNPDV-UHFFFAOYSA-N Silane Chemical compound [SiH4] BLRPTPMANUNPDV-UHFFFAOYSA-N 0.000 claims 4
- MROCJMGDEKINLD-UHFFFAOYSA-N dichlorosilane Chemical compound Cl[SiH2]Cl MROCJMGDEKINLD-UHFFFAOYSA-N 0.000 claims 4
- 238000010438 heat treatment Methods 0.000 claims 4
- 230000001590 oxidative effect Effects 0.000 claims 4
- 230000002093 peripheral effect Effects 0.000 claims 4
- 229910000077 silane Inorganic materials 0.000 claims 4
- 235000012239 silicon dioxide Nutrition 0.000 claims 4
- 239000000377 silicon dioxide Substances 0.000 claims 4
- ZDHXKXAHOVTTAH-UHFFFAOYSA-N trichlorosilane Chemical compound Cl[SiH](Cl)Cl ZDHXKXAHOVTTAH-UHFFFAOYSA-N 0.000 claims 4
- 239000005052 trichlorosilane Substances 0.000 claims 4
- CBENFWSGALASAD-UHFFFAOYSA-N Ozone Chemical compound [O-][O+]=O CBENFWSGALASAD-UHFFFAOYSA-N 0.000 claims 2
- 238000001816 cooling Methods 0.000 claims 2
- 238000005468 ion implantation Methods 0.000 claims 2
- 229910021421 monocrystalline silicon Inorganic materials 0.000 claims 2
- 239000007800 oxidant agent Substances 0.000 claims 2
- 238000005498 polishing Methods 0.000 claims 2
- 230000003746 surface roughness Effects 0.000 claims 2
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201562127418P | 2015-03-03 | 2015-03-03 | |
| US62/127,418 | 2015-03-03 | ||
| PCT/US2016/019464 WO2016140850A1 (en) | 2015-03-03 | 2016-02-25 | Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress |
Related Child Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019078624A Division JP6796162B2 (ja) | 2015-03-03 | 2019-04-17 | 膜応力を制御可能なシリコン基板の上に電荷トラップ用多結晶シリコン膜を成長させる方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2018507562A JP2018507562A (ja) | 2018-03-15 |
| JP2018507562A5 true JP2018507562A5 (enExample) | 2019-04-11 |
| JP6517360B2 JP6517360B2 (ja) | 2019-05-22 |
Family
ID=55755658
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2017546134A Active JP6517360B2 (ja) | 2015-03-03 | 2016-02-25 | 膜応力を制御可能なシリコン基板の上に電荷トラップ用多結晶シリコン膜を成長させる方法 |
| JP2019078624A Active JP6796162B2 (ja) | 2015-03-03 | 2019-04-17 | 膜応力を制御可能なシリコン基板の上に電荷トラップ用多結晶シリコン膜を成長させる方法 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2019078624A Active JP6796162B2 (ja) | 2015-03-03 | 2019-04-17 | 膜応力を制御可能なシリコン基板の上に電荷トラップ用多結晶シリコン膜を成長させる方法 |
Country Status (6)
| Country | Link |
|---|---|
| US (3) | US10283402B2 (enExample) |
| EP (4) | EP4120320A1 (enExample) |
| JP (2) | JP6517360B2 (enExample) |
| CN (1) | CN107533953B (enExample) |
| TW (1) | TWI711067B (enExample) |
| WO (1) | WO2016140850A1 (enExample) |
Families Citing this family (40)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP4120320A1 (en) * | 2015-03-03 | 2023-01-18 | GlobalWafers Co., Ltd. | Charge trapping polycrystalline silicon films on silicon substrates with controllable film stress |
| US10304722B2 (en) * | 2015-06-01 | 2019-05-28 | Globalwafers Co., Ltd. | Method of manufacturing semiconductor-on-insulator |
| FR3037443B1 (fr) | 2015-06-12 | 2018-07-13 | Soitec | Heterostructure et methode de fabrication |
| JP6447439B2 (ja) * | 2015-09-28 | 2019-01-09 | 信越半導体株式会社 | 貼り合わせｓｏｉウェーハの製造方法 |
| WO2017142849A1 (en) * | 2016-02-19 | 2017-08-24 | Sunedison Semiconductor Limited | Semiconductor on insulator structure comprising a buried high resistivity layer |
| US20180019169A1 (en) * | 2016-07-12 | 2018-01-18 | QMAT, Inc. | Backing substrate stabilizing donor substrate for implant or reclamation |
| JP6801105B2 (ja) * | 2016-12-05 | 2020-12-16 | グローバルウェーハズ カンパニー リミテッドＧｌｏｂａｌＷａｆｅｒｓ Ｃｏ．，Ｌｔｄ． | 高抵抗シリコンオンインシュレータ構造及びその製造方法 |
| FR3062238A1 (fr) * | 2017-01-26 | 2018-07-27 | Soitec | Support pour une structure semi-conductrice |
| US10468486B2 (en) | 2017-10-30 | 2019-11-05 | Taiwan Semiconductor Manufacturing Company Ltd. | SOI substrate, semiconductor device and method for manufacturing the same |
| EP3785293B1 (en) * | 2018-04-27 | 2023-06-07 | GlobalWafers Co., Ltd. | Light assisted platelet formation facilitating layer transfer from a semiconductor donor substrate |
| KR102463727B1 (ko) | 2018-06-08 | 2022-11-07 | 글로벌웨이퍼스 씨오., 엘티디. | 얇은 실리콘 층의 전사 방법 |
| JP6827442B2 (ja) * | 2018-06-14 | 2021-02-10 | 信越半導体株式会社 | 貼り合わせｓｏｉウェーハの製造方法及び貼り合わせｓｏｉウェーハ |
| JP7230297B2 (ja) * | 2018-07-05 | 2023-03-01 | ソイテック | 集積された高周波デバイスのための基板及びそれを製造するための方法 |
| US10943813B2 (en) * | 2018-07-13 | 2021-03-09 | Globalwafers Co., Ltd. | Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability |
| CN110875171A (zh) * | 2018-08-31 | 2020-03-10 | 北京北方华创微电子装备有限公司 | 多晶硅功能层的制备方法 |
| WO2020131392A1 (en) * | 2018-12-20 | 2020-06-25 | Applied Materials, Inc. | Method of growing doped group iv materials |
| FR3091010B1 (fr) * | 2018-12-24 | 2020-12-04 | Soitec Silicon On Insulator | Structure de type semi-conducteur pour applications digitales et radiofréquences, et procédé de fabrication d’une telle structure |
| FR3098642B1 (fr) | 2019-07-12 | 2021-06-11 | Soitec Silicon On Insulator | procédé de fabrication d'une structure comprenant une couche mince reportée sur un support muni d’une couche de piégeage de charges |
| FR3098985B1 (fr) * | 2019-07-15 | 2022-04-08 | Soitec Silicon On Insulator | Procédé de collage hydrophile de substrats |
| CN110400743A (zh) * | 2019-08-15 | 2019-11-01 | 上海新傲科技股份有限公司 | 多晶硅薄膜半导体衬底的制备方法 |
| KR20220104719A (ko) | 2019-10-29 | 2022-07-26 | 사이퀀텀, 코퍼레이션 | 안정화된 정방정계 바륨 티타네이트의 형성 방법 및 시스템 |
| EP4044212B1 (en) * | 2019-11-14 | 2024-02-14 | Huawei Digital Power Technologies Co., Ltd. | Semiconductor substrate, manufacturing method therefor, and semiconductor device |
| FR3104322B1 (fr) * | 2019-12-05 | 2023-02-24 | Soitec Silicon On Insulator | Procédé de formation d'un substrat de manipulation pour une structure composite ciblant des applications rf |
| EP3840033A1 (fr) * | 2019-12-17 | 2021-06-23 | Commissariat à l'énergie atomique et aux énergies alternatives | Procédé de fabrication d'un substrat rf-soi à couche de piégeage issue d'une transformation cristalline d'une couche enterrée |
| JP7380179B2 (ja) * | 2019-12-19 | 2023-11-15 | 株式会社Sumco | 多層ｓｏｉウェーハ及びその製造方法並びにｘ線検出センサ |
| JP7192757B2 (ja) * | 2019-12-19 | 2022-12-20 | 株式会社Sumco | エピタキシャルシリコンウェーハ及びその製造方法並びにｘ線検出センサ |
| KR20230119244A (ko) * | 2020-03-05 | 2023-08-16 | 램 리써치 코포레이션 | 집적 회로 프로세싱 동안 웨이퍼 보우 (bow) 의 제어 |
| JP2021190660A (ja) * | 2020-06-04 | 2021-12-13 | 株式会社Sumco | 貼り合わせウェーハ用の支持基板 |
| US12176202B2 (en) * | 2020-10-08 | 2024-12-24 | Okmetic Oy | Manufacture method of a high-resistivity silicon handle wafer for a hybrid substrate structure |
| FI129826B (en) * | 2020-10-08 | 2022-09-15 | Okmetic Oy | Manufacturing method of high-resistive silicon wafer intended for hybrid substrate structure |
| FR3117668B1 (fr) * | 2020-12-16 | 2022-12-23 | Commissariat Energie Atomique | Structure amelioree de substrat rf et procede de realisation |
| JP2022150172A (ja) * | 2021-03-26 | 2022-10-07 | 株式会社ディスコ | ウエーハの貼り合わせ方法 |
| TWI792295B (zh) * | 2021-05-04 | 2023-02-11 | 合晶科技股份有限公司 | 半導體基板及其製造方法 |
| EP4287239A1 (en) * | 2022-06-02 | 2023-12-06 | Imec VZW | A low loss semiconductor substrate |
| JP7529000B2 (ja) * | 2022-11-15 | 2024-08-06 | 株式会社Sumco | 積層ウェーハの製造方法 |
| EP4627622A1 (fr) | 2022-11-29 | 2025-10-08 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes |
| EP4627620A1 (fr) | 2022-11-29 | 2025-10-08 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes |
| EP4627621A1 (fr) | 2022-11-29 | 2025-10-08 | Soitec | Support comprenant une couche de piegeage de charges, substrat composite comprenant un tel support et procedes de fabrication associes |
| CN115910930A (zh) * | 2022-12-19 | 2023-04-04 | 广东省大湾区集成电路与系统应用研究院 | 一种半导体器件的制作方法及集成电路的制作方法 |
| FR3146020B1 (fr) | 2023-02-20 | 2025-07-18 | Soitec Silicon On Insulator | Support comprenant une couche de piégeage de charges, substrat composite comprenant un tel support et procédé de fabrication associés |
Family Cites Families (89)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4501060A (en) | 1983-01-24 | 1985-02-26 | At&T Bell Laboratories | Dielectrically isolated semiconductor devices |
| FR2580673B1 (fr) * | 1985-04-19 | 1987-09-25 | Haond Michel | Procede de fabrication sur un support isolant d'un film de silicium monocristallin oriente et a defauts localises |
| JPS6265317A (ja) * | 1985-09-17 | 1987-03-24 | Mitsubishi Electric Corp | 半導体単結晶膜形成のためのウエハ構造 |
| US4755865A (en) | 1986-01-21 | 1988-07-05 | Motorola Inc. | Means for stabilizing polycrystalline semiconductor layers |
| US4760036A (en) * | 1987-06-15 | 1988-07-26 | Delco Electronics Corporation | Process for growing silicon-on-insulator wafers using lateral epitaxial growth with seed window oxidation |
| JPH0648686B2 (ja) * | 1988-03-30 | 1994-06-22 | 新日本製鐵株式会社 | ゲッタリング能力の優れたシリコンウェーハおよびその製造方法 |
| US5189508A (en) * | 1988-03-30 | 1993-02-23 | Nippon Steel Corporation | Silicon wafer excelling in gettering ability and method for production thereof |
| JPH06105691B2 (ja) | 1988-09-29 | 1994-12-21 | 株式会社富士電機総合研究所 | 炭素添加非晶質シリコン薄膜の製造方法 |
| JP2617798B2 (ja) | 1989-09-22 | 1997-06-04 | 三菱電機株式会社 | 積層型半導体装置およびその製造方法 |
| US6043138A (en) | 1996-09-16 | 2000-03-28 | Advanced Micro Devices, Inc. | Multi-step polysilicon deposition process for boron penetration inhibition |
| US5783469A (en) | 1996-12-10 | 1998-07-21 | Advanced Micro Devices, Inc. | Method for making nitrogenated gate structure for improved transistor performance |
| JP3171322B2 (ja) * | 1997-03-11 | 2001-05-28 | 日本電気株式会社 | Ｓｏｉ基板およびその製造方法 |
| US6068928A (en) | 1998-02-25 | 2000-05-30 | Siemens Aktiengesellschaft | Method for producing a polycrystalline silicon structure and polycrystalline silicon layer to be produced by the method |
| US6268068B1 (en) | 1998-10-06 | 2001-07-31 | Case Western Reserve University | Low stress polysilicon film and method for producing same |
| US6479166B1 (en) * | 1998-10-06 | 2002-11-12 | Case Western Reserve University | Large area polysilicon films with predetermined stress characteristics and method for producing same |
| JP4313874B2 (ja) | 1999-02-02 | 2009-08-12 | キヤノン株式会社 | 基板の製造方法 |
| US6204205B1 (en) * | 1999-07-06 | 2001-03-20 | Taiwan Semiconductor Manufacturing Company | Using H2anneal to improve the electrical characteristics of gate oxide |
| US20020090758A1 (en) | 2000-09-19 | 2002-07-11 | Silicon Genesis Corporation | Method and resulting device for manufacturing for double gated transistors |
| US20050026432A1 (en) | 2001-04-17 | 2005-02-03 | Atwater Harry A. | Wafer bonded epitaxial templates for silicon heterostructures |
| US6562127B1 (en) | 2002-01-16 | 2003-05-13 | The United States Of America As Represented By The Secretary Of The Navy | Method of making mosaic array of thin semiconductor material of large substrates |
| US6995430B2 (en) | 2002-06-07 | 2006-02-07 | Amberwave Systems Corporation | Strained-semiconductor-on-insulator device structures |
| US7074623B2 (en) | 2002-06-07 | 2006-07-11 | Amberwave Systems Corporation | Methods of forming strained-semiconductor-on-insulator finFET device structures |
| US6743662B2 (en) | 2002-07-01 | 2004-06-01 | Honeywell International, Inc. | Silicon-on-insulator wafer for RF integrated circuit |
| US7057234B2 (en) | 2002-12-06 | 2006-06-06 | Cornell Research Foundation, Inc. | Scalable nano-transistor and memory using back-side trapping |
| CN100483666C (zh) | 2003-01-07 | 2009-04-29 | S.O.I.Tec绝缘体上硅技术公司 | 施主晶片以及重复利用晶片的方法和剥离有用层的方法 |
| US7005160B2 (en) * | 2003-04-24 | 2006-02-28 | Asm America, Inc. | Methods for depositing polycrystalline films with engineered grain structures |
| CN1856873A (zh) | 2003-09-26 | 2006-11-01 | 卢万天主教大学 | 制造具有降低的欧姆损耗的多层半导体结构的方法 |
| FR2860341B1 (fr) * | 2003-09-26 | 2005-12-30 | Soitec Silicon On Insulator | Procede de fabrication de structure multicouche a pertes diminuees |
| US6992025B2 (en) | 2004-01-12 | 2006-01-31 | Sharp Laboratories Of America, Inc. | Strained silicon on insulator from film transfer and relaxation by hydrogen implantation |
| US7279400B2 (en) | 2004-08-05 | 2007-10-09 | Sharp Laboratories Of America, Inc. | Method of fabricating single-layer and multi-layer single crystalline silicon and silicon devices on plastic using sacrificial glass |
| US7312487B2 (en) | 2004-08-16 | 2007-12-25 | International Business Machines Corporation | Three dimensional integrated circuit |
| DE102004041378B4 (de) * | 2004-08-26 | 2010-07-08 | Siltronic Ag | Halbleiterscheibe mit Schichtstruktur mit geringem Warp und Bow sowie Verfahren zu ihrer Herstellung |
| US7476594B2 (en) | 2005-03-30 | 2009-01-13 | Cree, Inc. | Methods of fabricating silicon nitride regions in silicon carbide and resulting structures |
| FR2890489B1 (fr) | 2005-09-08 | 2008-03-07 | Soitec Silicon On Insulator | Procede de fabrication d'une heterostructure de type semi-conducteur sur isolant |
| FR2897982B1 (fr) | 2006-02-27 | 2008-07-11 | Tracit Technologies Sa | Procede de fabrication des structures de type partiellement soi, comportant des zones reliant une couche superficielle et un substrat |
| US7964514B2 (en) * | 2006-03-02 | 2011-06-21 | Applied Materials, Inc. | Multiple nitrogen plasma treatments for thin SiON dielectrics |
| FR2902233B1 (fr) | 2006-06-09 | 2008-10-17 | Soitec Silicon On Insulator | Procede de limitation de diffusion en mode lacunaire dans une heterostructure |
| FR2911430B1 (fr) | 2007-01-15 | 2009-04-17 | Soitec Silicon On Insulator | "procede de fabrication d'un substrat hybride" |
| CN101681807B (zh) | 2007-06-01 | 2012-03-14 | 株式会社半导体能源研究所 | 半导体器件的制造方法 |
| JP4445524B2 (ja) | 2007-06-26 | 2010-04-07 | 株式会社東芝 | 半導体記憶装置の製造方法 |
| JP2009016692A (ja) | 2007-07-06 | 2009-01-22 | Toshiba Corp | 半導体記憶装置の製造方法と半導体記憶装置 |
| US20090278233A1 (en) | 2007-07-26 | 2009-11-12 | Pinnington Thomas Henry | Bonded intermediate substrate and method of making same |
| US7915716B2 (en) | 2007-09-27 | 2011-03-29 | Stats Chippac Ltd. | Integrated circuit package system with leadframe array |
| US7879699B2 (en) | 2007-09-28 | 2011-02-01 | Infineon Technologies Ag | Wafer and a method for manufacturing a wafer |
| US8128749B2 (en) | 2007-10-04 | 2012-03-06 | International Business Machines Corporation | Fabrication of SOI with gettering layer |
| US7868419B1 (en) | 2007-10-18 | 2011-01-11 | Rf Micro Devices, Inc. | Linearity improvements of semiconductor substrate based radio frequency devices |
| JP2009135453A (ja) | 2007-10-30 | 2009-06-18 | Semiconductor Energy Lab Co Ltd | 半導体装置の作製方法、半導体装置及び電子機器 |
| US7883990B2 (en) * | 2007-10-31 | 2011-02-08 | International Business Machines Corporation | High resistivity SOI base wafer using thermally annealed substrate |
| US20090236689A1 (en) | 2008-03-24 | 2009-09-24 | Freescale Semiconductor, Inc. | Integrated passive device and method with low cost substrate |
| FR2933233B1 (fr) * | 2008-06-30 | 2010-11-26 | Soitec Silicon On Insulator | Substrat de haute resistivite bon marche et procede de fabrication associe |
| FR2933234B1 (fr) | 2008-06-30 | 2016-09-23 | S O I Tec Silicon On Insulator Tech | Substrat bon marche a structure double et procede de fabrication associe |
| US8058137B1 (en) | 2009-04-14 | 2011-11-15 | Monolithic 3D Inc. | Method for fabrication of a semiconductor device and structure |
| JP2010258083A (ja) | 2009-04-22 | 2010-11-11 | Panasonic Corp | Ｓｏｉウェーハ、その製造方法および半導体装置の製造方法 |
| KR101094554B1 (ko) * | 2009-06-08 | 2011-12-19 | 주식회사 하이닉스반도체 | 불휘발성 메모리 소자의 제조방법 |
| WO2011052787A1 (ja) | 2009-11-02 | 2011-05-05 | 富士電機システムズ株式会社 | 半導体装置および半導体装置の製造方法 |
| JP5644096B2 (ja) | 2009-11-30 | 2014-12-24 | ソニー株式会社 | 接合基板の製造方法及び固体撮像装置の製造方法 |
| US20110174362A1 (en) | 2010-01-18 | 2011-07-21 | Applied Materials, Inc. | Manufacture of thin film solar cells with high conversion efficiency |
| US9099526B2 (en) | 2010-02-16 | 2015-08-04 | Monolithic 3D Inc. | Integrated circuit device and structure |
| WO2011118643A1 (ja) | 2010-03-26 | 2011-09-29 | テルモ株式会社 | 留置針組立体 |
| US8859393B2 (en) | 2010-06-30 | 2014-10-14 | Sunedison Semiconductor Limited | Methods for in-situ passivation of silicon-on-insulator wafers |
| US8642416B2 (en) | 2010-07-30 | 2014-02-04 | Monolithic 3D Inc. | Method of forming three dimensional integrated circuit devices using layer transfer technique |
| JP5117588B2 (ja) | 2010-09-07 | 2013-01-16 | 株式会社東芝 | 窒化物半導体結晶層の製造方法 |
| JP5627649B2 (ja) | 2010-09-07 | 2014-11-19 | 株式会社東芝 | 窒化物半導体結晶層の製造方法 |
| FR2967812B1 (fr) | 2010-11-19 | 2016-06-10 | S O I Tec Silicon On Insulator Tech | Dispositif electronique pour applications radiofrequence ou de puissance et procede de fabrication d'un tel dispositif |
| US9287353B2 (en) | 2010-11-30 | 2016-03-15 | Kyocera Corporation | Composite substrate and method of manufacturing the same |
| KR101913322B1 (ko) | 2010-12-24 | 2018-10-30 | 퀄컴 인코포레이티드 | 반도체 소자들을 위한 트랩 리치 층 |
| US8481405B2 (en) | 2010-12-24 | 2013-07-09 | Io Semiconductor, Inc. | Trap rich layer with through-silicon-vias in semiconductor devices |
| US8536021B2 (en) | 2010-12-24 | 2013-09-17 | Io Semiconductor, Inc. | Trap rich layer formation techniques for semiconductor devices |
| US8796116B2 (en) | 2011-01-31 | 2014-08-05 | Sunedison Semiconductor Limited | Methods for reducing the metal content in the device layer of SOI structures and SOI structures produced by such methods |
| US20120235283A1 (en) | 2011-03-16 | 2012-09-20 | Memc Electronic Materials, Inc. | Silicon on insulator structures having high resistivity regions in the handle wafer |
| FR2973159B1 (fr) * | 2011-03-22 | 2013-04-19 | Soitec Silicon On Insulator | Procede de fabrication d'un substrat de base |
| FR2973158B1 (fr) * | 2011-03-22 | 2014-02-28 | Soitec Silicon On Insulator | Procédé de fabrication d'un substrat de type semi-conducteur sur isolant pour applications radiofréquences |
| FR2980916B1 (fr) | 2011-10-03 | 2014-03-28 | Soitec Silicon On Insulator | Procede de fabrication d'une structure de type silicium sur isolant |
| US9496255B2 (en) | 2011-11-16 | 2016-11-15 | Qualcomm Incorporated | Stacked CMOS chipset having an insulating layer and a secondary layer and method of forming same |
| US8741739B2 (en) | 2012-01-03 | 2014-06-03 | International Business Machines Corporation | High resistivity silicon-on-insulator substrate and method of forming |
| US20130193445A1 (en) | 2012-01-26 | 2013-08-01 | International Business Machines Corporation | Soi structures including a buried boron nitride dielectric |
| US8921209B2 (en) | 2012-09-12 | 2014-12-30 | International Business Machines Corporation | Defect free strained silicon on insulator (SSOI) substrates |
| FR2999801B1 (fr) | 2012-12-14 | 2014-12-26 | Soitec Silicon On Insulator | Procede de fabrication d'une structure |
| CN103077949B (zh) * | 2013-01-28 | 2016-09-14 | 上海华虹宏力半导体制造有限公司 | 绝缘体上硅射频器件及其制作方法 |
| US9202711B2 (en) | 2013-03-14 | 2015-12-01 | Sunedison Semiconductor Limited (Uen201334164H) | Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness |
| US8951896B2 (en) * | 2013-06-28 | 2015-02-10 | International Business Machines Corporation | High linearity SOI wafer for low-distortion circuit applications |
| US9768056B2 (en) | 2013-10-31 | 2017-09-19 | Sunedison Semiconductor Limited (Uen201334164H) | Method of manufacturing high resistivity SOI wafers with charge trapping layers based on terminated Si deposition |
| KR102294812B1 (ko) | 2014-01-23 | 2021-08-31 | 글로벌웨이퍼스 씨오., 엘티디. | 고 비저항 soi 웨이퍼 및 그 제조 방법 |
| US10068795B2 (en) | 2014-02-07 | 2018-09-04 | Globalwafers Co., Ltd. | Methods for preparing layered semiconductor structures |
| JP6118757B2 (ja) * | 2014-04-24 | 2017-04-19 | 信越半導体株式会社 | 貼り合わせｓｏｉウェーハの製造方法 |
| JP6179530B2 (ja) * | 2015-01-23 | 2017-08-16 | 信越半導体株式会社 | 貼り合わせｓｏｉウェーハの製造方法 |
| EP4120320A1 (en) * | 2015-03-03 | 2023-01-18 | GlobalWafers Co., Ltd. | Charge trapping polycrystalline silicon films on silicon substrates with controllable film stress |
| JP6344271B2 (ja) * | 2015-03-06 | 2018-06-20 | 信越半導体株式会社 | 貼り合わせ半導体ウェーハ及び貼り合わせ半導体ウェーハの製造方法 |
| US9716136B1 (en) * | 2016-03-16 | 2017-07-25 | Globalfoundries Inc. | Embedded polysilicon resistors with crystallization barriers |
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- 2016-02-25 EP EP18167041.5A patent/EP3367424B1/en active Active
- 2016-02-25 WO PCT/US2016/019464 patent/WO2016140850A1/en not_active Ceased
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