FR2973159B1 - Procede de fabrication d'un substrat de base - Google Patents

Procede de fabrication d'un substrat de base

Info

Publication number
FR2973159B1
FR2973159B1 FR1152353A FR1152353A FR2973159B1 FR 2973159 B1 FR2973159 B1 FR 2973159B1 FR 1152353 A FR1152353 A FR 1152353A FR 1152353 A FR1152353 A FR 1152353A FR 2973159 B1 FR2973159 B1 FR 2973159B1
Authority
FR
France
Prior art keywords
base substrate
manufacturing base
manufacturing
substrate
base
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1152353A
Other languages
English (en)
Other versions
FR2973159A1 (fr
Inventor
Oleg Kononchuk
Frederic Allibert
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec SA filed Critical Soitec SA
Priority to FR1152353A priority Critical patent/FR2973159B1/fr
Priority to TW101107519A priority patent/TWI458020B/zh
Priority to SG2012016770A priority patent/SG184651A1/en
Priority to KR1020120027527A priority patent/KR101379885B1/ko
Priority to CN201210074558.5A priority patent/CN102693933B/zh
Priority to US13/426,190 priority patent/US8765571B2/en
Priority to JP2012064056A priority patent/JP5726796B2/ja
Priority to EP12160793A priority patent/EP2503592A1/fr
Publication of FR2973159A1 publication Critical patent/FR2973159A1/fr
Application granted granted Critical
Publication of FR2973159B1 publication Critical patent/FR2973159B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being other than a semiconductor body, e.g. an insulating body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02109Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates
    • H01L21/02112Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer
    • H01L21/02123Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon
    • H01L21/02164Forming insulating materials on a substrate characterised by the type of layer, e.g. type of material, porous/non-porous, pre-cursors, mixtures or laminates characterised by the material of the layer the material containing silicon the material being a silicon oxide, e.g. SiO2
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02296Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer
    • H01L21/02299Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment
    • H01L21/02301Forming insulating materials on a substrate characterised by the treatment performed before or after the formation of the layer pre-treatment in-situ cleaning
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76262Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using selective deposition of single crystal silicon, i.e. SEG techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
FR1152353A 2011-03-22 2011-03-22 Procede de fabrication d'un substrat de base Active FR2973159B1 (fr)

Priority Applications (8)

Application Number Priority Date Filing Date Title
FR1152353A FR2973159B1 (fr) 2011-03-22 2011-03-22 Procede de fabrication d'un substrat de base
TW101107519A TWI458020B (zh) 2011-03-22 2012-03-06 供絕緣體上半導體類型底材所用之基底底材之製造方法
SG2012016770A SG184651A1 (en) 2011-03-22 2012-03-09 Method of manufacturing a base substrate for a semi-conductor on insulator type substrate
KR1020120027527A KR101379885B1 (ko) 2011-03-22 2012-03-19 반도체 온 절연체형 기판을 위한 베이스 기판의 제조 방법
CN201210074558.5A CN102693933B (zh) 2011-03-22 2012-03-20 用于绝缘体型衬底上的半导体的基础衬底的制造方法
US13/426,190 US8765571B2 (en) 2011-03-22 2012-03-21 Method of manufacturing a base substrate for a semi-conductor on insulator type substrate
JP2012064056A JP5726796B2 (ja) 2011-03-22 2012-03-21 絶縁体上の半導体タイプの基板のためのベース基板を製造する方法
EP12160793A EP2503592A1 (fr) 2011-03-22 2012-03-22 Procédé de fabrication d'un substrat de base pour un substrat de type semi-conducteur sur isolant

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1152353A FR2973159B1 (fr) 2011-03-22 2011-03-22 Procede de fabrication d'un substrat de base

Publications (2)

Publication Number Publication Date
FR2973159A1 FR2973159A1 (fr) 2012-09-28
FR2973159B1 true FR2973159B1 (fr) 2013-04-19

Family

ID=45841392

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1152353A Active FR2973159B1 (fr) 2011-03-22 2011-03-22 Procede de fabrication d'un substrat de base

Country Status (8)

Country Link
US (1) US8765571B2 (fr)
EP (1) EP2503592A1 (fr)
JP (1) JP5726796B2 (fr)
KR (1) KR101379885B1 (fr)
CN (1) CN102693933B (fr)
FR (1) FR2973159B1 (fr)
SG (1) SG184651A1 (fr)
TW (1) TWI458020B (fr)

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FR2987166B1 (fr) 2012-02-16 2017-05-12 Soitec Silicon On Insulator Procede de transfert d'une couche
CN103296013B (zh) * 2013-05-28 2017-08-08 上海华虹宏力半导体制造有限公司 射频器件的形成方法
US8951896B2 (en) 2013-06-28 2015-02-10 International Business Machines Corporation High linearity SOI wafer for low-distortion circuit applications
WO2016081367A1 (fr) 2014-11-18 2016-05-26 Sunedison Semiconductor Limited Substrat de silicium sur isolant de grande résistivité comprenant une couche de piégeage de charge formée par co-implantation he-n2
WO2016081356A1 (fr) 2014-11-18 2016-05-26 Sunedison Semiconductor Limited Plaquette semi-conducteur sur isolant haute résistivité et procédé de fabrication
EP3367424B1 (fr) * 2015-03-03 2022-10-19 GlobalWafers Co., Ltd. Films de silicium polycristallin de piégeage de charge sur des substrats de silicium avec une contrainte de film controlable
JP6637515B2 (ja) 2015-03-17 2020-01-29 グローバルウェーハズ カンパニー リミテッドGlobalWafers Co.,Ltd. 半導体オン・インシュレータ構造の製造において使用するための熱的に安定した電荷トラップ層
US10304722B2 (en) 2015-06-01 2019-05-28 Globalwafers Co., Ltd. Method of manufacturing semiconductor-on-insulator
WO2016196011A1 (fr) 2015-06-01 2016-12-08 Sunedison Semiconductor Limited Procédé de fabrication de silicium-germanium sur isolant
JP6353814B2 (ja) 2015-06-09 2018-07-04 信越半導体株式会社 貼り合わせsoiウェーハの製造方法
CN105261586B (zh) * 2015-08-25 2018-05-25 上海新傲科技股份有限公司 带有电荷陷阱和绝缘埋层衬底的制备方法
CN117198983A (zh) 2015-11-20 2023-12-08 环球晶圆股份有限公司 使半导体表面平整的制造方法
WO2017214084A1 (fr) 2016-06-08 2017-12-14 Sunedison Semiconductor Limited Lingot et plaquette de silicium monocristallin à résistivité élevée présentant une résistance mécanique améliorée
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
SG11201903090SA (en) 2016-10-26 2019-05-30 Globalwafers Co Ltd High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
FR3066858B1 (fr) * 2017-05-23 2019-06-21 Soitec Procede pour minimiser une distorsion d'un signal dans un circuit radiofrequence
CN108987250B (zh) * 2017-06-02 2021-08-17 上海新昇半导体科技有限公司 衬底及其制作方法
US10468486B2 (en) * 2017-10-30 2019-11-05 Taiwan Semiconductor Manufacturing Company Ltd. SOI substrate, semiconductor device and method for manufacturing the same
JP6834932B2 (ja) * 2017-12-19 2021-02-24 株式会社Sumco 貼り合わせウェーハ用の支持基板の製造方法および貼り合わせウェーハの製造方法
EP4210092A1 (fr) 2018-06-08 2023-07-12 GlobalWafers Co., Ltd. Procédé de transfert d'une couche mince de silicium
US10943813B2 (en) * 2018-07-13 2021-03-09 Globalwafers Co., Ltd. Radio frequency silicon on insulator wafer platform with superior performance, stability, and manufacturability
FR3129029B1 (fr) 2021-11-09 2023-09-29 Soitec Silicon On Insulator Procede de preparation d’un substrat support muni d’une couche de piegeage de charges
FR3129028B1 (fr) 2021-11-09 2023-11-10 Soitec Silicon On Insulator Procede de preparation d’un substrat support muni d’une couche de piegeage de charges

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FR2838865B1 (fr) 2002-04-23 2005-10-14 Soitec Silicon On Insulator Procede de fabrication d'un substrat avec couche utile sur support de resistivite elevee
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FR2933233B1 (fr) * 2008-06-30 2010-11-26 Soitec Silicon On Insulator Substrat de haute resistivite bon marche et procede de fabrication associe
FR2953640B1 (fr) * 2009-12-04 2012-02-10 S O I Tec Silicon On Insulator Tech Procede de fabrication d'une structure de type semi-conducteur sur isolant, a pertes electriques diminuees et structure correspondante

Also Published As

Publication number Publication date
US8765571B2 (en) 2014-07-01
EP2503592A1 (fr) 2012-09-26
CN102693933A (zh) 2012-09-26
JP2012199550A (ja) 2012-10-18
JP5726796B2 (ja) 2015-06-03
TW201239990A (en) 2012-10-01
KR20120107863A (ko) 2012-10-04
FR2973159A1 (fr) 2012-09-28
CN102693933B (zh) 2016-12-14
SG184651A1 (en) 2012-10-30
TWI458020B (zh) 2014-10-21
KR101379885B1 (ko) 2014-04-01
US20120244687A1 (en) 2012-09-27

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