CN107533953B - 具有可控膜应力的在硅衬底上沉积电荷捕获多晶硅膜的方法 - Google Patents

具有可控膜应力的在硅衬底上沉积电荷捕获多晶硅膜的方法 Download PDF

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CN107533953B
CN107533953B CN201680025562.9A CN201680025562A CN107533953B CN 107533953 B CN107533953 B CN 107533953B CN 201680025562 A CN201680025562 A CN 201680025562A CN 107533953 B CN107533953 B CN 107533953B
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layer
semiconductor
single crystal
crystal semiconductor
handle substrate
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CN107533953A (zh
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J·L·利伯特
G·王
S·G·托马斯
I·佩多斯
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GlobalWafers Co Ltd
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
    • H01L21/02436—Intermediate layers between substrates and deposited layers
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    • H01L21/02365—Forming inorganic semiconducting materials on a substrate
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
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    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
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    • H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI

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CN201680025562.9A 2015-03-03 2016-02-25 具有可控膜应力的在硅衬底上沉积电荷捕获多晶硅膜的方法 Active CN107533953B (zh)

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US201562127418P 2015-03-03 2015-03-03
US62/127,418 2015-03-03
PCT/US2016/019464 WO2016140850A1 (en) 2015-03-03 2016-02-25 Method of depositing charge trapping polycrystalline silicon films on silicon substrates with controllable film stress

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CN107533953B true CN107533953B (zh) 2021-05-11

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US (3) US10283402B2 (enExample)
EP (4) EP4120320A1 (enExample)
JP (2) JP6517360B2 (enExample)
CN (1) CN107533953B (enExample)
TW (1) TWI711067B (enExample)
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