JP2018113679A - 基板間のキャビティ内に形成されてビアを含む電子デバイスを製造する方法 - Google Patents

基板間のキャビティ内に形成されてビアを含む電子デバイスを製造する方法 Download PDF

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JP2018113679A
JP2018113679A JP2017231535A JP2017231535A JP2018113679A JP 2018113679 A JP2018113679 A JP 2018113679A JP 2017231535 A JP2017231535 A JP 2017231535A JP 2017231535 A JP2017231535 A JP 2017231535A JP 2018113679 A JP2018113679 A JP 2018113679A
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substrate
wafer
sidewall
metal
layer
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JP2018113679A5 (enExample
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敦 鷹野
Atsushi Takano
敦 鷹野
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Skyworks Solutions Inc
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Skyworks Solutions Inc
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    • H03H3/02—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks
    • H03H2003/021—Apparatus or processes specially adapted for the manufacture of impedance networks, resonating circuits, resonators for the manufacture of electromechanical resonators or networks for the manufacture of piezoelectric or electrostrictive resonators or networks the resonators or networks being of the air-gap type
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US11895771B2 (en) 2020-11-23 2024-02-06 Samsung Electro-Mechanics Co., Ltd. Printed circuit board

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US10541152B2 (en) 2014-07-31 2020-01-21 Skyworks Solutions, Inc. Transient liquid phase material bonding and sealing structures and methods of forming same
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US10439587B2 (en) 2016-12-02 2019-10-08 Skyworks Solutions, Inc. Methods of manufacturing electronic devices formed in a cavity
KR20180134238A (ko) * 2017-06-08 2018-12-18 (주)와이솔 웨이퍼레벨패키지 및 제조방법
JP6791390B2 (ja) * 2017-08-29 2020-11-25 株式会社村田製作所 弾性波装置、高周波フロントエンド回路及び通信装置
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