JP2016526796A5 - - Google Patents

Download PDF

Info

Publication number
JP2016526796A5
JP2016526796A5 JP2016522698A JP2016522698A JP2016526796A5 JP 2016526796 A5 JP2016526796 A5 JP 2016526796A5 JP 2016522698 A JP2016522698 A JP 2016522698A JP 2016522698 A JP2016522698 A JP 2016522698A JP 2016526796 A5 JP2016526796 A5 JP 2016526796A5
Authority
JP
Japan
Prior art keywords
implantation
amount
functional layer
thickness
chemical species
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP2016522698A
Other languages
English (en)
Japanese (ja)
Other versions
JP6470275B2 (ja
JP2016526796A (ja
Filing date
Publication date
Priority claimed from FR1301528A external-priority patent/FR3007891B1/fr
Application filed filed Critical
Publication of JP2016526796A publication Critical patent/JP2016526796A/ja
Publication of JP2016526796A5 publication Critical patent/JP2016526796A5/ja
Application granted granted Critical
Publication of JP6470275B2 publication Critical patent/JP6470275B2/ja
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

JP2016522698A 2013-06-28 2014-06-17 複合構造物を製造する方法 Active JP6470275B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
FR1301528 2013-06-28
FR1301528A FR3007891B1 (fr) 2013-06-28 2013-06-28 Procede de fabrication d'une structure composite
PCT/FR2014/051487 WO2014207346A1 (fr) 2013-06-28 2014-06-17 Procede de fabrication d'une structure composite

Publications (3)

Publication Number Publication Date
JP2016526796A JP2016526796A (ja) 2016-09-05
JP2016526796A5 true JP2016526796A5 (enExample) 2018-08-16
JP6470275B2 JP6470275B2 (ja) 2019-02-13

Family

ID=49474468

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2016522698A Active JP6470275B2 (ja) 2013-06-28 2014-06-17 複合構造物を製造する方法

Country Status (7)

Country Link
US (1) US9887124B2 (enExample)
JP (1) JP6470275B2 (enExample)
CN (1) CN105358474B (enExample)
DE (1) DE112014003019B4 (enExample)
FR (1) FR3007891B1 (enExample)
SG (1) SG11201510631VA (enExample)
WO (1) WO2014207346A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6747386B2 (ja) * 2017-06-23 2020-08-26 信越半導体株式会社 Soiウェーハの製造方法
FR3116151A1 (fr) * 2020-11-10 2022-05-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de formation d’une structure de piegeage d’un substrat utile
FR3134229B1 (fr) * 2022-04-01 2024-03-08 Commissariat Energie Atomique Procede de transfert d’une couche mince sur un substrat support

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3031904B2 (ja) * 1998-02-18 2000-04-10 キヤノン株式会社 複合部材とその分離方法、及びそれを利用した半導体基体の製造方法
MY118019A (en) * 1998-02-18 2004-08-30 Canon Kk Composite member, its separation method, and preparation method of semiconductor substrate by utilization thereof
FR2797714B1 (fr) * 1999-08-20 2001-10-26 Soitec Silicon On Insulator Procede de traitement de substrats pour la microelectronique et substrats obtenus par ce procede
FR2809867B1 (fr) * 2000-05-30 2003-10-24 Commissariat Energie Atomique Substrat fragilise et procede de fabrication d'un tel substrat
FR2816445B1 (fr) * 2000-11-06 2003-07-25 Commissariat Energie Atomique Procede de fabrication d'une structure empilee comprenant une couche mince adherant a un substrat cible
FR2817394B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
FR2894990B1 (fr) * 2005-12-21 2008-02-22 Soitec Silicon On Insulator Procede de fabrication de substrats, notamment pour l'optique,l'electronique ou l'optoelectronique et substrat obtenu selon ledit procede
FR2823599B1 (fr) * 2001-04-13 2004-12-17 Commissariat Energie Atomique Substrat demomtable a tenue mecanique controlee et procede de realisation
FR2827423B1 (fr) * 2001-07-16 2005-05-20 Soitec Silicon On Insulator Procede d'amelioration d'etat de surface
JP4526818B2 (ja) * 2001-07-17 2010-08-18 信越半導体株式会社 貼り合わせウエーハの製造方法
FR2835095B1 (fr) * 2002-01-22 2005-03-18 Procede de preparation d'ensembles a semi-conducteurs separables, notamment pour former des substrats pour l'electronique, l'optoelectrique et l'optique
KR100511656B1 (ko) * 2002-08-10 2005-09-07 주식회사 실트론 나노 에스오아이 웨이퍼의 제조방법 및 그에 따라 제조된나노 에스오아이 웨이퍼
US6911375B2 (en) * 2003-06-02 2005-06-28 International Business Machines Corporation Method of fabricating silicon devices on sapphire with wafer bonding at low temperature
FR2857983B1 (fr) * 2003-07-24 2005-09-02 Soitec Silicon On Insulator Procede de fabrication d'une couche epitaxiee
US7772087B2 (en) * 2003-12-19 2010-08-10 Commissariat A L'energie Atomique Method of catastrophic transfer of a thin film after co-implantation
JP4285244B2 (ja) * 2004-01-08 2009-06-24 株式会社Sumco Soiウェーハの作製方法
US7179719B2 (en) * 2004-09-28 2007-02-20 Sharp Laboratories Of America, Inc. System and method for hydrogen exfoliation
FR2877491B1 (fr) * 2004-10-29 2007-01-19 Soitec Silicon On Insulator Structure composite a forte dissipation thermique
US8138061B2 (en) * 2005-01-07 2012-03-20 International Business Machines Corporation Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide
JP2006216826A (ja) * 2005-02-04 2006-08-17 Sumco Corp Soiウェーハの製造方法
FR2890489B1 (fr) * 2005-09-08 2008-03-07 Soitec Silicon On Insulator Procede de fabrication d'une heterostructure de type semi-conducteur sur isolant
JP2007242972A (ja) * 2006-03-09 2007-09-20 Shin Etsu Handotai Co Ltd Soiウェーハの製造方法
JP2008028070A (ja) * 2006-07-20 2008-02-07 Sumco Corp 貼り合わせウェーハの製造方法
US20080070340A1 (en) * 2006-09-14 2008-03-20 Nicholas Francis Borrelli Image sensor using thin-film SOI
FR2910179B1 (fr) * 2006-12-19 2009-03-13 Commissariat Energie Atomique PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART
FR2911430B1 (fr) * 2007-01-15 2009-04-17 Soitec Silicon On Insulator "procede de fabrication d'un substrat hybride"
FR2912259B1 (fr) * 2007-02-01 2009-06-05 Soitec Silicon On Insulator Procede de fabrication d'un substrat du type "silicium sur isolant".
FR2913528B1 (fr) * 2007-03-06 2009-07-03 Soitec Silicon On Insulator Procede de fabrication d'un substrat comportant une couche d'oxyde enterree pour la realisation de composants electroniques ou analogues.
US7767542B2 (en) * 2007-04-20 2010-08-03 Semiconductor Energy Laboratory Co., Ltd Manufacturing method of SOI substrate
US7619283B2 (en) * 2007-04-20 2009-11-17 Corning Incorporated Methods of fabricating glass-based substrates and apparatus employing same
US7763502B2 (en) * 2007-06-22 2010-07-27 Semiconductor Energy Laboratory Co., Ltd Semiconductor substrate, method for manufacturing semiconductor substrate, semiconductor device, and electronic device
JP5386856B2 (ja) * 2008-06-03 2014-01-15 株式会社Sumco 貼り合わせウェーハの製造方法
JP5478199B2 (ja) * 2008-11-13 2014-04-23 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5310004B2 (ja) * 2009-01-07 2013-10-09 信越半導体株式会社 貼り合わせウェーハの製造方法
JP5607399B2 (ja) * 2009-03-24 2014-10-15 株式会社半導体エネルギー研究所 Soi基板の作製方法
CN102986020A (zh) * 2010-06-30 2013-03-20 康宁股份有限公司 对绝缘体基材上的硅进行精整的方法
US8487280B2 (en) * 2010-10-21 2013-07-16 Varian Semiconductor Equipment Associates, Inc. Modulating implantation for improved workpiece splitting
JP5802436B2 (ja) * 2011-05-30 2015-10-28 信越半導体株式会社 貼り合わせウェーハの製造方法
JP5587257B2 (ja) * 2011-07-06 2014-09-10 信越半導体株式会社 イオン注入機の基板保持具の劣化判定方法
CN102386123B (zh) * 2011-07-29 2013-11-13 上海新傲科技股份有限公司 制备具有均匀厚度器件层的衬底的方法
CN102347219A (zh) 2011-09-23 2012-02-08 中国科学院微电子研究所 形成复合功能材料结构的方法
JP5670303B2 (ja) * 2011-12-08 2015-02-18 信越半導体株式会社 イオン注入機の基板保持具の劣化判定方法
JP5927894B2 (ja) * 2011-12-15 2016-06-01 信越半導体株式会社 Soiウェーハの製造方法

Similar Documents

Publication Publication Date Title
CN100419960C (zh) Soi晶片的制造方法
JP4730581B2 (ja) 貼り合わせウェーハの製造方法
US9252240B2 (en) Manufacturing method for semiconductor device with discrete field oxide structure
EP4250337A3 (en) Method for separating semiconductor substrate body from functional layer thereon
US10566196B2 (en) Method for manufacturing bonded SOI wafer
JP6107709B2 (ja) 貼り合わせsoiウェーハの製造方法
EP2195836A1 (en) Method of producing a structure by layer transfer
JP2013229516A5 (enExample)
KR102019653B1 (ko) Soi 웨이퍼의 제조방법 및 soi 웨이퍼
WO2007125771A1 (ja) Soiウエーハの製造方法
JP2016526796A5 (enExample)
JP2019511112A (ja) ドナー基板への注入のための適切なエネルギーの決定方法、およびセミコンダクタ・オン・インシュレータ(Semiconductor−on−insulator)構造体の組立方法
CN107146758B (zh) 带有载流子俘获中心的衬底的制备方法
KR102095383B1 (ko) 접합 웨이퍼의 제조방법
CN105845575A (zh) 一种半导体器件的制作方法
CN104425341A (zh) 一种低剂量注入制备绝缘体上半导体材料的方法
JP6470275B2 (ja) 複合構造物を製造する方法
JP2008004821A (ja) 貼り合わせウェーハの製造方法
CN107154378B (zh) 绝缘层上顶层硅衬底及其制造方法
MY181531A (en) Method of fabricating a bond pad in a semiconductor device
TW201743367A (zh) 貼合式晶圓的製造方法
RU2498450C1 (ru) Способ изготовления структуры полупроводник-на-изоляторе
CN107910259B (zh) 一种制备西格玛凹槽的方法
CN108140553B (zh) 贴合式soi晶圆的制造方法
CN110943031B (zh) 半导体器件的制备方法