FR3007891B1 - Procede de fabrication d'une structure composite - Google Patents

Procede de fabrication d'une structure composite

Info

Publication number
FR3007891B1
FR3007891B1 FR1301528A FR1301528A FR3007891B1 FR 3007891 B1 FR3007891 B1 FR 3007891B1 FR 1301528 A FR1301528 A FR 1301528A FR 1301528 A FR1301528 A FR 1301528A FR 3007891 B1 FR3007891 B1 FR 3007891B1
Authority
FR
France
Prior art keywords
manufacturing
composite structure
composite
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
FR1301528A
Other languages
English (en)
French (fr)
Other versions
FR3007891A1 (fr
Inventor
Mohamed Nadia Ben
Eric Maze
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Soitec SA
Original Assignee
Soitec SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority to FR1301528A priority Critical patent/FR3007891B1/fr
Application filed by Soitec SA filed Critical Soitec SA
Priority to CN201480036456.1A priority patent/CN105358474B/zh
Priority to US14/900,257 priority patent/US9887124B2/en
Priority to JP2016522698A priority patent/JP6470275B2/ja
Priority to PCT/FR2014/051487 priority patent/WO2014207346A1/fr
Priority to SG11201510631VA priority patent/SG11201510631VA/en
Priority to DE112014003019.8T priority patent/DE112014003019B4/de
Publication of FR3007891A1 publication Critical patent/FR3007891A1/fr
Application granted granted Critical
Publication of FR3007891B1 publication Critical patent/FR3007891B1/fr
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00349Creating layers of material on a substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B81MICROSTRUCTURAL TECHNOLOGY
    • B81CPROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
    • B81C1/00Manufacture or treatment of devices or systems in or on a substrate
    • B81C1/00349Creating layers of material on a substrate
    • B81C1/00373Selective deposition, e.g. printing or microcontact printing
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02107Forming insulating materials on a substrate
    • H01L21/02225Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer
    • H01L21/02227Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process
    • H01L21/0223Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate
    • H01L21/02233Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer
    • H01L21/02236Forming insulating materials on a substrate characterised by the process for the formation of the insulating layer formation by a process other than a deposition process formation by oxidation, e.g. oxidation of the substrate of the semiconductor substrate or a semiconductor layer group IV semiconductor
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604Chemical etching

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Physics & Mathematics (AREA)
  • General Chemical & Material Sciences (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Chemical & Material Sciences (AREA)
  • Element Separation (AREA)
  • Formation Of Insulating Films (AREA)
  • Physical Vapour Deposition (AREA)
  • Medicinal Preparation (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Thin Film Transistor (AREA)
FR1301528A 2013-06-28 2013-06-28 Procede de fabrication d'une structure composite Active FR3007891B1 (fr)

Priority Applications (7)

Application Number Priority Date Filing Date Title
FR1301528A FR3007891B1 (fr) 2013-06-28 2013-06-28 Procede de fabrication d'une structure composite
US14/900,257 US9887124B2 (en) 2013-06-28 2014-06-17 Method for producing a composite structure
JP2016522698A JP6470275B2 (ja) 2013-06-28 2014-06-17 複合構造物を製造する方法
PCT/FR2014/051487 WO2014207346A1 (fr) 2013-06-28 2014-06-17 Procede de fabrication d'une structure composite
CN201480036456.1A CN105358474B (zh) 2013-06-28 2014-06-17 复合结构的制造工艺
SG11201510631VA SG11201510631VA (en) 2013-06-28 2014-06-17 Process For The Manufacture Of A Composite Structure
DE112014003019.8T DE112014003019B4 (de) 2013-06-28 2014-06-17 Prozess für die Herstellung einer Verbundstruktur

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR1301528A FR3007891B1 (fr) 2013-06-28 2013-06-28 Procede de fabrication d'une structure composite

Publications (2)

Publication Number Publication Date
FR3007891A1 FR3007891A1 (fr) 2015-01-02
FR3007891B1 true FR3007891B1 (fr) 2016-11-25

Family

ID=49474468

Family Applications (1)

Application Number Title Priority Date Filing Date
FR1301528A Active FR3007891B1 (fr) 2013-06-28 2013-06-28 Procede de fabrication d'une structure composite

Country Status (7)

Country Link
US (1) US9887124B2 (enExample)
JP (1) JP6470275B2 (enExample)
CN (1) CN105358474B (enExample)
DE (1) DE112014003019B4 (enExample)
FR (1) FR3007891B1 (enExample)
SG (1) SG11201510631VA (enExample)
WO (1) WO2014207346A1 (enExample)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6747386B2 (ja) 2017-06-23 2020-08-26 信越半導体株式会社 Soiウェーハの製造方法
FR3116151A1 (fr) * 2020-11-10 2022-05-13 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procede de formation d’une structure de piegeage d’un substrat utile
FR3134229B1 (fr) * 2022-04-01 2024-03-08 Commissariat Energie Atomique Procede de transfert d’une couche mince sur un substrat support

Family Cites Families (43)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TW437078B (en) 1998-02-18 2001-05-28 Canon Kk Composite member, its separation method, and preparation method of semiconductor substrate by utilization thereof
JP3031904B2 (ja) * 1998-02-18 2000-04-10 キヤノン株式会社 複合部材とその分離方法、及びそれを利用した半導体基体の製造方法
FR2797714B1 (fr) * 1999-08-20 2001-10-26 Soitec Silicon On Insulator Procede de traitement de substrats pour la microelectronique et substrats obtenus par ce procede
FR2809867B1 (fr) * 2000-05-30 2003-10-24 Commissariat Energie Atomique Substrat fragilise et procede de fabrication d'un tel substrat
FR2816445B1 (fr) * 2000-11-06 2003-07-25 Commissariat Energie Atomique Procede de fabrication d'une structure empilee comprenant une couche mince adherant a un substrat cible
FR2894990B1 (fr) * 2005-12-21 2008-02-22 Soitec Silicon On Insulator Procede de fabrication de substrats, notamment pour l'optique,l'electronique ou l'optoelectronique et substrat obtenu selon ledit procede
FR2817394B1 (fr) * 2000-11-27 2003-10-31 Soitec Silicon On Insulator Procede de fabrication d'un substrat notamment pour l'optique, l'electronique ou l'optoelectronique et substrat obtenu par ce procede
FR2823599B1 (fr) * 2001-04-13 2004-12-17 Commissariat Energie Atomique Substrat demomtable a tenue mecanique controlee et procede de realisation
FR2827423B1 (fr) * 2001-07-16 2005-05-20 Soitec Silicon On Insulator Procede d'amelioration d'etat de surface
WO2003009386A1 (en) * 2001-07-17 2003-01-30 Shin-Etsu Handotai Co.,Ltd. Method for producing bonding wafer
FR2835095B1 (fr) * 2002-01-22 2005-03-18 Procede de preparation d'ensembles a semi-conducteurs separables, notamment pour former des substrats pour l'electronique, l'optoelectrique et l'optique
KR100511656B1 (ko) * 2002-08-10 2005-09-07 주식회사 실트론 나노 에스오아이 웨이퍼의 제조방법 및 그에 따라 제조된나노 에스오아이 웨이퍼
US6911375B2 (en) * 2003-06-02 2005-06-28 International Business Machines Corporation Method of fabricating silicon devices on sapphire with wafer bonding at low temperature
FR2857983B1 (fr) * 2003-07-24 2005-09-02 Soitec Silicon On Insulator Procede de fabrication d'une couche epitaxiee
US7772087B2 (en) * 2003-12-19 2010-08-10 Commissariat A L'energie Atomique Method of catastrophic transfer of a thin film after co-implantation
JP4285244B2 (ja) * 2004-01-08 2009-06-24 株式会社Sumco Soiウェーハの作製方法
US7179719B2 (en) * 2004-09-28 2007-02-20 Sharp Laboratories Of America, Inc. System and method for hydrogen exfoliation
FR2877491B1 (fr) * 2004-10-29 2007-01-19 Soitec Silicon On Insulator Structure composite a forte dissipation thermique
US8138061B2 (en) * 2005-01-07 2012-03-20 International Business Machines Corporation Quasi-hydrophobic Si-Si wafer bonding using hydrophilic Si surfaces and dissolution of interfacial bonding oxide
JP2006216826A (ja) * 2005-02-04 2006-08-17 Sumco Corp Soiウェーハの製造方法
FR2890489B1 (fr) * 2005-09-08 2008-03-07 Soitec Silicon On Insulator Procede de fabrication d'une heterostructure de type semi-conducteur sur isolant
JP2007242972A (ja) * 2006-03-09 2007-09-20 Shin Etsu Handotai Co Ltd Soiウェーハの製造方法
JP2008028070A (ja) * 2006-07-20 2008-02-07 Sumco Corp 貼り合わせウェーハの製造方法
US20080070340A1 (en) * 2006-09-14 2008-03-20 Nicholas Francis Borrelli Image sensor using thin-film SOI
FR2910179B1 (fr) * 2006-12-19 2009-03-13 Commissariat Energie Atomique PROCEDE DE FABRICATION DE COUCHES MINCES DE GaN PAR IMPLANTATION ET RECYCLAGE D'UN SUBSTRAT DE DEPART
FR2911430B1 (fr) * 2007-01-15 2009-04-17 Soitec Silicon On Insulator "procede de fabrication d'un substrat hybride"
FR2912259B1 (fr) * 2007-02-01 2009-06-05 Soitec Silicon On Insulator Procede de fabrication d'un substrat du type "silicium sur isolant".
FR2913528B1 (fr) * 2007-03-06 2009-07-03 Soitec Silicon On Insulator Procede de fabrication d'un substrat comportant une couche d'oxyde enterree pour la realisation de composants electroniques ou analogues.
US7767542B2 (en) * 2007-04-20 2010-08-03 Semiconductor Energy Laboratory Co., Ltd Manufacturing method of SOI substrate
US7619283B2 (en) * 2007-04-20 2009-11-17 Corning Incorporated Methods of fabricating glass-based substrates and apparatus employing same
US7763502B2 (en) * 2007-06-22 2010-07-27 Semiconductor Energy Laboratory Co., Ltd Semiconductor substrate, method for manufacturing semiconductor substrate, semiconductor device, and electronic device
JP5386856B2 (ja) * 2008-06-03 2014-01-15 株式会社Sumco 貼り合わせウェーハの製造方法
JP5478199B2 (ja) * 2008-11-13 2014-04-23 株式会社半導体エネルギー研究所 半導体装置の作製方法
JP5310004B2 (ja) * 2009-01-07 2013-10-09 信越半導体株式会社 貼り合わせウェーハの製造方法
US8048773B2 (en) * 2009-03-24 2011-11-01 Semiconductor Energy Laboratory Co., Ltd. Method for manufacturing SOI substrate
CN102986020A (zh) * 2010-06-30 2013-03-20 康宁股份有限公司 对绝缘体基材上的硅进行精整的方法
US8487280B2 (en) * 2010-10-21 2013-07-16 Varian Semiconductor Equipment Associates, Inc. Modulating implantation for improved workpiece splitting
JP5802436B2 (ja) * 2011-05-30 2015-10-28 信越半導体株式会社 貼り合わせウェーハの製造方法
JP5587257B2 (ja) * 2011-07-06 2014-09-10 信越半導体株式会社 イオン注入機の基板保持具の劣化判定方法
CN102386123B (zh) * 2011-07-29 2013-11-13 上海新傲科技股份有限公司 制备具有均匀厚度器件层的衬底的方法
CN102347219A (zh) 2011-09-23 2012-02-08 中国科学院微电子研究所 形成复合功能材料结构的方法
JP5670303B2 (ja) * 2011-12-08 2015-02-18 信越半導体株式会社 イオン注入機の基板保持具の劣化判定方法
JP5927894B2 (ja) * 2011-12-15 2016-06-01 信越半導体株式会社 Soiウェーハの製造方法

Also Published As

Publication number Publication date
CN105358474B (zh) 2018-02-13
SG11201510631VA (en) 2016-01-28
US9887124B2 (en) 2018-02-06
WO2014207346A1 (fr) 2014-12-31
JP6470275B2 (ja) 2019-02-13
DE112014003019B4 (de) 2025-06-05
JP2016526796A (ja) 2016-09-05
CN105358474A (zh) 2016-02-24
FR3007891A1 (fr) 2015-01-02
DE112014003019T5 (de) 2016-03-17
US20160372361A1 (en) 2016-12-22

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