JP2016516304A5 - - Google Patents

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Publication number
JP2016516304A5
JP2016516304A5 JP2016502429A JP2016502429A JP2016516304A5 JP 2016516304 A5 JP2016516304 A5 JP 2016516304A5 JP 2016502429 A JP2016502429 A JP 2016502429A JP 2016502429 A JP2016502429 A JP 2016502429A JP 2016516304 A5 JP2016516304 A5 JP 2016516304A5
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JP
Japan
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atmosphere
silicon layer
annealed
handle wafer
temperature
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JP2016502429A
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English (en)
Japanese (ja)
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JP6373354B2 (ja
JP2016516304A (ja
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Priority claimed from PCT/US2014/027418 external-priority patent/WO2014152510A1/en
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Publication of JP2016516304A5 publication Critical patent/JP2016516304A5/ja
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JP2016502429A 2013-03-14 2014-03-14 ライトポイント欠陥と表面粗さを低減するための半導体オンインシュレータウエハの製造方法 Active JP6373354B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US201361783928P 2013-03-14 2013-03-14
US61/783,928 2013-03-14
PCT/US2014/027418 WO2014152510A1 (en) 2013-03-14 2014-03-14 Semiconductor-on-insulator wafer manufacturing method for reducing light point defects and surface roughness

Publications (3)

Publication Number Publication Date
JP2016516304A JP2016516304A (ja) 2016-06-02
JP2016516304A5 true JP2016516304A5 (enExample) 2017-04-20
JP6373354B2 JP6373354B2 (ja) 2018-08-15

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JP2016502429A Active JP6373354B2 (ja) 2013-03-14 2014-03-14 ライトポイント欠陥と表面粗さを低減するための半導体オンインシュレータウエハの製造方法

Country Status (7)

Country Link
US (1) US9202711B2 (enExample)
JP (1) JP6373354B2 (enExample)
KR (1) KR102027205B1 (enExample)
CN (1) CN105431936B (enExample)
DE (1) DE112014001279B4 (enExample)
TW (1) TWI598961B (enExample)
WO (1) WO2014152510A1 (enExample)

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US9831115B2 (en) 2016-02-19 2017-11-28 Sunedison Semiconductor Limited (Uen201334164H) Process flow for manufacturing semiconductor on insulator structures in parallel
US10622247B2 (en) 2016-02-19 2020-04-14 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a buried high resistivity layer
SG11201806851RA (en) 2016-03-07 2018-09-27 Globalwafers Co Ltd Semiconductor on insulator structure comprising a low temperature flowable oxide layer and method of manufacture thereof
WO2017155806A1 (en) 2016-03-07 2017-09-14 Sunedison Semiconductor Limited Semiconductor on insulator structure comprising a plasma oxide layer and method of manufacture thereof
US11848227B2 (en) 2016-03-07 2023-12-19 Globalwafers Co., Ltd. Method of manufacturing a semiconductor on insulator structure by a pressurized bond treatment
US11114332B2 (en) 2016-03-07 2021-09-07 Globalwafers Co., Ltd. Semiconductor on insulator structure comprising a plasma nitride layer and method of manufacture thereof
KR102439602B1 (ko) 2016-06-08 2022-09-01 글로벌웨이퍼스 씨오., 엘티디. 높은 비저항의 단결정 실리콘 잉곳 및 개선된 기계적 강도를 갖는 웨이퍼
US10269617B2 (en) 2016-06-22 2019-04-23 Globalwafers Co., Ltd. High resistivity silicon-on-insulator substrate comprising an isolation region
EP4456146B1 (en) 2016-10-26 2026-03-25 GlobalWafers Co., Ltd. High resistivity silicon-on-insulator substrate having enhanced charge trapping efficiency
SG10201913059PA (en) 2016-12-05 2020-02-27 Globalwafers Co Ltd High resistivity silicon-on-insulator structure and method of manufacture thereof
KR102453743B1 (ko) 2016-12-28 2022-10-11 썬에디슨 세미컨덕터 리미티드 고유 게터링 및 게이트 산화물 무결성 수율을 갖도록 규소 웨이퍼들을 처리하는 방법
FR3061988B1 (fr) 2017-01-13 2019-11-01 Soitec Procede de lissage de surface d'un substrat semiconducteur sur isolant
SG10201913850VA (en) 2017-07-14 2020-03-30 Sunedison Semiconductor Ltd Method of manufacture of a semiconductor on insulator structure
KR102466888B1 (ko) 2017-12-21 2022-11-11 글로벌웨이퍼스 씨오., 엘티디. Lls 링/코어 패턴을 개선하기 위해 단결정 실리콘 잉곳을 처리하는 방법
EP3785293B1 (en) 2018-04-27 2023-06-07 GlobalWafers Co., Ltd. Light assisted platelet formation facilitating layer transfer from a semiconductor donor substrate
CN118943075A (zh) 2018-06-08 2024-11-12 环球晶圆股份有限公司 将硅薄层移转的方法
CN112420915B (zh) * 2020-11-23 2022-12-23 济南晶正电子科技有限公司 复合衬底的制备方法、复合薄膜及电子元器件
CN115884589A (zh) * 2021-09-27 2023-03-31 长鑫存储技术有限公司 一种半导体结构及其制备方法
US20250069945A1 (en) 2023-08-24 2025-02-27 Globalwafers Co., Ltd. Methods of preparing silicon-on-insulator structures using epitaxial wafers
FR3159469A1 (fr) * 2024-02-15 2025-08-22 Soitec Procédé de lissage des surfaces libres et rugueuses d’une pluralité de substrats de silicium sur isolant
US20250293073A1 (en) 2024-03-18 2025-09-18 Globalwafers Co., Ltd. Reclaimable donor substrates for use in preparing multiple silicon-on-insulator structures
US20260005066A1 (en) 2024-06-28 2026-01-01 Globalwafers Co., Ltd. Methods for controlling flatness of handle structures for use in semiconductor-on-insulator structures
US20260018457A1 (en) 2024-07-10 2026-01-15 Globalwafers Co., Ltd. Methods of processing semiconductor-on-insulator structures using clean-and-etch operation
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