JP2015525969A - アンチヒューズを採用した集積回路デバイスおよびこのデバイスを作製する方法 - Google Patents

アンチヒューズを採用した集積回路デバイスおよびこのデバイスを作製する方法 Download PDF

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JP2015525969A
JP2015525969A JP2015520484A JP2015520484A JP2015525969A JP 2015525969 A JP2015525969 A JP 2015525969A JP 2015520484 A JP2015520484 A JP 2015520484A JP 2015520484 A JP2015520484 A JP 2015520484A JP 2015525969 A JP2015525969 A JP 2015525969A
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antifuse
integrated circuit
dielectric
source
conductor
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Japanese (ja)
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JP2015525969A5 (enExample
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ツォンツェ・ワン
ジョン・ジアンホン・ズ
シア・リ
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クアルコム，インコーポレイテッド
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/20—Programmable ROM [PROM] devices comprising field-effect components
    • H10B20/25—One-time programmable ROM [OTPROM] devices, e.g. using electrically-fusible links
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C17/00—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards
    • G11C17/14—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM
    • G11C17/16—Read-only memories programmable only once; Semi-permanent stores, e.g. manually-replaceable information cards in which contents are determined by selectively establishing, breaking or modifying connecting links by permanently altering the state of coupling elements, e.g. PROM using electrically-fusible links
    • G11C17/165—Memory cells which are electrically programmed to cause a change in resistance, e.g. to permit multiple resistance steps to be programmed rather than conduct to or from non-conduct change of fuses and antifuses
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5228—Resistive arrangements or effects of, or between, wiring layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/525—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections
    • H01L23/5252—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body with adaptable interconnections comprising anti-fuses, i.e. connections having their state changed from non-conductive to conductive
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B20/00—Read-only memory [ROM] devices
    • H10B20/60—Peripheral circuit regions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D1/00—Resistors, capacitors or inductors
    • H10D1/40—Resistors
    • H10D1/47—Resistors having no potential barriers
    • H10D1/474—Resistors having no potential barriers comprising refractory metals, transition metals, noble metals, metal compounds or metal alloys, e.g. silicides
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001—Technical content checked by a classifier
    • H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00

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  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Memories (AREA)
JP2015520484A 2012-06-29 2013-06-27 アンチヒューズを採用した集積回路デバイスおよびこのデバイスを作製する方法 Ceased JP2015525969A (ja)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
US201261666649P 2012-06-29 2012-06-29
US61/666,649 2012-06-29
US13/684,107 2012-11-21
US13/684,107 US9502424B2 (en) 2012-06-29 2012-11-21 Integrated circuit device featuring an antifuse and method of making same
PCT/US2013/048088 WO2014004770A2 (en) 2012-06-29 2013-06-27 Integrated circuit device featuring an antifuse and method of making same

Publications (2)

Publication Number Publication Date
JP2015525969A true JP2015525969A (ja) 2015-09-07
JP2015525969A5 JP2015525969A5 (enExample) 2016-07-28

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JP2015520484A Ceased JP2015525969A (ja) 2012-06-29 2013-06-27 アンチヒューズを採用した集積回路デバイスおよびこのデバイスを作製する方法

Country Status (6)

Country Link
US (1) US9502424B2 (enExample)
EP (1) EP2867922A2 (enExample)
JP (1) JP2015525969A (enExample)
KR (1) KR20150033690A (enExample)
CN (1) CN104396014B (enExample)
WO (1) WO2014004770A2 (enExample)

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JP2024526464A (ja) * 2022-06-24 2024-07-19 チャンシン メモリー テクノロジーズ インコーポレイテッド 半導体構造及びその製造方法、メモリ及びその動作方法

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US20150129975A1 (en) 2013-11-13 2015-05-14 Globalfoundries Singapore Pte. Ltd. Multi-time programmable device
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US20150279479A1 (en) * 2014-04-01 2015-10-01 Qualcomm Incorporated Anti-fuse one-time programmable resistive random access memories
US9876123B2 (en) * 2014-07-16 2018-01-23 Qualcomm Incorporated Non-volatile one-time programmable memory device
US20160093672A1 (en) * 2014-09-26 2016-03-31 Qualcomm Incorporated Logic high-k/metal gate 1t-1c rram mtp/otp devices
US9496048B2 (en) * 2015-03-12 2016-11-15 Qualcomm Incorporated Differential one-time-programmable (OTP) memory array
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US10629577B2 (en) 2017-03-16 2020-04-21 Invensas Corporation Direct-bonded LED arrays and applications
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US11031407B2 (en) * 2018-08-30 2021-06-08 Taiwan Semiconductor Manufacturing Company Ltd. Anti-fuse device, circuit, methods, and layout
WO2020042078A1 (zh) * 2018-08-30 2020-03-05 深圳市为通博科技有限责任公司 存储单元、存储器件以及存储单元的操作方法
KR102609372B1 (ko) 2018-08-31 2023-12-06 삼성전자주식회사 반도체 소자
US10763269B2 (en) * 2018-10-28 2020-09-01 Taiwan Semiconductor Manufacturing Co., Ltd. Anti-fuse cell and chip having anti-fuse cells
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US11901281B2 (en) 2019-03-11 2024-02-13 Adeia Semiconductor Bonding Technologies Inc. Bonded structures with integrated passive component
US11094701B2 (en) * 2019-07-17 2021-08-17 Taiwan Semiconductor Manufacturing Company Ltd. Layout structure of storage cell and method thereof
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TWI764371B (zh) * 2019-12-31 2022-05-11 台灣積體電路製造股份有限公司 積體電路元件、生成積體電路佈局圖的方法以及電子設計自動化系統
TWI734452B (zh) * 2020-04-23 2021-07-21 友達光電股份有限公司 記憶體裝置以及寫入方法
US11094388B1 (en) * 2020-07-20 2021-08-17 Winbond Electronics Corp. Anti-fuse device and program method using the same
US11282960B2 (en) * 2020-08-04 2022-03-22 Nanya Technology Corporation Semiconductor device with programmable element and method for fabricating the same
US11799001B2 (en) * 2021-03-09 2023-10-24 Taiwan Semiconductor Manufacturing Company, Ltd. Back-end-of-line devices
US11670587B2 (en) * 2021-04-16 2023-06-06 Nanya Technology Corporation Semiconductor device with copper-manganese liner and method for forming the same
CN115224034B (zh) * 2021-04-16 2025-09-09 联华电子股份有限公司 一次性可编程存储器结构
CN116113238A (zh) 2021-09-16 2023-05-12 联华电子股份有限公司 半导体存储器结构及其制作方法
CN115148703A (zh) * 2022-06-29 2022-10-04 上海集成电路装备材料产业创新中心有限公司 互连结构及其制备方法
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Also Published As

Publication number Publication date
CN104396014A (zh) 2015-03-04
KR20150033690A (ko) 2015-04-01
US20140001568A1 (en) 2014-01-02
EP2867922A2 (en) 2015-05-06
WO2014004770A2 (en) 2014-01-03
CN104396014B (zh) 2018-10-09
WO2014004770A3 (en) 2014-03-27
US9502424B2 (en) 2016-11-22

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