JP2015159197A - 配線基板及びその製造方法 - Google Patents
配線基板及びその製造方法 Download PDFInfo
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Abstract
【解決手段】本配線基板は、絶縁層と、前記絶縁層上に形成された配線層と、前記配線層上に形成された第1金属層と、前記配線層及び前記第1金属層を覆い、前記第1金属層の上面の一部を露出する開口部を備えたソルダーレジスト層と、前記開口部内に露出する前記第1金属層の上面に形成された第2金属層と、前記第2金属層上に形成された第3金属層と、を有し、前記ソルダーレジスト層は、前記第1金属層の上面の外周部を被覆し、前記開口部内に内に前記第1金属層の上面の一部を露出し、前記第2金属層の上面は、前記ソルダーレジスト層の上面と面一であるか、又は、前記ソルダーレジスト層の上面から突出している。
【選択図】図1
Description
まず、本実施の形態に係る配線基板の構造について説明する。図1は、本実施の形態に係る配線基板を例示する断面図である。なお、図1(b)は図1(a)のA部の拡大図である。
次に、本実施の形態に係る配線基板の製造方法について説明する。図2〜図4は、本実施の形態に係る配線基板の製造工程を例示する図である。なお、本実施の形態では、配線基板となる複数の部分を作製し、その後個片化して各配線基板とする工程の例を示すが、1個ずつ配線基板を作製する工程としてもよい。
本実施の形態の応用例では、本実施の形態に係る配線基板に半導体チップを搭載した半導体パッケージの例を示す。なお、本実施の形態の応用例において、既に説明した実施の形態と同一構成部品についての説明は省略する場合がある。
10 コア層
10x 貫通孔
11 貫通配線
12、14、16、22、24、26 配線層
13、15、23、25 絶縁層
13x、15x、23x、25x ビアホール
16a シード層
16b 電解めっき層
17、27 ソルダーレジスト層
17x、27x、200x 開口部
18、19、20 金属層
100 半導体パッケージ
110 半導体チップ
120、140 バンプ
130 アンダーフィル樹脂
200 レジスト層
Claims (10)
- 絶縁層と、
前記絶縁層上に形成された配線層と、
前記配線層上に形成された第1金属層と、
前記配線層及び前記第1金属層を覆い、前記第1金属層の上面の一部を露出する開口部を備えたソルダーレジスト層と、
前記開口部内に露出する前記第1金属層の上面に形成された第2金属層と、
前記第2金属層上に形成された第3金属層と、を有し、
前記ソルダーレジスト層は、前記第1金属層の上面の外周部を被覆し、前記開口部内に内に前記第1金属層の上面の一部を露出し、
前記第2金属層の上面は、前記ソルダーレジスト層の上面と面一であるか、又は、前記ソルダーレジスト層の上面から突出している配線基板。 - 前記第2金属層の上面は、前記ソルダーレジスト層の上面から突出し、
前記第2金属層の突出部の外周側は、前記開口部の周囲の前記ソルダーレジスト層の上面に環状に延在している請求項1記載の配線基板。 - 前記第3金属層は、前記第2金属層の突出部の上面及び側面を覆っている請求項2記載の配線基板。
- 前記第1金属層は銅から形成され、前記第2金属層はニッケルから形成されている請求項1乃至3の何れか一項記載の配線基板。
- 前記第3金属層は、単一層又は複数層から構成され、前記単一層又は前記複数層中の最外層は金から形成されている請求項1乃至4の何れか一項記載の配線基板。
- 前記第1金属層は、半導体チップと電気的に接続されるパッドとなる請求項1乃至5の何れか一項記載の配線基板。
- 絶縁層上に配線層及び第1金属層を積層形成する工程と、
前記絶縁層上に、前記配線層及び前記第1金属層を覆うようにソルダーレジスト層を形成する工程と、
前記ソルダーレジスト層に、前記第1金属層の上面の一部を露出する開口部を形成する工程と、
前記開口部内に露出する前記第1金属層の上面に第2金属層を形成する工程と、
前記第2金属層上に第3金属層を形成する工程と、を有し、
前記開口部を形成する工程では、前記ソルダーレジスト層が、前記第1金属層の上面の外周部を被覆し、前記開口部内に内に前記第1金属層の上面の一部を露出し、
前記第2金属層を形成する工程では、前記第2金属層の上面が、前記ソルダーレジスト層の上面と面一であるか、又は、前記ソルダーレジスト層の上面から突出する配線基板の製造方法。 - 前記積層形成する工程は、
前記絶縁層上にシード層を形成する工程と、
前記シード層を給電層とする電解めっき法により前記シード層上に前記配線層の一部となる電解めっき層を選択的に形成する工程と、
前記シード層を給電層とする電解めっき法により前記電解めっき層上に前記第1金属層を選択的に形成する工程と、
前記電解めっき層に覆われていない部分の前記シード層を除去する工程と、を含む請求項7記載の配線基板の製造方法。 - 前記第1金属層を選択的に形成する工程は、
前記シード層上及び前記電解めっき層上に、前記第1金属層に対応する開口部を備えたレジスト層を形成する工程と、
前記シード層を給電層に利用した電解めっき法により、前記レジスト層の開口部内に露出する前記電解めっき層上に前記第1金属層を形成する工程と、
前記レジスト層を除去する工程と、を含む請求項8記載の配線基板の製造方法。 - 前記第2金属層を形成する工程では、等方的に成長するめっきにより、前記第2金属層の上面を前記ソルダーレジスト層の上面から突出させ、前記第2金属層の突出部の外周側を前記開口部の周囲の前記ソルダーレジスト層の上面に環状に延在させる請求項7乃至9の何れか一項記載の配線基板の製造方法。
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JP2014033379A JP2015159197A (ja) | 2014-02-24 | 2014-02-24 | 配線基板及びその製造方法 |
US14/583,230 US9334576B2 (en) | 2014-02-24 | 2014-12-26 | Wiring substrate and method of manufacturing wiring substrate |
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CN107611036A (zh) * | 2016-07-12 | 2018-01-19 | 碁鼎科技秦皇岛有限公司 | 封装基板及其制作方法、封装结构 |
DE102017101185B4 (de) * | 2017-01-23 | 2020-07-16 | Infineon Technologies Ag | Ein Halbleitermodul umfassend Transistorchips, Diodenchips und Treiberchips, angeordnet in einer gemeinsamen Ebene, Verfahren zu dessen Herstellung und integriertes Leistungsmodul |
KR102531762B1 (ko) | 2017-09-29 | 2023-05-12 | 엘지이노텍 주식회사 | 인쇄회로기판 및 이의 제조 방법 |
US10347507B2 (en) * | 2017-09-29 | 2019-07-09 | Lg Innotek Co., Ltd. | Printed circuit board |
CN110783728A (zh) * | 2018-11-09 | 2020-02-11 | 广州方邦电子股份有限公司 | 一种柔性连接器及制作方法 |
JP7238712B2 (ja) * | 2019-09-18 | 2023-03-14 | トヨタ自動車株式会社 | 配線基板の製造方法および配線基板 |
US11227823B2 (en) * | 2020-04-20 | 2022-01-18 | Advanced Semiconductor Engineering, Inc. | Wiring structure |
US20220069489A1 (en) * | 2020-08-28 | 2022-03-03 | Unimicron Technology Corp. | Circuit board structure and manufacturing method thereof |
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