TWI771573B - 配線基板、半導體裝置及配線基板的製造方法 - Google Patents

配線基板、半導體裝置及配線基板的製造方法 Download PDF

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TWI771573B
TWI771573B TW108109521A TW108109521A TWI771573B TW I771573 B TWI771573 B TW I771573B TW 108109521 A TW108109521 A TW 108109521A TW 108109521 A TW108109521 A TW 108109521A TW I771573 B TWI771573 B TW I771573B
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wiring board
insulating layer
connection terminal
layer
conductive layer
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TW108109521A
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TW201944505A (zh
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竹內浩文
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日商新光電氣工業股份有限公司
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Abstract

〔課題〕提供不僅可獲得良好的導電性和機械強度還可進行微細化的配線基板、半導體裝置及配線基板的製造方法。 〔解決手段〕配線基板100具有：絕緣層130；及具備第1表面132A和與第1表面132A相交的側面、且第1表面132A從絕緣層130露出了的連接端子132。絕緣層130內形成了沿著連接端子132的側面的至少一部分的空隙133。

Description

配線基板、半導體裝置及配線基板的製造方法
本發明涉及配線基板、半導體裝置及配線基板的製造方法。
製造配線基板時，以覆蓋導電墊的方式形成阻焊層，在阻焊層上形成露出導電墊的開口部，並形成了經由開口部而突出的導電柱。此外，藉由實裝半導體晶片(芯片)等電子部件而製造半導體裝置時，還使用焊球等對導電柱和電子部件的導電墊進行了接合(結合)。 〔先前技術文獻〕 〔專利文獻〕
〔專利文獻1〕(日本)特開2014-33067號公報
〔發明欲解決的課題〕
近年，存在對半導體裝置和配線基板進行進一步微細化的需求，但難以在可獲得良好的導電性和機械強度的同時對先前的配線基板進行微細化。
本發明的目的在於，提供不僅可獲得良好的導電性和機械強度還可同時進行微細化的配線基板、半導體裝置及配線基板的製造方法。 〔用於解決課題的手段〕
配線基板的一個形態具有：絕緣層；及具備第1表面和與上述第1表面相交的側面、且上述第1表面從上述絕緣層露出了的連接端子。上述絕緣層內形成了沿著上述側面的至少一部分的空隙。 〔發明的效果〕
根據公開的技術，不僅可獲得良好的導電性和機械強度還可同時進行微細化。
以下，參照添附的圖示對實施方式進行具體說明。需要說明的是，本說明書和圖示中，對實質上具有相同功能構成的構成要素賦予了相同的符號，藉此對重複說明進行了省略。 (第1實施方式)
對第1實施方式進行說明。第1實施方式涉及配線基板。 [配線基板的結構]
首先，對配線基板的結構進行說明。圖1是第1實施方式的配線基板的結構示意圖。圖1(a)是斷面圖，圖1(b)是平面圖。圖1(a)相當於沿著圖1(b)中的I-I線的斷面圖。
如圖1所示，第1實施方式的配線基板100具有導電層120、絕緣層130、連接端子132、及薄箔113。連接端子132具有第1表面132A和與第1表面132A相交的側面，第1表面132A從絕緣層130進行了露出。絕緣層130內形成了沿著連接端子132的側面的空隙133。
作為絕緣層130的材料，例如可使用以環氧系樹脂、酰亞胺系樹脂、苯酚系樹脂、氰酸系樹脂等為主成分的熱硬化性非感光樹脂。作為絕緣層130的材料，例如也可使用以環氧系樹脂、苯酚系樹脂、合成橡膠等為主成分的熱硬化性感光樹脂。作為連接端子132，例如可使用銅(Cu)柱(post)。
導電層120設置在絕緣層130內，並與連接端子132進行了連接。導電層120除了與連接端子132連接的連接部122之外還具有微細配線121和導電墊123。例如，連接部122和導電墊123經由微細配線121進行了電氣連接。
第1表面132A從絕緣層130的第1表面130A進行了露出，連接端子132的直徑距離第1表面132A越遠越小。導電層120從第1表面130A的相反側的第2表面130B進行了露出。第2表面130B被薄箔113進行了覆蓋，導電層120與薄箔113相接(接觸)。導電層120和薄箔113的材料例如可使用銅等金屬。 [使用配線基板來製造半導體封裝體的方法]
接下來，對使用配線基板100來製造半導體封裝體的方法進行說明。圖2是表示使用配線基板100來製造半導體封裝體的方法的斷面圖。
首先，準備具有電極墊501的半導體晶片500，使焊球位於電極墊501和連接端子132之間以進行回流(reflow)。其結果為，如圖2(a)所示，焊球溶融，其一部分流入空隙133，並在空隙133內凝固，由此能以覆蓋連接端子132的第1表面132A和側面的方式形成焊料層502。此外，藉由焊料層502，連接端子132和電極墊501可被接合。接下來，採用環氧樹脂等的密封樹脂510對半導體晶片500進行密封。需要說明的是，也可實裝電容器、電阻器等的電子部件，以取代半導體晶片500。
之後，如圖2(b)所示，對薄箔113進行剝離，並在導電墊123上搭載焊球520。作為焊球520和焊料層502的材料，可列舉出錫銀(SnAg)系合金、錫鋅(SnZn)系合金、及錫銅(SnCu)系合金等的無鉛焊料、以及鉛錫(PbSn)系合金等的有鉛焊料。
這樣就可製造半導體封裝體530。半導體封裝體530是半導體裝置的一例。
這裡，藉由與兩個參考例進行比較，對本實施方式的配線基板100的效果進行說明。圖3是表示配線基板的參考例的斷面圖。
圖3(a)所示的第1參考例中，不含連接端子132，連接部122上設置有焊料凸點181。對第1參考例和配線基板100進行比較可知，就半導體晶片實裝後的焊料和銅的接合面積而言，配線基板100中較大。此外，在拉拔半導體晶片的方向的載荷發生作用的情況下，第1參考例中，僅在與該方向垂直的面上焊料凸點(bump)181和連接部122相接，然而，配線基板100中，如圖2(a)所示，焊料層502沿連接端子132的側面繞至第1表面132A的裡側。為此，連接端子132可阻礙焊料層502的脫離，半導體晶片也難以脫離。故配線基板100在機械強度方面與第1參考例相比，較為有利。另外，銅的導電率遠高於焊料的導電率，故配線基板100在電流通路的電阻方面與第1參考例相比，也較為有利。
圖3(b)所示的第2參考例中，與連接部122連接的配線層191形成在絕緣層130上，阻焊層190被形成為覆蓋配線層191。阻焊層190上形成了使配線層191的一部分露出的開口部192。對第2參考例和配線基板100進行比較可知，第2參考例中，整體厚度上增加了阻焊層190的厚度的量，故配線基板100在厚度(薄化)方面與第2參考例相比，較為有利。另外，為了製造第2參考例的配線基板，需要進行與阻焊層190的形成有關的塗敷、曝光、顯影、硬化等的處理，故配線基板100在工時數和成本方面與第2參考例相比，也較為有利。 [配線基板的製造方法]
接下來，對配線基板的製造方法進行說明。圖4和圖5是表示第1實施方式的配線基板的製造方法的斷面圖。
首先，如圖4(a)所示，準備最外層為金屬箔的支撐體110。作為支撐體110，例如可使用在預浸料坯(prepreg)111上層疊有帶載體的金屬箔(metal foil with a carrier)114的部件。支撐體110的厚度例如可為18μm~100μm左右。
預浸料坯111例如可為使環氧系樹脂等的絕緣樹脂含浸於玻璃纖維、芳綸纖維等的織布、不織布等(未圖示)的預浸料坯。帶載體的金屬箔114可為，在由銅等的金屬箔構成的厚度為10μm~50μm左右的厚箔(載體箔)112上，隔著剝離層(未圖示)，使由銅等的金屬箔構成的厚度為1.5μm~5μm左右的薄箔113在可剝離的狀態下進行了貼著(貼附)的部件。厚箔112作為支撐材而被設置，該支撐材用於使對薄箔113的處理更容易。厚箔112的下表面接著(黏接)在預浸料坯111的上表面上。
如圖4(a)所示，帶載體的金屬箔114設置在支撐體110的兩個表面上，隨後的處理在兩個帶載體的金屬箔114上進行。但需要說明的是，從圖4(b)開始僅圖示了一個帶載體的金屬箔114。
準備了支撐體110之後，如圖4(b)所示，在支撐體110的薄箔113的上表面上，形成包括微細配線121、連接部122、及導電墊123的導電層120。具體而言，例如在支撐體110的薄箔113的上表面上，形成一於形成導電層120的部分處具有開口部的光阻層(乾膜光阻等)。然後，藉由將帶載體的金屬箔114利用為鍍覆供電層的電解鍍法，在光阻層的開口部內露出的薄箔113的上表面上使銅等析出，由此可形成導電層120。之後，使用剝離液對光阻層進行剝離，據此可在支撐體110的薄箔113的上表面上，形成包含微細配線121、連接部122、及導電墊123的導電層120。
然後，如圖4(c)所示，在薄箔113上形成覆蓋導電層120的絕緣層130。作為絕緣層130的材料，如上所述，例如可使用熱硬化性非感光樹脂或感光樹脂。
接下來，如圖4(d)所示，藉由雷射光(激光)的照射，在絕緣層130內形成達至連接部122的導通孔(via hole)131。然後，藉由除渣(desmear)處理，對在導通孔131內露出的連接部122上所附著的絕緣層130的殘渣進行去除，並對連接部122的表面和導通孔131的內表面進行粗糙化(粗化)。
之後，如圖5(a)所示，在導通孔131內的連接部122之上形成連接端子132。例如，可藉由將帶載體的金屬箔114利用為鍍覆供電層的電解鍍法來形成連接端子132。連接端子132只要形成在導通孔131內即可，不需要形成至絕緣層130之上，故不需要進行種子(seed)層的形成、鍍覆光阻圖案的形成等。
接下來，藉由向連接端子132的周邊(周圍)照射雷射光，如圖5(b)所示，可形成沿著連接端子132的側面的空隙133。亦可藉由電漿(plasma(等離子))處理等形成空隙133。
之後，如圖5(c)所示，從圖5(b)所示的結構體上去除支撐體110的一部分。具體而言，向支撐體110施加機械力，使帶載體的金屬箔114的薄箔113和厚箔112的界面發生剝離。如前所述，帶載體的金屬箔114具有在薄箔113上隔著剝離層(未圖示)貼著了厚箔112的結構，故厚箔112易於與剝離層(未圖示)一起從薄箔113上進行剝離。
據此，僅薄箔113殘留在絕緣層130側，構成支撐體110的其他部件(預浸料坯111和厚箔112)都被進行了去除。除了厚箔112與剝離層一起從薄箔113上進行剝離的情況之外，也存在剝離層內發生凝集破壞、使厚箔112從薄箔113進行剝離的情況。此外，還存在藉由使厚箔112從剝離層上進行剝離，從而使厚箔112從薄箔113上進行剝離的情況。
這樣就可製造第1實施方式的配線基板100。 (第2實施方式)
接下來，對第2實施方式進行說明。第2實施方式涉及配線基板。圖6是表示第2實施方式的配線基板的斷面圖。
如圖6所示，第2實施方式的配線基板200取代連接端子132具有連接端子232。連接端子132的第1表面132A位於與絕緣層130的第1表面130A實質相同的平面上，而連接端子232的第1表面232A則位於比第1表面130A還深的位置。即，第1表面232A從第1表面130A進行了後退，空隙133的內側存在凹陷。其他構成都與第1實施方式的配線基板100相同。
藉由第2實施方式的配線基板200，也可獲得與配線基板100相同的效果。另外，連接端子232的第1表面232A位於比第1表面130A還深的位置，故進行半導體晶片等的電子部件的實裝時，難以使焊球從連接端子232上發生位置偏移。此外，與第1實施方式的配線基板100相比，還可使實裝後的半導體裝置的厚度變薄。
連接端子232與連接端子132同樣，可藉由將帶載體的金屬箔114利用為鍍覆供電層的電解鍍法而形成，只要在導通孔131被鍍膜充滿之前停止成膜即可。 (第3實施方式)
接下來，對第3實施方式進行說明。第3實施方式涉及配線基板。圖7是表示第3實施方式的配線基板的平面圖。
如圖7所示，第3實施方式的配線基板300中，絕緣層130內取代空隙133形成了空隙333。空隙133沿連接端子132的側面的整面而形成，但空隙333則僅形成在連接端子132的側面的一部分上。例如，如該圖所示，可採用在相鄰的兩個連接端子132之間不形成空隙的方式形成空隙333。其他構成均與第1實施方式的配線基板100相同。
藉由第3實施方式的配線基板300，也可獲得與配線基板100相同的效果。另外，就相鄰的兩個連接端子132而言，空隙333被形成為，在平面圖中被另一個連接端子132進行了隱藏，故當進行半導體晶片等的電子部件的實裝時，可使焊料層502難以流至另一個連接端子132側。
空隙333與空隙133同樣，可藉由雷射光的照射而形成，只要對雷射光的照射位置進行調整即可。
需要說明的是，並不需要在導電層120上分別設置連接部122和導電墊123，如圖8所示，也可使連接部122兼作導電墊，並在連接部122上搭載焊球520。圖8中盡管示出了第1實施方式的變形例，但同樣也適用於第2、第3實施方式。
以上對較佳實施方式等進行了詳細說明，但並不限定於上述實施方式等，只要不脫離申請專利範圍記載的範疇，還可對上述實施方式等進行各種各樣的變形和置換。
100‧‧‧配線基板 120‧‧‧導電層 122‧‧‧連接部 130‧‧‧絕緣層 132‧‧‧連接端子 132A‧‧‧第1表面 133‧‧‧空隙 500‧‧‧半導體晶片 501‧‧‧電極墊 502‧‧‧焊料層 510‧‧‧密封樹脂 530‧‧‧半導體封裝體
〔圖1(a)、(b)〕第1實施方式的配線基板的示意圖。 〔圖2(a)、(b)〕表示使用第1實施方式的配線基板來製造半導體封裝體(semiconductor package)的方法的斷面圖。 〔圖3(a)、(b)〕表示配線基板的參考例的斷面圖。 〔圖4(a)~(d)〕表示第1實施方式的配線基板的製造方法的斷面圖(其1)。 〔圖5(a)~(c)〕表示第1實施方式的配線基板的製造方法的斷面圖(其2)。 〔圖6〕表示第2實施方式的配線基板的斷面圖。 〔圖7〕表示第3實施方式的配線基板的平面圖。 〔圖8〕表示第1實施方式的變形例的斷面圖。
100‧‧‧配線基板
113‧‧‧薄箔
120‧‧‧導電層
121‧‧‧微細配線
122‧‧‧連接部
123‧‧‧導電墊
130‧‧‧絕緣層
130A‧‧‧絕緣層130的第1表面
130B‧‧‧絕緣層130的第2表面
132‧‧‧連接端子
132A‧‧‧連接端子132的第1表面
133‧‧‧空隙

Claims (6)

  1. 一種配線基板，其特徵在於，具有：絕緣層；連接端子，具有第1表面和與上述第1表面相交的側面，上述第1表面從上述絕緣層露出；及導電層，設置在上述絕緣層內，並與上述連接端子連接，其中，上述絕緣層內形成了沿著上述側面的至少一部分的空隙，上述連接端子的直徑沿遠離上述第1表面的方向逐漸減小，上述導電層從上述絕緣層的與露出上述連接端子的表面相反側的表面露出，上述連接端子的與上述第1表面相反側的整個第2表面接觸上述導電層。
  2. 如申請專利範圍第1項所述的配線基板，其特徵在於，上述空隙形成在上述側面的整面上。
  3. 如申請專利範圍第1項或第2項所述的配線基板，其特徵在於，上述第1表面位於比上述絕緣層的表面還深的位置。
  4. 一種半導體裝置，其特徵在於，具有：如申請專利範圍第1項至第3項中的任一項所述的配線基板；及實裝在上述配線基板上的半導體晶片，其中，上述半導體晶片具有與上述連接端子連接的電極墊。
  5. 一種配線基板的製造方法，其特徵在於，具有：在支撐體上形成導電層的步驟；在上述支撐體上形成覆蓋上述導電層的絕緣層； 在上述絕緣層內形成達至上述導電層導通孔的步驟；在上述導通孔內形成連接端子的步驟，其中，該連接端子具有第1表面和與上述第1表面相交的側面，上述第1表面從上述絕緣層露出；在上述絕緣層內形成沿著上述側面的至少一部分的空隙的步驟；及在形成上述空隙之後，去除上述支撐體的一部分的步驟，上述連接端子的直徑沿遠離上述第1表面的方向逐漸減小，上述導電層從上述絕緣層的與露出上述連接端子的表面相反側的表面露出，上述連接端子的與上述第1表面相反側的整個第2表面接觸上述導電層。
  6. 如申請專利範圍第5項所述的配線基板的製造方法，其特徵在於，藉由雷射光的照射形成上述空隙。
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