JP2015012048A - アクティブマトリクス基板およびその製造方法 - Google Patents

アクティブマトリクス基板およびその製造方法 Download PDF

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Publication number
JP2015012048A
JP2015012048A JP2013134433A JP2013134433A JP2015012048A JP 2015012048 A JP2015012048 A JP 2015012048A JP 2013134433 A JP2013134433 A JP 2013134433A JP 2013134433 A JP2013134433 A JP 2013134433A JP 2015012048 A JP2015012048 A JP 2015012048A
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Japan
Prior art keywords
film
electrode
source
wiring
gate
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Pending
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JP2013134433A
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Japanese (ja)
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JP2015012048A5 (enExample
Inventor
展昭 石賀
Nobuaki Ishiga
展昭 石賀
井上　和式
Kazunori Inoue
和式 井上
津村　直樹
Naoki Tsumura
直樹 津村
顕祐 長山
Kensuke Nagayama
顕祐 長山
伊藤　康悦
Yasuyoshi Ito
康悦 伊藤
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Mitsubishi Electric Corp
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Mitsubishi Electric Corp
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Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP2013134433A priority Critical patent/JP2015012048A/ja
Priority to US14/311,661 priority patent/US20150001530A1/en
Publication of JP2015012048A publication Critical patent/JP2015012048A/ja
Publication of JP2015012048A5 publication Critical patent/JP2015012048A5/ja
Priority to US15/354,217 priority patent/US10128270B2/en
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/027—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34
    • H01L21/0271—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers
    • H01L21/0273—Making masks on semiconductor bodies for further photolithographic processing not provided for in group H01L21/18 or H01L21/34 comprising organic layers characterised by the treatment of photoresist layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
    • H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/469—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After-treatment of these layers
    • H01L21/4757—After-treatment
    • H01L21/47573—Etching the layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/34—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies not provided for in groups H01L21/18, H10D48/04 and H10D48/07, with or without impurities, e.g. doping materials
    • H01L21/46—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428
    • H01L21/461—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/428 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/4763—Deposition of non-insulating, e.g. conductive -, resistive -, layers on insulating layers; After-treatment of these layers
    • H01L21/47635—After-treatment of these layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D30/00—Field-effect transistors [FET]
    • H10D30/60—Insulated-gate field-effect transistors [IGFET]
    • H10D30/67—Thin-film transistors [TFT]
    • H10D30/674—Thin-film transistors [TFT] characterised by the active materials
    • H10D30/6755—Oxide semiconductors, e.g. zinc oxide, copper aluminium oxide or cadmium stannate
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D64/00—Electrodes of devices having potential barriers
    • H10D64/60—Electrodes characterised by their materials
    • H10D64/62—Electrodes ohmically coupled to a semiconductor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0221—Manufacture or treatment of multiple TFTs comprising manufacture, treatment or patterning of TFT semiconductor bodies
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/01—Manufacture or treatment
    • H10D86/021—Manufacture or treatment of multiple TFTs
    • H10D86/0231—Manufacture or treatment of multiple TFTs using masks, e.g. half-tone masks
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/421—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer
    • H10D86/423—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs having a particular composition, shape or crystalline structure of the active layer comprising semiconductor materials not belonging to the Group IV, e.g. InGaZnO
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/441—Interconnections, e.g. scanning lines
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
    • H10D86/40—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs
    • H10D86/60—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates characterised by multiple TFTs wherein the TFTs are in active matrices
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
    • H10D99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K59/00—Integrated devices, or assemblies of multiple devices, comprising at least one organic light-emitting element covered by group H10K50/00
    • H10K59/10—OLED displays
    • H10K59/12—Active-matrix OLED [AMOLED] displays
    • H10K59/123—Connection of the pixel electrodes to the thin film transistors [TFT]

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Liquid Crystal (AREA)
JP2013134433A 2013-06-27 2013-06-27 アクティブマトリクス基板およびその製造方法 Pending JP2015012048A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP2013134433A JP2015012048A (ja) 2013-06-27 2013-06-27 アクティブマトリクス基板およびその製造方法
US14/311,661 US20150001530A1 (en) 2013-06-27 2014-06-23 Active matrix substrate and manufacturing method of the same
US15/354,217 US10128270B2 (en) 2013-06-27 2016-11-17 Active matrix substrate and manufacturing method of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2013134433A JP2015012048A (ja) 2013-06-27 2013-06-27 アクティブマトリクス基板およびその製造方法

Publications (2)

Publication Number Publication Date
JP2015012048A true JP2015012048A (ja) 2015-01-19
JP2015012048A5 JP2015012048A5 (enExample) 2016-08-04

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US (2) US20150001530A1 (enExample)
JP (1) JP2015012048A (enExample)

Families Citing this family (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN104155842A (zh) * 2014-07-18 2014-11-19 京东方科技集团股份有限公司 一种掩模板
DE102015108532A1 (de) 2015-05-29 2016-12-01 Osram Opto Semiconductors Gmbh Anzeigevorrichtung mit einer Mehrzahl getrennt voneinander betreibbarer Bildpunkte
CN106371256A (zh) * 2016-11-30 2017-02-01 京东方科技集团股份有限公司 像素结构、显示面板及显示装置
CN109326623B (zh) * 2017-07-31 2021-04-16 昆山国显光电有限公司 一种像素排列结构、显示面板及显示装置
CN108054140B (zh) * 2017-12-06 2020-11-06 深圳市华星光电技术有限公司 Ffs模式阵列基板的制造方法
CN108735664A (zh) * 2018-05-21 2018-11-02 武汉华星光电技术有限公司 非晶硅tft基板的制作方法
CN117116147A (zh) * 2019-11-04 2023-11-24 群创光电股份有限公司 电子装置

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007063966A1 (ja) * 2005-12-02 2007-06-07 Idemitsu Kosan Co., Ltd. Ｔｆｔ基板及びｔｆｔ基板の製造方法
JP2010028103A (ja) * 2008-06-17 2010-02-04 Semiconductor Energy Lab Co Ltd 薄膜トランジスタ及びその作製方法、並びに表示装置及びその作製方法
JP2011205119A (ja) * 2000-08-28 2011-10-13 Sharp Corp 薄膜トランジスタ
CN102629590A (zh) * 2012-02-23 2012-08-08 京东方科技集团股份有限公司 一种薄膜晶体管阵列基板及其制作方法
JP2013101232A (ja) * 2011-11-09 2013-05-23 Mitsubishi Electric Corp 配線構造及びそれを備える薄膜トランジスタアレイ基板並びに表示装置
JP2013525849A (ja) * 2010-04-26 2013-06-20 北京京東方光電科技有限公司 Ｆｆｓ型ｔｆｔ−ｌｃｄアレイ基板の製造方法

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5198377A (en) 1987-07-31 1993-03-30 Kinya Kato Method of manufacturing an active matrix cell
US4918504A (en) 1987-07-31 1990-04-17 Nippon Telegraph And Telephone Corporation Active matrix cell
JPH0797191B2 (ja) 1987-07-31 1995-10-18 日本電信電話株式会社 アクティブマトリクスセルおよびその製作方法
US6449026B1 (en) 1999-06-25 2002-09-10 Hyundai Display Technology Inc. Fringe field switching liquid crystal display and method for manufacturing the same
KR100325079B1 (ko) 1999-12-22 2002-03-02 주식회사 현대 디스플레이 테크놀로지 고개구율 및 고투과율 액정표시장치의 제조방법
JP2001311965A (ja) 2000-04-28 2001-11-09 Nec Corp アクティブマトリクス基板及びその製造方法
JP4090716B2 (ja) * 2001-09-10 2008-05-28 雅司 川崎 薄膜トランジスタおよびマトリクス表示装置
JP4164562B2 (ja) 2002-09-11 2008-10-15 独立行政法人科学技術振興機構 ホモロガス薄膜を活性層として用いる透明薄膜電界効果型トランジスタ
WO2003040441A1 (fr) 2001-11-05 2003-05-15 Japan Science And Technology Agency Film mince monocristallin homologue a super-reseau naturel, procede de preparation et dispositif dans lequel est utilise ledit film mince monocristallin
JP4522660B2 (ja) 2003-03-14 2010-08-11 シャープ株式会社 薄膜トランジスタ基板の製造方法
JP4483235B2 (ja) 2003-09-01 2010-06-16 カシオ計算機株式会社 トランジスタアレイ基板の製造方法及びトランジスタアレイ基板
KR101085132B1 (ko) * 2004-12-24 2011-11-18 엘지디스플레이 주식회사 수평 전계 박막 트랜지스터 기판 및 그 제조 방법
US7948171B2 (en) * 2005-02-18 2011-05-24 Semiconductor Energy Laboratory Co., Ltd. Light emitting device
KR101257811B1 (ko) * 2006-06-30 2013-04-29 엘지디스플레이 주식회사 액정표시장치용 어레이 기판과 그 제조방법
JP2008072011A (ja) 2006-09-15 2008-03-27 Toppan Printing Co Ltd 薄膜トランジスタの製造方法
WO2008117482A1 (ja) 2007-03-22 2008-10-02 Kabushiki Kaisha Toshiba 真空成膜装置用部品及び真空成膜装置
KR101446249B1 (ko) 2007-12-03 2014-10-01 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체장치 제조방법
CN101620374A (zh) * 2008-05-20 2010-01-06 Nec液晶技术株式会社 灰色调曝光用掩模、使用该掩模的tft基板的制造方法和具有该tft基板的液晶显示装置
JP2010118407A (ja) 2008-11-11 2010-05-27 Idemitsu Kosan Co Ltd エッチング耐性を有する薄膜トランジスタ、及びその製造方法
DE102009047125A1 (de) 2009-11-25 2011-05-26 Dieffenbacher Gmbh + Co. Kg Anlage und Verfahren zur Formung einer Streugutmatte aus Streugut auf einem Formband im Zuge der Herstellung von Werkstoffplatten
JP2012118199A (ja) * 2010-11-30 2012-06-21 Panasonic Liquid Crystal Display Co Ltd 液晶パネル、液晶表示装置、及びその製造方法
JP5865634B2 (ja) * 2011-09-06 2016-02-17 三菱電機株式会社 配線膜の製造方法
JP6033071B2 (ja) * 2011-12-23 2016-11-30 株式会社半導体エネルギー研究所 半導体装置

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2011205119A (ja) * 2000-08-28 2011-10-13 Sharp Corp 薄膜トランジスタ
WO2007063966A1 (ja) * 2005-12-02 2007-06-07 Idemitsu Kosan Co., Ltd. Ｔｆｔ基板及びｔｆｔ基板の製造方法
JP2010028103A (ja) * 2008-06-17 2010-02-04 Semiconductor Energy Lab Co Ltd 薄膜トランジスタ及びその作製方法、並びに表示装置及びその作製方法
JP2013525849A (ja) * 2010-04-26 2013-06-20 北京京東方光電科技有限公司 Ｆｆｓ型ｔｆｔ−ｌｃｄアレイ基板の製造方法
JP2013101232A (ja) * 2011-11-09 2013-05-23 Mitsubishi Electric Corp 配線構造及びそれを備える薄膜トランジスタアレイ基板並びに表示装置
CN102629590A (zh) * 2012-02-23 2012-08-08 京东方科技集团股份有限公司 一种薄膜晶体管阵列基板及其制作方法

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US10128270B2 (en) 2018-11-13
US20170069665A1 (en) 2017-03-09
US20150001530A1 (en) 2015-01-01

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