JP2012146368A5 - - Google Patents
Download PDFInfo
- Publication number
- JP2012146368A5 JP2012146368A5 JP2011004830A JP2011004830A JP2012146368A5 JP 2012146368 A5 JP2012146368 A5 JP 2012146368A5 JP 2011004830 A JP2011004830 A JP 2011004830A JP 2011004830 A JP2011004830 A JP 2011004830A JP 2012146368 A5 JP2012146368 A5 JP 2012146368A5
- Authority
- JP
- Japan
- Prior art keywords
- resistance state
- dram
- lower electrode
- nitride
- memory
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 229910052751 metal Inorganic materials 0.000 description 2
- 239000002184 metal Substances 0.000 description 2
- 229910052721 tungsten Inorganic materials 0.000 description 2
- 239000010937 tungsten Substances 0.000 description 2
- NRTOMJZYCJJWKI-UHFFFAOYSA-N Titanium nitride Chemical compound [Ti]#N NRTOMJZYCJJWKI-UHFFFAOYSA-N 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 150000004767 nitrides Chemical class 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- MZLGASXMSKOWSE-UHFFFAOYSA-N tantalum nitride Chemical compound [Ta]#N MZLGASXMSKOWSE-UHFFFAOYSA-N 0.000 description 1
- WFKWXMTUELFFGS-UHFFFAOYSA-N tungsten Chemical compound [W] WFKWXMTUELFFGS-UHFFFAOYSA-N 0.000 description 1
- -1 tungsten nitride Chemical class 0.000 description 1
Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011004830A JP5598338B2 (ja) | 2011-01-13 | 2011-01-13 | 記憶装置およびその動作方法 |
| US13/337,969 US9019755B2 (en) | 2011-01-13 | 2011-12-27 | Memory unit and method of operating the same |
| CN201210009739XA CN102592656A (zh) | 2011-01-13 | 2012-01-13 | 存储装置和其操作方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2011004830A JP5598338B2 (ja) | 2011-01-13 | 2011-01-13 | 記憶装置およびその動作方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2012146368A JP2012146368A (ja) | 2012-08-02 |
| JP2012146368A5 true JP2012146368A5 (cg-RX-API-DMAC7.html) | 2014-02-13 |
| JP5598338B2 JP5598338B2 (ja) | 2014-10-01 |
Family
ID=46481171
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2011004830A Expired - Fee Related JP5598338B2 (ja) | 2011-01-13 | 2011-01-13 | 記憶装置およびその動作方法 |
Country Status (3)
| Country | Link |
|---|---|
| US (1) | US9019755B2 (cg-RX-API-DMAC7.html) |
| JP (1) | JP5598338B2 (cg-RX-API-DMAC7.html) |
| CN (1) | CN102592656A (cg-RX-API-DMAC7.html) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US9053784B2 (en) | 2012-04-12 | 2015-06-09 | Micron Technology, Inc. | Apparatuses and methods for providing set and reset voltages at the same time |
| WO2014087784A1 (ja) * | 2012-12-03 | 2014-06-12 | ソニー株式会社 | 記憶素子および記憶装置 |
| CN104871314B (zh) * | 2012-12-25 | 2019-03-08 | 索尼半导体解决方案公司 | 存储元件和存储装置 |
| KR102151183B1 (ko) | 2014-06-30 | 2020-09-02 | 삼성전자주식회사 | 저항성 메모리 장치 및 저항성 메모리 장치의 동작방법 |
| JP6457792B2 (ja) * | 2014-11-19 | 2019-01-23 | ルネサスエレクトロニクス株式会社 | 半導体記憶装置 |
| WO2016143383A1 (ja) * | 2015-03-09 | 2016-09-15 | ソニー株式会社 | メモリセルおよび記憶装置 |
| CN115762599A (zh) | 2017-01-20 | 2023-03-07 | 合肥睿科微电子有限公司 | 阻变式随机存取存储器电路及其操作方法 |
| US10002665B1 (en) * | 2017-04-05 | 2018-06-19 | Arm Ltd. | Memory devices formed from correlated electron materials |
| US11164627B2 (en) * | 2019-01-25 | 2021-11-02 | Micron Technology, Inc. | Polarity-written cell architectures for a memory device |
| CN110739012B (zh) * | 2019-09-12 | 2021-07-20 | 杭州未名信科科技有限公司 | 存储阵列块及半导体存储器 |
| US10978149B1 (en) * | 2020-05-12 | 2021-04-13 | Winbond Electronics Corp. | Resistive memory apparatus and adjusting method for write-in voltage thereof |
Family Cites Families (14)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6590807B2 (en) * | 2001-08-02 | 2003-07-08 | Intel Corporation | Method for reading a structural phase-change memory |
| KR100634330B1 (ko) * | 2002-08-14 | 2006-10-16 | 인텔 코포레이션 | 구조적인 위상 변화 메모리 셀의 동작 방법, 집적 회로 및장치 |
| JP2005032401A (ja) * | 2003-06-17 | 2005-02-03 | Sharp Corp | 不揮発性半導体記憶装置及びその書き込み方法と消去方法 |
| JP4830275B2 (ja) * | 2004-07-22 | 2011-12-07 | ソニー株式会社 | 記憶素子 |
| JP2006099866A (ja) * | 2004-09-29 | 2006-04-13 | Sony Corp | 記憶装置及び半導体装置 |
| JP4815804B2 (ja) | 2005-01-11 | 2011-11-16 | ソニー株式会社 | 記憶素子及び記憶装置 |
| JP4475174B2 (ja) * | 2005-06-09 | 2010-06-09 | ソニー株式会社 | 記憶装置 |
| US7345907B2 (en) * | 2005-07-11 | 2008-03-18 | Sandisk 3D Llc | Apparatus and method for reading an array of nonvolatile memory cells including switchable resistor memory elements |
| US7460389B2 (en) * | 2005-07-29 | 2008-12-02 | International Business Machines Corporation | Write operations for phase-change-material memory |
| US8058636B2 (en) | 2007-03-29 | 2011-11-15 | Panasonic Corporation | Variable resistance nonvolatile memory apparatus |
| US7890892B2 (en) * | 2007-11-15 | 2011-02-15 | International Business Machines Corporation | Balanced and bi-directional bit line paths for memory arrays with programmable memory cells |
| JP5549105B2 (ja) * | 2009-04-15 | 2014-07-16 | ソニー株式会社 | 抵抗変化型メモリデバイスおよびその動作方法 |
| JP5149414B2 (ja) | 2010-07-16 | 2013-02-20 | シャープ株式会社 | 半導体記憶装置およびその駆動方法 |
| JP2013004151A (ja) * | 2011-06-20 | 2013-01-07 | Toshiba Corp | 半導体記憶装置 |
-
2011
- 2011-01-13 JP JP2011004830A patent/JP5598338B2/ja not_active Expired - Fee Related
- 2011-12-27 US US13/337,969 patent/US9019755B2/en not_active Expired - Fee Related
-
2012
- 2012-01-13 CN CN201210009739XA patent/CN102592656A/zh active Pending
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JP2012146368A5 (cg-RX-API-DMAC7.html) | ||
| TWI338896B (en) | Nonvolatile memory device and control method thereof | |
| Niu et al. | Design of cross-point metal-oxide ReRAM emphasizing reliability and cost | |
| JP7471422B2 (ja) | メモリセルの三状態プログラミング | |
| JP2005267837A5 (cg-RX-API-DMAC7.html) | ||
| JP5839201B2 (ja) | 半導体装置および情報読出方法 | |
| US10269404B2 (en) | Resistance change memory | |
| TW202022871A (zh) | 程式化一記憶體單元之技術 | |
| CN107086049A (zh) | 电阻式随机存取存储器阵列的操作方法与集成电路芯片 | |
| CN110544500A (zh) | 随机码产生器及相关随机码产生方法 | |
| CN110223725B (zh) | 一种非易失性随机存储器数据读取电路、存储器及方法 | |
| JP2016157873A5 (cg-RX-API-DMAC7.html) | ||
| CN102568565A (zh) | 存储装置 | |
| US20180268878A1 (en) | Non-volatile semiconductor memory device | |
| US7064970B2 (en) | Serial transistor-cell array architecture | |
| US9754666B2 (en) | Resistive ratio-based memory cell | |
| CN109427374B (zh) | 半导体存储装置 | |
| US11205681B2 (en) | Memory for embedded applications | |
| CN107993683B (zh) | 感测放大器、存储装置以及包括其的系统 | |
| JP2015130437A (ja) | 半導体装置およびデータ書き込み方法 | |
| KR101883378B1 (ko) | 반도체 메모리 장치 | |
| JP2009252283A (ja) | 半導体記憶装置 | |
| JP2009004074A5 (cg-RX-API-DMAC7.html) | ||
| JP6121580B2 (ja) | 抵抗性メモリ装置及びその読み取り方法 | |
| Nakhkash et al. | Designing a differential 3R-2bit RRAM cell for enhancing read margin in cross-point RRAM arrays |