JP2012038996A - 半導体装置の製造方法および半導体装置 - Google Patents
半導体装置の製造方法および半導体装置 Download PDFInfo
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- 239000004065 semiconductor Substances 0.000 title claims abstract description 91
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 27
- 239000000758 substrate Substances 0.000 claims abstract description 85
- 230000004888 barrier function Effects 0.000 claims abstract description 29
- 239000002184 metal Substances 0.000 claims abstract description 15
- 229910052751 metal Inorganic materials 0.000 claims abstract description 15
- 238000000034 method Methods 0.000 claims description 15
- 238000005530 etching Methods 0.000 claims description 10
- 239000000203 mixture Substances 0.000 claims description 7
- 238000001039 wet etching Methods 0.000 claims description 4
- 239000005373 porous glass Substances 0.000 claims description 2
- 239000000463 material Substances 0.000 claims 3
- 238000009713 electroplating Methods 0.000 claims 2
- 238000005121 nitriding Methods 0.000 claims 1
- 230000003247 decreasing effect Effects 0.000 abstract 1
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 9
- 229910052710 silicon Inorganic materials 0.000 description 9
- 239000010703 silicon Substances 0.000 description 9
- 238000005229 chemical vapour deposition Methods 0.000 description 6
- 229910052581 Si3N4 Inorganic materials 0.000 description 4
- 239000011521 glass Substances 0.000 description 4
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 4
- 238000002161 passivation Methods 0.000 description 3
- 230000015572 biosynthetic process Effects 0.000 description 2
- 125000000896 monocarboxylic acid group Chemical group 0.000 description 2
- 230000001681 protective effect Effects 0.000 description 2
- 229910018072 Al 2 O 3 Inorganic materials 0.000 description 1
- 229910004298 SiO 2 Inorganic materials 0.000 description 1
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 230000005284 excitation Effects 0.000 description 1
- 230000006870 function Effects 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 239000003960 organic solvent Substances 0.000 description 1
- 230000003647 oxidation Effects 0.000 description 1
- 238000007254 oxidation reaction Methods 0.000 description 1
- 230000000704 physical effect Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
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Abstract
【解決手段】本発明の半導体装置の製造方法は、半導体基板の表面に半導体素子を集積させて回路の少なくとも一部を形成する工程と、半導体基板の表面から穴を開ける工程と、穴の内表面に絶縁膜およびバリア膜を形成する工程と、バリア膜の表面に、穴を埋めるように導電性金属を形成する工程と、半導体基板の裏面を加工して厚さを減少させ、導電性金属を突出させる工程と、半導体基板の裏面にSiCN膜を設ける工程とを有する。
【選択図】 図1
Description
2 回路(LSI構造)
10 穴
11 絶縁膜
12 バリア膜(TaN膜)
13 プラグ(導電性金属)
20 SiCN膜
31 貫通電極
33 ガラス基板
100 半導体装置
Claims (17)
- 半導体基板の表面に半導体素子を集積させて回路の少なくとも一部を形成する工程(a)と、
前記半導体基板の表面から穴を開ける工程(b)と、
前記穴の内表面に絶縁膜およびバリア膜を形成する工程(c)と、
前記バリア膜の内表面に、前記穴を埋めるように導電性金属を形成する工程(d)と、
その後前記半導体基板の裏面を加工して前記半導体基板の厚さを減少させ、前記導電性金属、前記バリア膜、および前記絶縁膜を前記裏面から突出させる工程(e)と、
その後、前記半導体基板の裏面にSiCN膜を設ける工程(f)と、
を有することを特徴とする半導体装置の製造方法。 - 前記工程(f)は、前記SiCN膜の組成を、前記半導体基板の反りが実質的にゼロになるように制御する工程であることを特徴とする請求項1記載の半導体装置の製造方法。
- 前記工程(f)は、Si3N4にCを2原子%〜40原子%添加した組成のSiCN膜を形成する工程であることを特徴とする請求項1または2のいずれか一項に記載の半導体装置の製造方法。
- 前記工程(e)は、前記半導体基板の裏面をエッチングすることにより、前記半導体基板の厚さを減少させる工程であることを特徴とする請求項1〜3のいずれか一項に記載の半導体装置の製造方法。
- 前記工程(e)は、前記半導体基板の表面側を多孔質のガラス基板に貼り付け、前記半導体基板の裏面をウエットエッチングすることにより、前記半導体基板の厚さを減少させる工程であることを特徴とする請求項1〜4のいずれか一項に記載の半導体装置の製造方法。
- 前記工程(f)は、前記半導体基板の裏面にSiCN膜をCVDで成膜した後に、前記裏面から突出した前記バリア膜の表面に形成された前記絶縁膜および前記SiCN膜を除去する工程を有することを特徴とする請求項1〜5のいずれか一項に記載の半導体装置の製造方法。
- 前記半導体基板はSi基板であり、
前記工程(c)は、
前記穴の内表面を窒化することにより前記絶縁膜の少なくとも一部を形成する工程を有することを特徴とする請求項1〜6のいずれか一項に記載の半導体装置の製造方法。 - 前記工程(c)は、
前記バリア膜として導電性バリア膜を形成する工程を含み、
前記工程(d)は、
前記導電性バリア膜を通電手段として用いて前記導電性金属を電気めっきにより形成する工程を有することを特徴とする請求項1〜7のいずれか一項に記載の半導体装置の製造方法。 - 前記工程(c)は、
前記絶縁膜を形成した後に、前記絶縁膜上に、前記バリア膜としてTaN膜を形成する工程を有することを特徴とする請求項1〜7のいずれか一項に記載の半導体装置の製造方法。 - 前記工程(d)は、
前記TaN膜に、前記TaN膜をシード層として、前記導電性金属としてCuを電気めっきにより形成する工程であることを特徴とする請求項9に記載の半導体装置の製造方法。 - 表面に回路が形成された半導体基板と、
前記半導体基板を貫通して一部が裏面から突出するように設けられた貫通電極と、
前記裏面を覆うように設けられたSiCN膜と、
を有することを特徴とする半導体装置。 - 前記SiCN膜は、前記半導体基板の反りが実質的にゼロになるような組成を有することを特徴とする請求項11記載の半導体装置。
- 前記SiCN膜は、Si3N4にCを2原子%〜40原子%添加させた組成を有することを特徴とする請求項11または12のいずれか一項に記載の半導体装置。
- 前記貫通電極は該電極の材料に対するバリア膜で覆われ、かつ前記バリア膜は前記半導体基板と接触して設けられた絶縁膜によって覆われていることを特徴とする請求項11〜13のいずれか一項に記載の半導体装置。
- 前記半導体基板はSi基板であり、
前記絶縁膜はSi3N4膜を有することを特徴とする請求項14に記載の半導体装置。 - 前記バリア膜の材料はTaNであることを特徴とする請求項14に記載の半導体装置。
- 前記貫通電極の材料はCuであることを特徴とする請求項11〜16のいずれか一項に記載の半導体装置。
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JP2010179468A JP5419167B2 (ja) | 2010-08-10 | 2010-08-10 | 半導体装置の製造方法および半導体装置 |
PCT/JP2011/067847 WO2012020689A1 (ja) | 2010-08-10 | 2011-08-04 | 半導体装置の製造方法および半導体装置 |
US13/814,950 US20130140700A1 (en) | 2010-08-10 | 2011-08-04 | Method of manufacturing a semiconductor device and semiconductor device |
CN2011800389423A CN103081077A (zh) | 2010-08-10 | 2011-08-04 | 半导体装置的制造方法及半导体装置 |
TW100128435A TW201216411A (en) | 2010-08-10 | 2011-08-09 | Method of manufacturing a semiconductor device and semiconductor device |
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JP5419167B2 (ja) | 2014-02-19 |
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