JP2011527067A5 - - Google Patents

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JP2011527067A5
JP2011527067A5 JP2011516749A JP2011516749A JP2011527067A5 JP 2011527067 A5 JP2011527067 A5 JP 2011527067A5 JP 2011516749 A JP2011516749 A JP 2011516749A JP 2011516749 A JP2011516749 A JP 2011516749A JP 2011527067 A5 JP2011527067 A5 JP 2011527067A5
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word line
volatile storage
read comparison
comparison level
read
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Claims (14)

  1. 不揮発性記憶装置を動作させる方法であって、
    1組の不揮発性記憶素子(1500、1510)の中にあり、1組のワードライン(600)の中の選択されたワードライン(WL3)に接続されている少なくとも1つの選択された不揮発性記憶素子からのデータの読み出しを要求する読み出しコマンド(700)を受信するステップと、
    前記読み出しコマンドに応じて、前記1組のワードラインの中の別のワードライン(WL5)を選定するステップ(710)と、
    前記別のワードラインに接続されている不揮発性記憶素子に対して検出動作を実施するステップ(715)と、
    前記検出動作に基づいて、少なくとも1つの読み出し比較レベルを決定するステップ(725)と、
    前記少なくとも1つの読み出し比較レベルを用いて前記少なくとも1つの選択された不揮発性記憶素子を読み出すステップ(730)、
    を備える方法。
  2. 前記検出動作は、閾値電圧分布を取得し、
    前記少なくとも1つの読み出し比較レベルは、前記閾値電圧分布の中の凹み部分を特定することによって決定される、
    請求項1に記載の方法。
  3. 前記別のワードラインを前記1組のワードラインから無作為に選定するステップをさらに備える請求項1または2に記載の方法。
  4. 前記1組のワードラインの中の少なくとも1つの指定されたワードライン(WL4)を除外して、前記別のワードラインを前記1組のワードラインから無作為に選定するステップをさらに備える請求項1または2に記載の方法。
  5. 前記別のワードラインが、前記選択されたワードラインに隣接しない請求項1〜4のいずれか一項に記載の方法。
  6. 前記検出動作に基づいて、前記別のワードラインに接続されている前記不揮発性記憶素子に対して複数の読み出し比較レベルを決定するステップと、
    前記複数の読み出し比較レベルを用いて前記少なくとも1つの選択された不揮発性記憶素子を読み出すステップ、
    をさらに備える請求項1〜5のいずれか一項に記載の方法。
  7. 前記少なくとも1つの読み出し比較レベルは、データ状態の第1のペアの隣接する状態を互いに区別する第1の読み出し比較レベル(930)を備え、
    前記方法が、
    前記第1の読み出し比較レベルに基づいて、かつ、データ状態の第2のペアの隣接する状態を互いに区別する検出動作を実施せずに、データ状態の前記第2のペアの隣接する状態を互いに区別する第2の読み出し比較レベル(935)を決定するステップをさらに備える、
    請求項1〜6のいずれか一項に記載の方法。
  8. 不揮発性記憶システムであって、
    少なくとも1つの選択された不揮発性記憶素子を含む1組の不揮発性記憶素子(1500、1510)と、
    前記少なくとも1つの選択された不揮発性記憶素子が接続されている選択されたワードライン(WL3)を含んでおり、前記1組の不揮発性記憶素子に接続されている1組のワードライン(600)と、
    前記1組のワードラインと通信する少なくとも1つの制御回路(1210、1250)、
    を有しており、
    前記少なくとも1つの制御回路が、
    (a)前記選択されたワードラインに接続されている前記少なくとも1つの選択された不揮発性記憶素子からのデータの読み出しを要求する読み出しコマンドを受信し(700)、
    (b)前記読み出しコマンドに応じて、前記1組のワードラインの中の別のワードライン(WL5)を選定し(710)、前記別のワードラインに接続されている不揮発性記憶素子に対して検出動作を実施し(715)、前記検出動作に基づいて少なくとも1つの読み出し比較レベルを決定し(725)、
    (c)前記少なくとも1つの読み出し比較レベルを用いて前記少なくとも1つの選択された不揮発性記憶素子を読み出す(730)、
    不揮発性記憶システム。
  9. 前記検出動作は、閾値電圧分布を取得し、
    前記少なくとも1つの読み出し比較レベルは前記閾値電圧分布の中の凹み部分を特定することによって決定される、
    請求項8に記載の不揮発性記憶システム。
  10. 前記少なくとも1つの制御回路が、前記1組のワードラインの中の少なくとも1つの指定されたワードライン(WL4)を除外して、前記別のワードラインを前記1組のワードラインから無作為に選択する、請求項8または9に記載の不揮発性記憶システム。
  11. 前記少なくとも1つの制御回路が、前記別のワードラインを前記1組のワードラインから無作為に選択する、請求項8または9に記載の不揮発性記憶システム。
  12. 前記別のワードラインが、前記選択されたワードラインに隣接しない、請求項8〜10のいずれか一項に記載の不揮発性記憶システム。
  13. 前記少なくとも1つの制御回路が、
    前記検出動作に基づいて、前記別のワードラインに接続されている前記不揮発性記憶素子に対して複数の読み出し比較レベルを決定し、
    前記複数の読み出し比較レベルを用いて、前記少なくとも1つの選択された不揮発性記憶素子を読み出す、
    請求項8〜12のいずれか一項に記載の不揮発性記憶システム。
  14. 前記少なくとも1つの読み出し比較レベルは、データ状態の第1のペアの隣接する状態を互いに区別する第1の読み出し比較レベル(930)を備え、
    前記少なくとも1つの制御回路が、
    前記第1の読み出し比較レベルに基づいて、かつ、データ状態の第2のペアの隣接する状態を互いに区別する検出動作を実施せずに、データ状態の前記第2のペアの隣接する状態を互いに区別する第2の読み出し比較レベル(935)を決定する、
    請求項8〜13のいずれか一項に記載の不揮発性記憶システム。
JP2011516749A 2008-06-30 2009-06-29 不揮発性メモリにおける読み出しディスターブの低減 Expired - Fee Related JP5444340B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US12/165,302 US7808831B2 (en) 2008-06-30 2008-06-30 Read disturb mitigation in non-volatile memory
US12/165,302 2008-06-30
PCT/US2009/048990 WO2010002752A1 (en) 2008-06-30 2009-06-29 Read disturb mitigation in non-volatile memory

Publications (3)

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JP2011527067A JP2011527067A (ja) 2011-10-20
JP2011527067A5 true JP2011527067A5 (ja) 2012-04-12
JP5444340B2 JP5444340B2 (ja) 2014-03-19

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US (2) US7808831B2 (ja)
EP (1) EP2301037B1 (ja)
JP (1) JP5444340B2 (ja)
KR (1) KR101564399B1 (ja)
CN (1) CN102077298B (ja)
TW (1) TWI415129B (ja)
WO (1) WO2010002752A1 (ja)

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