JP2011513073A5 - - Google Patents

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Publication number
JP2011513073A5
JP2011513073A5 JP2010547696A JP2010547696A JP2011513073A5 JP 2011513073 A5 JP2011513073 A5 JP 2011513073A5 JP 2010547696 A JP2010547696 A JP 2010547696A JP 2010547696 A JP2010547696 A JP 2010547696A JP 2011513073 A5 JP2011513073 A5 JP 2011513073A5
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JP
Japan
Prior art keywords
passage
layer
substrate
redeposition
sacrificial layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2010547696A
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English (en)
Japanese (ja)
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JP2011513073A (ja
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Publication date
Priority claimed from US12/267,186 external-priority patent/US7989262B2/en
Application filed filed Critical
Publication of JP2011513073A publication Critical patent/JP2011513073A/ja
Publication of JP2011513073A5 publication Critical patent/JP2011513073A5/ja
Pending legal-status Critical Current

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JP2010547696A 2008-02-22 2009-02-12 キャビティをシールする方法 Pending JP2011513073A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US6665508P 2008-02-22 2008-02-22
US12/267,186 US7989262B2 (en) 2008-02-22 2008-11-07 Method of sealing a cavity
PCT/US2009/033927 WO2009105382A2 (en) 2008-02-22 2009-02-12 Method of sealing a cavity

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2012200158A Division JP2013031919A (ja) 2008-02-22 2012-09-12 キャビティをシールする方法

Publications (2)

Publication Number Publication Date
JP2011513073A JP2011513073A (ja) 2011-04-28
JP2011513073A5 true JP2011513073A5 (enExample) 2011-07-21

Family

ID=40986138

Family Applications (2)

Application Number Title Priority Date Filing Date
JP2010547696A Pending JP2011513073A (ja) 2008-02-22 2009-02-12 キャビティをシールする方法
JP2012200158A Pending JP2013031919A (ja) 2008-02-22 2012-09-12 キャビティをシールする方法

Family Applications After (1)

Application Number Title Priority Date Filing Date
JP2012200158A Pending JP2013031919A (ja) 2008-02-22 2012-09-12 キャビティをシールする方法

Country Status (6)

Country Link
US (2) US7989262B2 (enExample)
EP (1) EP2268568B1 (enExample)
JP (2) JP2011513073A (enExample)
CN (1) CN101998930B (enExample)
TW (1) TWI353338B (enExample)
WO (1) WO2009105382A2 (enExample)

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US10703627B2 (en) 2013-06-27 2020-07-07 Soitec Methods of fabricating semiconductor structures including cavities filled with a sacrificial material
US9330929B1 (en) * 2014-10-13 2016-05-03 Infineon Technologies Dresden Gmbh Systems and methods for horizontal integration of acceleration sensor structures
CN105977221B (zh) * 2016-04-28 2018-11-06 清华大学 气密性封装结构及封装方法
JP6691234B2 (ja) * 2016-07-22 2020-04-28 ヒューレット−パッカード デベロップメント カンパニー エル．ピー．Ｈｅｗｌｅｔｔ‐Ｐａｃｋａｒｄ Ｄｅｖｅｌｏｐｍｅｎｔ Ｃｏｍｐａｎｙ， Ｌ．Ｐ． 基板アセンブリ及び関連方法
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DE102019120886A1 (de) * 2019-08-02 2021-02-04 Infineon Technologies Ag Halbleitergehäuse mit einem Hohlraum in seinem Gehäusekörper

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