WO2009105382A2 - Method of sealing a cavity - Google Patents
Method of sealing a cavity Download PDFInfo
- Publication number
- WO2009105382A2 WO2009105382A2 PCT/US2009/033927 US2009033927W WO2009105382A2 WO 2009105382 A2 WO2009105382 A2 WO 2009105382A2 US 2009033927 W US2009033927 W US 2009033927W WO 2009105382 A2 WO2009105382 A2 WO 2009105382A2
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- WO
- WIPO (PCT)
- Prior art keywords
- cavity
- passage
- layer
- substrate
- redepositing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Ceased
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Classifications
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C1/00—Manufacture or treatment of devices or systems in or on a substrate
- B81C1/00015—Manufacture or treatment of devices or systems in or on a substrate for manufacturing microsystems
- B81C1/00261—Processes for packaging MEMS devices
- B81C1/00277—Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS
- B81C1/00293—Processes for packaging MEMS devices for maintaining a controlled atmosphere inside of the cavity containing the MEMS maintaining a controlled atmosphere with processes not provided for in B81C1/00285
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- B—PERFORMING OPERATIONS; TRANSPORTING
- B81—MICROSTRUCTURAL TECHNOLOGY
- B81C—PROCESSES OR APPARATUS SPECIALLY ADAPTED FOR THE MANUFACTURE OR TREATMENT OF MICROSTRUCTURAL DEVICES OR SYSTEMS
- B81C2203/00—Forming microstructural systems
- B81C2203/01—Packaging MEMS
- B81C2203/0145—Hermetically sealing an opening in the lid
Definitions
- Embodiments of the present invention generally relate to a method of sealing a cavity in a micro-electromechanical system (MEMS) or a nano-electromechanical system
- MEMS and NEMS devices require encapsulation in a low or very low pressure environment. This is especially true for transducers, such as those used in inertial sensors, which are affected by squeeze-film damping effects.
- methods such as Chemical Vapor Deposition (CVD) have been used to the seal cavities in which MEMS devices are enclosed.
- CVD Chemical Vapor Deposition
- Embodiments disclosed herein generally include methods of sealing a cavity in a device structure.
- the cavity may be opened by etching away sacrificial material that may define the cavity volume.
- Material from below the cavity, above the cavity, and outside the cavity may be sputter etched and redeposited over and in passageways leading to the cavity to thereby seal the cavity.
- Material may be sputter etched from above the cavity and redeposited in the passageways leading to the cavity as well.
- the sputter etching may occur in a substantially inert atmosphere. As the sputter etching is a physical process, little or no sputter etched material will redeposit within the cavity itself.
- the inert gases may sweep out any residual gases that may be present in the cavity after the cavity has been opened.
- the cavity may be substantially filled with inert gases that do not negatively impact the cavity.
- a method of forming a device structure may include depositing at least one sacrificial layer over a substrate and removing a portion of the at least one sacrificial layer to define a shape of a cavity and at least one passage to be formed.
- the method may also include depositing at least one encapsulating layer over the at least one sacrificial layer and removing a portion of the at least one encapsulating layer to expose a portion of the at least one sacrificial layer through at least a first side of the at least one encapsulating layer.
- the method may additionally include removing the at least one sacrificial layer to form the cavity and a first passage through the at least one encapsulating layer and sputter etching material from the substrate and redepositing the sputter etched material in the first passage to seal the first passage.
- a method of forming a device structure is disclosed. The method may include depositing at least one sacrificial layer over a substrate and removing a portion of the at least one sacrificial layer to define a shape of a cavity and at least one passage to be formed.
- the method may also include depositing a first encapsulating layer over the at least one sacrificial layer, depositing a second encapsulating layer over the first encapsulating layer, and removing a portion of the first encapsulating layer to expose a portion of the at least one sacrificial layer through a side of the first encapsulating layer.
- the method may additionally include removing the at least one sacrificial layer to form the cavity and a first passage through the first encapsulating layer and sputter etching material from the second encapsulating layer and redepositing the sputter etched second encapsulating material in the first passage to seal the first passage.
- a method of forming a device structure may include depositing at least one sacrificial layer over a substrate and removing a portion of the at least one sacrificial layer to define a shape of a cavity and at least one passage to be formed.
- the method may also include depositing a first encapsulating layer over the at least one sacrificial layer defining a shape of the cavity, depositing a second encapsulating layer over the first encapsulating layer, and removing a portion of the first encapsulating layer to expose a portion of the at least one sacrificial layer through a side of the first encapsulating layer.
- the method may additionally include removing the at least one sacrificial layer to form the cavity and a first passage through the first encapsulating layer and sputter etching material from the second encapsulating layer and the substrate and redepositing the sputter etched second encapsulating material and material from the substrate in the first passage to seal the first passage.
- Figure 1 is a schematic top view of a structure having a plurality of cavities according to one embodiment.
- Figure 2 is a schematic top view of a structure having a cavity according to another embodiment.
- Figure 3A is a schematic side view of a structure having a side release passage having a height less than a height of the cavity.
- Figure 3B is a schematic side view of the structure of Figure 3A having the sacrificial material removed.
- Figure 4A is a schematic side view of a structure having a plurality of cavities each having a side release passage having a height less than a height of the cavity.
- Figure 4B is a schematic side view of the structure of Figure 4A having the sacrificial material removed.
- Figure 5A is a schematic side view of a structure having a plurality of side release passages having a height less than a height of the cavity.
- Figure 5B is a schematic side view of the structure of Figure 5A having the sacrificial material removed.
- Figure 6 is a schematic side view of a sputtering apparatus.
- Figure 7 is a schematic cross sectional view of structure partially sealed by a sputtering method.
- Figure 8 is a schematic side view of another sputtering apparatus.
- Figure 9A is a schematic cross sectional view of a structure prior to sealing the cavities.
- Figure 9B is a schematic cross sectional view of the structure of Figure 9A during a sputter etch process.
- Figure 9C is the structure of Figure 9 A after sealing the cavities.
- Figure 10 is a schematic cross sectional view of a structure prior to sputter etching according to one embodiment.
- Figure 11 is a schematic cross sectional view of a structure prior to sputter etching according to another embodiment.
- Figure 12 is a schematic cross sectional view of a structure prior to sputter etching according to another embodiment.
- Figures 13A-C show a process for removing sacrificial material according to another embodiment.
- FIG. 1 is a schematic top view of a structure 100 having a plurality of cavities according to one embodiment.
- the structure 100 comprises a substrate 102 having one or more layers 104 formed thereover. Between the layers 104 and the substrate 102, one or more cavities may be formed.
- one or more sacrificial layers of sacrificial material 108 may be formed between the substrate 102 and the one or more layers 104.
- the sacrificial material 108 may define the volume of open space within the cavity to be formed.
- the cavity is formed by removing the sacrificial material 108.
- one or more devices 106 may be present.
- Sacrificial material 108 may be present in a passage 110 through the cavity area.
- the passage 110 may permit etching gases or liquids enter into the cavity and remove the sacrificial material 108.
- sacrificial material 108 may also be exposed over the substrate 102 as a channel 112 between the one or more layers 104.
- the devices 106 Upon removal of the sacrificial material 108, the devices 106 will be released within the cavities. It is to be understood that while the passages 110 have been shown on one side of the eventual cavity, the passages 110 may be on both sides of the cavity to be formed. Additionally, while the passages 110 have been shown as straight with a line of sight to the devices 106, the passages 110 may be shaped to provide little or no line of sight to the devices 106.
- Figure 2 is a schematic top view of a structure 200 having a cavity 204 according to another embodiment.
- the cavity 204 is formed over a substrate 202 and is accessed through one or more passages 208.
- the passages 208 have a kink such that there is no line of sight path between the device 206 contained in the cavity 204 and the entrance to the passages 208. It is to be understood that while the passages 208 have been shown on one side of the cavity 204, the passages 208 may be present on both sides. Additionally, while the passages 208 have been shown as blocking any line of sight path to the device 206, the passages 208 may be designed to provide a complete or less than complete line of sight path to the device 206.
- Figure 3 A is a schematic side view of a structure having a side release passage having a height less than a height of the cavity.
- Figure 3B is a schematic side view of the structure of Figure 3A having the sacrificial material removed.
- the structure has a substrate 302 upon which a device 306 may be formed.
- the substrate 302 may comprise a silicon based material.
- the substrate 302 may comprise multiple layers of a device structure such as a CMOS structure.
- the device 306 may comprise any MEMS, NEMS, micro-opto-electromechanical system (MOEMS) device, nano-opto-electromechanical system (NOEMS) device, or combinations thereof.
- the device may be formed at any point within the structure.
- the device may be formed above or below a CMOS structure. Additionally, the device may be formed within a stack such that additional layers of the structure (i.e., not the device) may be present above the device.
- the device may be used in the back end of line (BEOL) processing of a metal system.
- BEOL back end of line
- the device may also be formed in the back end of line of any other semiconductor front end technology, such as a bipolar process, or a bi-CMOS, or a SiGe, or a GaAs, GaAlAs or other IIFV or IFVI, or any other front end semiconductor process.
- the device may be formed on glass. It is to be understood that while one device 306 is shown, multiple devices 306 may be present. If multiple devices 306 are present, the devices 306 may be identical or different and may perform the same or different functions. Also, while a device 306 has been shown, it is to be understood that the device 306 may not be present.
- the device 306 may be enclosed in a sacrificial material 304.
- the sacrificial material 304 may comprise a spin-on organic film.
- PECVD Plasma Enhanced Chemical Vapor Deposition
- Additional deposition methods that may be used to deposit the sacrificial material 304 include atomic layer deposition (ALD), physical vapor deposition (PVD), chemical vapor deposition (CVD), and other conventional deposition methods.
- a spin on sacrificial material 304 may flow over any irregularities in the underlying layers, thereby producing a flat layer where the thickness of the film depends on the height of the underlying material.
- the sacrificial material 304 may be deposited and then patterned to remove portions of the sacrificial material 304 that do not affect the cavity to be formed.
- One or more other layers 308, 310, and 312 may be deposited over the sacrificial material 304.
- the one or more other layers 308, 310, and 312 may form a part of a structure to be formed above the device 306.
- a trench 314 may be formed in the structure by patterning the one or more other layers 308, 310, and 312.
- the trench may have a height shown by arrows "E" from the substrate 302 to the top of the uppermost layer 312 and a width shown by arrows "B".
- the height "E” of the trench extends in the Y axis, and the width "B” extends along the X axis.
- the trench may extend along the Z axis (into the paper) for many microns.
- the trench may extend for a distance along the Z axis for about 1 mm or greater.
- the ratio of the height to the width is known as an aspect ratio.
- the aspect ratio opening may be proportional to an ejection cosine distribution of sputtered material.
- the aspect ratio may be proportional to the angular distribution of the incoming species. By proportional, it is to be understood to include not only linearly proportional, but also inversely proportional, and any general relationship between the aspect ratio and the sputtered material.
- the aspect ratio of the trench 314 may be about 1:1. In another embodiment, the aspect ratio of the trench 314 may be greater than about 2:1.
- the width may be between about several nanometers to about a hundred micrometers. In one embodiment, the width may be between about 1 micrometer to about 50 micrometers.
- the sacrificial material 304 after patterning, provides the shape of the cavity 316 to be formed as well as the release passage 318.
- the cavity 316 may have a height shown by arrows "C” while the passage 318 may have a height shown by arrows "D".
- the passage 318 may extend along the trench for the entire length of the trench along the Z axis. In one embodiment, the passage 318 may extend along the trench for less than the entire length along the Z axis. In the embodiment shown in Figures 3A and 3B, the passage 318 has a height less than a height of the cavity 316. It is to be understood that the passage 318 may have a height substantially equal to the height of the cavity 316 if desired. In one embodiment, the cavity release passage 318 may have a height of about 10 micrometers or less.
- the sacrificial material 304 may be removed to release the device 306 in the cavity 316.
- the sacrificial material 304 may be removed by plasma etching.
- the etching gases or liquids may comprise hydrogen, fluorine, oxygen, hydrogen fluoride, chlorine, hydrochloric acid, nitrogen, helium, xenon difluoride, anhydrous hydrogen fluoride, fluorine based etching gases or liquids, oxygen based etching gases or liquids, hydrogen based etching gases or liquids, or combinations thereof.
- Figure 4A is a schematic side view of a structure having a plurality of cavities each having a side release passage having a height less than a height of the cavity.
- Figure 4B is a schematic side view of the structure of Figure 4A having the sacrificial material removed.
- the structure has a substrate 402 upon which a plurality of devices 406 may be formed.
- the substrate 402 may comprise a silicon based material.
- the substrate 402 may comprise multiple layers of a device structure such as a CMOS structure.
- the devices 406 may comprise any MEMS, NEMS, MOEMS, or NOEMS devices, or combinations thereof.
- the device 406 that may comprise a microfluidic channel that provides temperature control and improved reliability in integrated circuits.
- the device 406, in general can be any device that may be sealed within a cavity over a substrate.
- the devices 406 may be enclosed in a sacrificial material 404.
- the sacrificial material 404 may comprise a spin-on organic film.
- spin-on films PECVD, ALD, CVD, or PVD materials, such as silicon nitride, silicon dioxide, amorphous silicon and amorphous carbon, can be employed to the same effect.
- a spin on sacrificial material 404 may flow over any irregularities in the underlying layers, thereby producing a flat layer where the thickness of the film depends on the height of the underlying material.
- the sacrificial material 404 may be deposited and then patterned to remove portions of the sacrificial material 404 that do not affect the cavity to be formed.
- the sacrificial material 404 may be patterned such that the sacrificial material 404 spans the trench 414 so that the etching gases or liquid that removes the remainder of the sacrificial material 404 may encounter the sacrificial material 404 from the top rather than from the side through the passage 418.
- One or more other layers 408, 410, and 412 may be deposited over the sacrificial material 404.
- the one or more other layers 408, 410, and 412 may form a part of a structure to be formed above the device 406.
- a trench 414 may be formed in the structure by patterning the one or more other layers 408, 410, and 412. The patterning may comprise etching.
- the sacrificial material 404 after patterning, provides the shape of the cavities 416 to be formed as well as the release passage 418. After the one or more other layers 408, 410, and 412 have been patterned so that the sacrificial material 404 is exposed, the sacrificial material 404 may be removed to release the devices 406 in the cavities 416. In one embodiment, the sacrificial material 404 may be removed by plasma etching.
- the etching gases or liquids may comprise hydrogen, fluorine, oxygen, hydrogen fluoride, chlorine, hydrochloric acid, nitrogen, helium, xenon difluoride, anhydrous hydrogen fluoride, fluorine based etching gases or liquids, oxygen based etching gases or liquids, hydrogen based etching gases or liquids, or combinations thereof.
- Figure 5A is a schematic side view of a structure having a plurality of side release passages having a height less than a height of the cavity.
- Figure 5B is a schematic side view of the structure of Figure 5A having the sacrificial material removed.
- the structure has a substrate 502 upon which one or more devices 506 may be formed.
- the substrate 502 may comprise a silicon based material.
- the substrate 502 may comprise multiple layers of a device structure such as a CMOS structure.
- the devices 506 may comprise any MEMS, NEMS, MOEMS, or NOEMS device, or combinations thereof.
- the devices 506 that may comprise a microfluidic channel that provides temperature control and improved reliability in integrated circuits.
- the devices 506, in general can be any device that may be sealed within a cavity over a substrate.
- the device 506 may be enclosed in a sacrificial material 504.
- the sacrificial material 504 may comprise a spin-on organic film.
- spin-on films PECVD, ALD, PVD, and CVD materials, such as silicon nitride, silicon dioxide, amorphous silicon and amorphous carbon, can be employed to the same effect.
- a spin on sacrificial material 504 may flow over any irregularities in the underlying layers, thereby producing a flat layer where the thickness of the film depends on the height of the underlying material.
- the sacrificial material 504 may be deposited and then patterned to remove portions of the sacrificial material 504 that do not affect the cavity 516 to be formed.
- One or more other layers 508, 510, and 512 may be deposited over the sacrificial material 504.
- the one or more other layers 508, 510, and 512 may form a part of a structure to be formed above the device 506.
- a trench 514 may be formed in the structure by patterning the one or more other layers 508, 510, and 512.
- the sacrificial material 504 after patterning, provides the shape of the cavities 516 to be formed as well as the release passages 518. As shown in Figures 5A and 5B, a plurality of release passages 518 are present that each open to a trench 514. It is to be understood that multiple passages 518 may be formed that extend to a common trench 514. After the one or more other layers 508, 510, and 512 have been patterned so that the sacrificial material 504 is exposed, the sacrificial material 504 may be removed to release the devices 506 in the cavities 516.
- the etching gases or liquids may comprise hydrogen, fluorine, oxygen, hydrogen fluoride, chlorine, hydrochloric acid, nitrogen, helium, xenon difluoride, anhydrous hydrogen fluoride, fluorine based etching gases or liquids, oxygen based etching gases or liquids, hydrogen based etching gases or liquids, or combinations thereof.
- the passages to the cavities may need to be closed.
- CVD processes may not be appropriate as these will lead to the deposition of material on the active area of the device. This problem arises because plasma activated species (e.g., Si-based, metal-based or Oxygen-based species) will have a lifetime which will be long enough to reach the active area inside the cavity and may therefore be deposited on a device or other surface inside the cavity.
- plasma activated species e.g., Si-based, metal-based or Oxygen-based species
- the gas medium surrounding the device should also be as noble as possible to avoid any reaction that could adversely affect the device or its lifetime operation. This is especially true for transducers that may heat up during their operation and reach a level at which they react with residual gases trapped into the cavity. Therefore, chemical based processes may not be appropriate as they involve reactive gases. The encapsulation or sealing of the cavity has to be performed without deposition of materials on the active device as this would jeopardize the device operations.
- Transducers are moving into the consumer market which implies very strong demand for sealing methods having limited cost.
- CMOS technology being the dominant process manufacturing in the industry, this means this method should be compatible with CMOS processing and should require, if any, minimum tool addition or new processing steps.
- Reducing costs in this field also means miniaturization which implies that this method should be as little space invading as possible to maximize the number of devices per area or per volume.
- the apparatus comprises a vacuum chamber 608, a pump 610, plasma 602, a power supply 612, a gas inlet 614, a target 604 and a substrate 606.
- the operation of the sputtering apparatus shown in Figure 6 will be known to the skilled reader.
- the angle at which the sputtered atoms are emitted is often described as a cosine distribution, in that the relative amount of material sputtered at any particular angle can be compared to the amount sputtered at normal incidence times the cosine of the angle from normal incidence.
- the angular distribution is a function of many parameters, such as target material, incoming particles, and energy of incoming particles. An over-cosine distribution will lead to less deposition on the sides whereas an under-cosine distribution will lead to more distribution on the sides.
- An apparatus for performing sputter etching to seal the cavity comprises a vacuum chamber 802, plasma 804, a pump 806, a gas inlet 808, a coil 810 and a power supply 812 for applying an RF electrical bias.
- the sputtering gases are ionized in the inductive plasma 804 and, using power supply 812, are accelerated directly towards the substrate 814.
- the material which is in the line-of-sight of the sputtered particles will be sputter etched (i.e., the substrate 814 is sputtered and is in essence equivalent to a sputtering target in a sputter deposition process) when the accelerated particles reach the surface. They will then be expelled in different directions. Some will be emitted back into the plasma 804 while others will be redeposited on the sidewall and on the cavity entrance.
- the apparatus can be used where the substrate 814 is negatively charged, for example, when an RF bias is applied to it, with respect to the plasma 804.
- both the substrate 902 and layer 904 will be sputter etched, while layer 906 and layer 908 may be sputter etched during the initial stages of the process until the surfaces are adequately coated by the sputtering and redeposition of layers 902 and 904.
- the resulting material will be redeposited in order to seal the cavity 910, thereby forming a redeposition layer.
- the layer 904 may comprise a hard mask layer.
- the substrate 902 is locally sputter-etched at the bottom of the release hole. Material from layer 904 may also be sputter etched. The material from layer 904 may be redeposited onto the substrate 902 and along the sides of layers 906, 908 within the trench.
- the redeposited material from layer 904 may also sputter etch and help seal the cavity 910.
- the material that may seal the cavity 910 may come from the substrate 902, the layer 904, or even layers 906 and 908.
- the material that seals the cavity 910 comes from material already present on the structure.
- a separate deposition such as CVD or even sputtering from a secondary source such as a sputtering target separate from the structure or gaseous precursors is not necessary.
- the substrate material, and layers 904, 906, and 908 may be chosen to suit the requirements of the redeposition layer.
- the substrate material may comprise an oxide.
- the substrate material may comprise silicon nitride, a metal, polysilicon, and combinations thereof. Virtually any material may be used to suit the needs of the user.
- the materials for the substrate and layers 904, 906, and 908 may be tailored to suit the needs of the user.
- the plasma is located away from the substrate 902.
- the gases used for sputter etching should not be accelerated toward the external target but toward the substrate 902. This can be performed on an apparatus where the substrate 902 can be negatively biased, for example when a RF bias is applied to it, with respect to the plasma.
- sputtering gases are ionized in the plasma and accelerated toward the substrate 902.
- the materials being in the line-of-sight of these accelerated species will be sputter etched (or sputtered) when the accelerated particles will reach the surface. They will then be expelled in different directions. Some of the expelled particles will be emitted back into the plasma, others will be redeposited on the sidewall and on the passage entrance.
- Figure 9C shows a plurality of cavities 910 sealed with material 912 that has been redeposited after sputter etching.
- the substrate 902 has been locally sputter-etched at the bottom of the via-like structure.
- the substrate 902 provides most of the material 914 being redeposited toward the sidewall and the passage 916.
- the substrate material can be chosen depending on the requirements for the redeposited layer.
- Layer 904 would also be sputter etch redeposited. Care should be taken in determining the material and thickness of the top layer of the multilayer stack as it would undergo most of the ion bombardments that occur during the sputter etching. Because the sputter etch rate is angle dependant, some facets 914 may form at the corner of the layer 904. These facets 914 will move further away one from another as the sputter etch pursues. However, at a point of time, enough material would have been deposited at the passage 916 to close it. An etch stop layer having a low sputtering rate can be used under layer 904 if desired.
- the sputter etching may occur in a high density plasma (HDP) CVD system.
- the sputter etching may occur in a parallel-plate type reactor. It is to be understood that the sputter etching may occur in-situ in the same chamber that the sacrificial material is removed to open the cavity. Additionally, the sputter etching may occur in a separate chamber. In one embodiment, the sputter etching may occur in a PVD chamber with the target removed. In one embodiment, the sputter etching may occur in-situ with the sealing layer that is deposited over the structure after the sputter etching is completed. In another embodiment, the sputter etching and the sealing layer deposition may occur in separate chambers.
- HDP high density plasma
- HDP CVD is used to produce void-free gap filling and local planarization by superimposing two distinct processes in one step.
- One involves the formation of silicon dioxide (silica) from silane and oxygen.
- the second process sputtering, removes material physically through momentum transfer between energetic incoming ions, such as ionized noble gases such as argon, krypton, helium, xenon, and combinations thereof, and the growing film surface.
- ionized noble gases such as argon, krypton, helium, xenon, and combinations thereof
- the method consists in having two steps.
- a sputter etch would be performed. Gases and process parameters would have been optimized to maximize sputter redeposition on the sidewall and toward the cavity entrance.
- Sputtering gases should be noble gases like Argon, Helium, Xenon, Krypton, and combinations thereof. Nobel gases have the advantage of being already widely available for standard CMOS processing.
- deposition gases such as SiH 4 and O 2 can flow and a standard HDP CVD process can be subsequently performed if needed to deposit an additional sealing or encapsulating layer over the already sealed cavity.
- Figures 10 and 11 show other configurations where dedicated deposition and patterning has been performed to purposely form material 1002, 1102 either in ( Figure 10) or on ( Figure 11) the substrate 1004, 1104.
- the material 1002, 1102 is then used to form the redeposition layer by being sputtered during the sputter etching and redeposited to seal the cavity.
- Material 1002 may, for example, be obtained through the patterning and etching of substrate 1004 followed by the deposition and the chemical- mechanical polishing.
- Material 1102 may be obtained through deposition, patterning and etching.
- Material 1002, 1102 may be a subset of the layers used to create the device 1106.
- layers 1002, 1102 may be made of any suitable material such as oxide or nitride.
- FIG. 12 is a schematic cross sectional view of a structure prior to sputter etching according to another embodiment. As shown in Figure 12, two cavities 1204, 1206 are formed over the substrate 1202. The two cavities 1204, 1206 are connected by a passage 1210. Within the first cavity 1204, a device 1212 may be formed. Within the second cavity 1206, a blocker 1214 may be formed. The cavity 1206 having the blocker 1214 may be connected to a trench 1216 by a passage 1208. The blocker 1214 may comprise at least some of the same materials as the device 1212.
- the cavities 1204, 1206 may be sealed by sputter etching as described herein.
- the passage 1208 may be blocked or filled by sputter etching.
- the blocker 1214 performs the function of blocking any material from reaching device 1212. Because the blocker 1214 may comprise at least some of the same materials as the device 1212, the passage 1210 between the cavities 1204, 1206 may remain open. The blocker 1214 may not interfere with the device 1212 or degrade its performance.
- Figures 13A-C show a process for removing sacrificial material according to another embodiment.
- the sacrificial material 1304 has been exposed by removing a portion of the hard mask 1302.
- Figure 13B is a cross sectional view of the Figure 13A.
- the sacrificial material 1304 is exposed such that the sacrificial material 1304 may be removed by introducing the etching gases or liquids from the top of the sacrificial material 1304.
- the sacrificial material 1304 has been removed such that the cavities 1306 have a passage 1308 opened to the side of the cavities 1306.
- the embodiment shown in Figures 13A-13C show a side seal for the cavities 1306, but a top introduction of the etchant to remove the sacrificial material 1304.
- passages to the cavities have been shown to be near the relative bottom of the cavities, the passages could be located at the top or anywhere in the middle of the cavities.
- the horizontal and vertical design of the layers of the structure may be implemented such that they do not have any direct line-of- sight path between the enclosed device and the release hole entrance.
- Specific gases may also be added to the sputtering gas or gases to tailor the properties of some of the sputter etched material.
- Noble gases may be added during the sputter etch redeposition step.
- some gases, such as nitrogen or oxygen, may be added to the sputtered gases so that some initially conductive materials become insulating and deposit as an insulating seal over the passages to the cavities.
- a gettering precursor may be flowed into the cavities to remove any additional material after the sacrificial material has been removed.
- the gettering if used, is performed in addition to the sputter etching as opposed to as a stand alone process.
- a second sealing step can be performed in order to reinforce the seal created by sputter etch redeposition.
- the second sealing step may be performed by other conventional deposition processes such as electroless plating and electrochemical plating, PECVD, PVD, CVD, ALD, and combinations thereof.
- Reactive gases like SiH 4 , TEOS or O 2 could be used as precursors.
- the gases from any subsequent CVD or PECVD sealing step would not enter the cavity and would therefore not harm the device enclosed therein.
- further standard processing steps can be performed once the cavity has been sealed.
- noble gases such as Argon (Ar), Neon (Ne), Krypton (Kr), Helium (He) or Xenon (Xe) may be used.
- Argon and Helium will be preferably used because of their availability in most fabs.
- Other gases such as oxygen, nitrogen, and other gases such as for ion milling may be used.
- an HDP CVD chamber has been discussed, it is to be understood that the embodiments discussed herein may be performed in other processing chambers such as a PVD chamber, a sputter etching chamber, an ALD chamber, a CVD chamber, a PECVD chamber, an ion milling chamber, and others.
- the coil power source will preferably be a RF source having a frequency in the range 200-500 kHz and a RF power in the range 1000 - 5000 W.
- the bias power will preferably be independently controlled by a high frequency RF source having the industry standard frequency of 13.56 MHz and a RF power in the 500 - 3000 W. In one embodiment, the power may be as high as 10000W.
- the pressure in the apparatus could be as low as a few mT and as high as the maximum pressure which could be handled by the chamber. A higher pressure would maximize the amount of sidewall redeposition and is hence favorable for the sealing. However, the upper pressure can also be defined by the device requirements.
- HDP CVD device a single device for both sealing steps
- HDP CVD device the ability of HDP CVD to fill narrow gap is a definitive advantage for the sealing of devices having a narrow space between two opposing sidewall.
- devices within cavities formed in a structure can be sealed without exposing the device and cavity to reactive gases.
- the sputter etching can be performed to redeposit material into and around the passages leading to the cavity by the physical process as opposed to a chemical process to thereby not expose the device or cavity to reactive gases and without depositing material in the cavity or on the device.
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Priority Applications (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2010547696A JP2011513073A (ja) | 2008-02-22 | 2009-02-12 | キャビティをシールする方法 |
| EP09712954.8A EP2268568B1 (en) | 2008-02-22 | 2009-02-12 | Method of sealing a cavity |
| CN200980112054.4A CN101998930B (zh) | 2008-02-22 | 2009-02-12 | 密封腔体的方法 |
Applications Claiming Priority (4)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US6665508P | 2008-02-22 | 2008-02-22 | |
| US61/066,655 | 2008-02-22 | ||
| US12/267,186 | 2008-11-07 | ||
| US12/267,186 US7989262B2 (en) | 2008-02-22 | 2008-11-07 | Method of sealing a cavity |
Publications (2)
| Publication Number | Publication Date |
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| WO2009105382A2 true WO2009105382A2 (en) | 2009-08-27 |
| WO2009105382A3 WO2009105382A3 (en) | 2010-02-18 |
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| PCT/US2009/033927 Ceased WO2009105382A2 (en) | 2008-02-22 | 2009-02-12 | Method of sealing a cavity |
Country Status (6)
| Country | Link |
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| US (2) | US7989262B2 (enExample) |
| EP (1) | EP2268568B1 (enExample) |
| JP (2) | JP2011513073A (enExample) |
| CN (1) | CN101998930B (enExample) |
| TW (1) | TWI353338B (enExample) |
| WO (1) | WO2009105382A2 (enExample) |
Families Citing this family (10)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20120244715A1 (en) * | 2009-12-02 | 2012-09-27 | Xactix, Inc. | High-selectivity etching system and method |
| WO2012145485A2 (en) * | 2011-04-20 | 2012-10-26 | Cavendish Kinetics, Inc | Implantation of gaseous chemicals into cavities formed in intermediate dielectric layers for subsequent thermal diffusion release |
| US8492187B2 (en) * | 2011-09-29 | 2013-07-23 | International Business Machines Corporation | High throughput epitaxial liftoff for releasing multiple semiconductor device layers from a single base substrate |
| SE537584C2 (sv) * | 2011-12-15 | 2015-06-30 | Silex Microsystems Ab | Tunnfilmskapsling |
| US10703627B2 (en) | 2013-06-27 | 2020-07-07 | Soitec | Methods of fabricating semiconductor structures including cavities filled with a sacrificial material |
| US9330929B1 (en) * | 2014-10-13 | 2016-05-03 | Infineon Technologies Dresden Gmbh | Systems and methods for horizontal integration of acceleration sensor structures |
| CN105977221B (zh) * | 2016-04-28 | 2018-11-06 | 清华大学 | 气密性封装结构及封装方法 |
| JP6691234B2 (ja) * | 2016-07-22 | 2020-04-28 | ヒューレット−パッカード デベロップメント カンパニー エル.ピー.Hewlett‐Packard Development Company, L.P. | 基板アセンブリ及び関連方法 |
| DE102017218635B4 (de) | 2017-10-18 | 2021-03-18 | Infineon Technologies Ag | Verfahren zum Verschließen einer Zugangsöffnung zu einer Kavität und MEMS-Bauelement mit einem Verschlusselement |
| DE102019120886A1 (de) * | 2019-08-02 | 2021-02-04 | Infineon Technologies Ag | Halbleitergehäuse mit einem Hohlraum in seinem Gehäusekörper |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040020782A1 (en) | 2002-05-07 | 2004-02-05 | Memgen Corporation | Electrochemically fabricated hermetically sealed microstructures and methods of and apparatus for producing such structures |
| EP1433740A1 (en) | 2002-12-24 | 2004-06-30 | Interuniversitair Microelektronica Centrum Vzw | Method for the closure of openings in a film |
| US20070235501A1 (en) | 2006-03-29 | 2007-10-11 | John Heck | Self-packaging MEMS device |
Family Cites Families (85)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS63183181A (ja) | 1987-01-23 | 1988-07-28 | Anelva Corp | マグネトロンスパツタエツチング装置 |
| JPS63198378A (ja) | 1987-02-13 | 1988-08-17 | Nissan Motor Co Ltd | 振動センサの製造方法 |
| JPS63307758A (ja) | 1987-06-09 | 1988-12-15 | Nec Corp | 集積回路装置 |
| US5279669A (en) | 1991-12-13 | 1994-01-18 | International Business Machines Corporation | Plasma reactor for processing substrates comprising means for inducing electron cyclotron resonance (ECR) and ion cyclotron resonance (ICR) conditions |
| JP3287038B2 (ja) | 1991-12-19 | 2002-05-27 | ソニー株式会社 | 液晶表示装置 |
| US5270264A (en) | 1991-12-20 | 1993-12-14 | Intel Corporation | Process for filling submicron spaces with dielectric |
| US5292370A (en) | 1992-08-14 | 1994-03-08 | Martin Marietta Energy Systems, Inc. | Coupled microwave ECR and radio-frequency plasma source for plasma processing |
| US5346578A (en) | 1992-11-04 | 1994-09-13 | Novellus Systems, Inc. | Induction plasma source |
| US5614055A (en) | 1993-08-27 | 1997-03-25 | Applied Materials, Inc. | High density plasma CVD and etching reactor |
| US5504026A (en) | 1995-04-14 | 1996-04-02 | Analog Devices, Inc. | Methods for planarization and encapsulation of micromechanical devices in semiconductor processes |
| US5578976A (en) | 1995-06-22 | 1996-11-26 | Rockwell International Corporation | Micro electromechanical RF switch |
| US5696662A (en) | 1995-08-21 | 1997-12-09 | Honeywell Inc. | Electrostatically operated micromechanical capacitor |
| US6012336A (en) | 1995-09-06 | 2000-01-11 | Sandia Corporation | Capacitance pressure sensor |
| DE19638666C1 (de) | 1996-01-08 | 1997-11-20 | Siemens Ag | Schmelzsicherung mit einer Schutzschicht in einer integrierten Halbleiterschaltung sowie zugehöriges Herstellungsverfahren |
| US5807467A (en) | 1996-01-22 | 1998-09-15 | Micron Technology, Inc. | In situ preclean in a PVD chamber with a biased substrate configuration |
| US5730835A (en) | 1996-01-31 | 1998-03-24 | Micron Technology, Inc. | Facet etch for improved step coverage of integrated circuit contacts |
| JPH09257618A (ja) | 1996-03-26 | 1997-10-03 | Toyota Central Res & Dev Lab Inc | 静電容量型圧力センサおよびその製造方法 |
| US5919548A (en) | 1996-10-11 | 1999-07-06 | Sandia Corporation | Chemical-mechanical polishing of recessed microelectromechanical devices |
| US6268661B1 (en) | 1999-08-31 | 2001-07-31 | Nec Corporation | Semiconductor device and method of its fabrication |
| US5980349A (en) | 1997-05-14 | 1999-11-09 | Micron Technology, Inc. | Anodically-bonded elements for flat panel displays |
| US5872058A (en) | 1997-06-17 | 1999-02-16 | Novellus Systems, Inc. | High aspect ratio gapfill process by using HDP |
| DE19742729A1 (de) | 1997-09-26 | 1999-04-01 | Sca Hygiene Prod Gmbh | Verfahren zur Aufbereitung von Altpapier unter Vermeidung von Bioziden und Chlorverbindungen, sowie von Wasserstoffperoxid und Peressigsäure, Einrichtung zur Ausführung dieses Verfahrens sowie Recycling Tissuepapiere mit einer Gesamtkeimzahl kleiner 1000 KBE/g und einer Oberflächenkeimzahl kleiner 20 KBE/dm·2· |
| JPH11177067A (ja) | 1997-12-09 | 1999-07-02 | Sony Corp | メモリ素子およびメモリアレイ |
| US6395150B1 (en) | 1998-04-01 | 2002-05-28 | Novellus Systems, Inc. | Very high aspect ratio gapfill using HDP |
| FR2781499B1 (fr) | 1998-07-24 | 2000-09-08 | Atochem Elf Sa | Compositions de nettoyage ou de sechage a base de 1,1,1,2,3,4,4,5,5, 5 - decafluoropentane |
| US6153839A (en) | 1998-10-22 | 2000-11-28 | Northeastern University | Micromechanical switching devices |
| KR20090038040A (ko) | 1998-12-02 | 2009-04-17 | 폼팩터, 인크. | 전기 접촉 구조체의 제조 방법 |
| JP2000186931A (ja) | 1998-12-21 | 2000-07-04 | Murata Mfg Co Ltd | 小型電子部品及びその製造方法並びに該小型電子部品に用いるビアホールの成形方法 |
| US6174820B1 (en) | 1999-02-16 | 2001-01-16 | Sandia Corporation | Use of silicon oxynitride as a sacrificial material for microelectromechanical devices |
| US6274440B1 (en) | 1999-03-31 | 2001-08-14 | International Business Machines Corporation | Manufacturing of cavity fuses on gate conductor level |
| US6633055B2 (en) | 1999-04-30 | 2003-10-14 | International Business Machines Corporation | Electronic fuse structure and method of manufacturing |
| US6287940B1 (en) | 1999-08-02 | 2001-09-11 | Honeywell International Inc. | Dual wafer attachment process |
| US6500694B1 (en) | 2000-03-22 | 2002-12-31 | Ziptronix, Inc. | Three dimensional device integration method and integrated device |
| US6310339B1 (en) | 1999-10-28 | 2001-10-30 | Hrl Laboratories, Llc | Optically controlled MEM switches |
| JP2001133703A (ja) | 1999-11-04 | 2001-05-18 | Seiko Epson Corp | 半導体基板上に構造物を有する装置の製造方法および装置 |
| US20010040675A1 (en) | 2000-01-28 | 2001-11-15 | True Randall J. | Method for forming a micromechanical device |
| US6439693B1 (en) | 2000-05-04 | 2002-08-27 | Silverbrook Research Pty Ltd. | Thermal bend actuator |
| DE10024266B4 (de) * | 2000-05-17 | 2010-06-17 | Robert Bosch Gmbh | Verfahren zur Herstellung eines mikromechanischen Bauelements |
| US7153717B2 (en) | 2000-05-30 | 2006-12-26 | Ic Mechanics Inc. | Encapsulation of MEMS devices using pillar-supported caps |
| US7008812B1 (en) | 2000-05-30 | 2006-03-07 | Ic Mechanics, Inc. | Manufacture of MEMS structures in sealed cavity using dry-release MEMS device encapsulation |
| AU2001293220A1 (en) | 2000-08-23 | 2002-03-04 | Reflectivity, Inc. | Transition metal dielectric alloy materials for mems |
| US6535091B2 (en) | 2000-11-07 | 2003-03-18 | Sarnoff Corporation | Microelectronic mechanical systems (MEMS) switch and method of fabrication |
| DE10056716B4 (de) | 2000-11-15 | 2007-10-18 | Robert Bosch Gmbh | Mikrostrukturbauelement |
| DE10104868A1 (de) | 2001-02-03 | 2002-08-22 | Bosch Gmbh Robert | Mikromechanisches Bauelement sowie ein Verfahren zur Herstellung eines mikromechanischen Bauelements |
| JP2002280470A (ja) | 2001-03-22 | 2002-09-27 | Aisin Seiki Co Ltd | 半導体装置及びその製造方法 |
| US6958123B2 (en) | 2001-06-15 | 2005-10-25 | Reflectivity, Inc | Method for removing a sacrificial material with a compressed fluid |
| JP2003035874A (ja) | 2001-07-23 | 2003-02-07 | Nikon Corp | 薄膜スライド接続機構及びその製造方法並びにこれを用いたミラーデバイス及び光スイッチ |
| US6930364B2 (en) | 2001-09-13 | 2005-08-16 | Silicon Light Machines Corporation | Microelectronic mechanical system and methods |
| WO2003028059A1 (en) | 2001-09-21 | 2003-04-03 | Hrl Laboratories, Llc | Mems switches and methods of making same |
| US6635506B2 (en) | 2001-11-07 | 2003-10-21 | International Business Machines Corporation | Method of fabricating micro-electromechanical switches on CMOS compatible substrates |
| EP1454349B1 (en) | 2001-11-09 | 2006-09-27 | WiSpry, Inc. | Trilayered beam mems device and related methods |
| FR2835963B1 (fr) | 2002-02-11 | 2006-03-10 | Memscap | Micro-composant du type micro-interrupteur et procede de fabrication d'un tel micro-composant |
| EP1493183B1 (en) | 2002-04-02 | 2012-12-05 | Dow Global Technologies LLC | Process for making air gap containing semiconducting devices and resulting semiconducting device |
| US6635509B1 (en) | 2002-04-12 | 2003-10-21 | Dalsa Semiconductor Inc. | Wafer-level MEMS packaging |
| US7064637B2 (en) | 2002-07-18 | 2006-06-20 | Wispry, Inc. | Recessed electrode for electrostatically actuated structures |
| US7429495B2 (en) | 2002-08-07 | 2008-09-30 | Chang-Feng Wan | System and method of fabricating micro cavities |
| US6936494B2 (en) | 2002-10-23 | 2005-08-30 | Rutgers, The State University Of New Jersey | Processes for hermetically packaging wafer level microscopic structures |
| TWI236453B (en) | 2002-12-03 | 2005-07-21 | Microfabrica Inc | Electrochemical fabrication process for producing a three-dimensional structure from a plurality of adhered layers |
| US20040157426A1 (en) | 2003-02-07 | 2004-08-12 | Luc Ouellet | Fabrication of advanced silicon-based MEMS devices |
| EP1450406A1 (en) | 2003-02-19 | 2004-08-25 | Cavendish Kinetics Limited | Micro fuse |
| US20040166603A1 (en) | 2003-02-25 | 2004-08-26 | Carley L. Richard | Micromachined assembly with a multi-layer cap defining a cavity |
| NL1023275C2 (nl) | 2003-04-25 | 2004-10-27 | Cavendish Kinetics Ltd | Werkwijze voor het vervaardigen van een micro-mechanisch element. |
| TWI232843B (en) | 2003-05-07 | 2005-05-21 | Microfabrica Inc | Electrochemical fabrication methods including use of surface treatments to reduce overplating and/or planarization during formation of multi-layer three-dimensional structures |
| US6917459B2 (en) | 2003-06-03 | 2005-07-12 | Hewlett-Packard Development Company, L.P. | MEMS device and method of forming MEMS device |
| JP3808092B2 (ja) * | 2003-08-08 | 2006-08-09 | 松下電器産業株式会社 | 電子デバイスおよびその製造方法 |
| US7060624B2 (en) | 2003-08-13 | 2006-06-13 | International Business Machines Corporation | Deep filled vias |
| US6861277B1 (en) | 2003-10-02 | 2005-03-01 | Hewlett-Packard Development Company, L.P. | Method of forming MEMS device |
| DE10353767B4 (de) | 2003-11-17 | 2005-09-29 | Infineon Technologies Ag | Vorrichtung zur Häusung einer mikromechanischen Struktur und Verfahren zur Herstellung derselben |
| US7163896B1 (en) | 2003-12-10 | 2007-01-16 | Novellus Systems, Inc. | Biased H2 etch process in deposition-etch-deposition gap fill |
| US7344996B1 (en) | 2005-06-22 | 2008-03-18 | Novellus Systems, Inc. | Helium-based etch process in deposition-etch-deposition gap fill |
| JP2005183557A (ja) | 2003-12-18 | 2005-07-07 | Canon Inc | 半導体集積回路とその動作方法、該回路を備えたicカード |
| FR2864340B1 (fr) * | 2003-12-19 | 2006-03-24 | Commissariat Energie Atomique | Microcomposant comportant une microcavite hermetique et procede de fabrication d'un tel microcomposant |
| GB0330010D0 (en) | 2003-12-24 | 2004-01-28 | Cavendish Kinetics Ltd | Method for containing a device and a corresponding device |
| JP4617743B2 (ja) * | 2004-07-06 | 2011-01-26 | ソニー株式会社 | 機能素子およびその製造方法、ならびに流体吐出ヘッド |
| FR2874213B1 (fr) * | 2004-08-13 | 2007-03-02 | Commissariat Energie Atomique | Dispositif comprenant un microsysteme encapsule et procede de fabrication |
| US7344907B2 (en) | 2004-11-19 | 2008-03-18 | International Business Machines Corporation | Apparatus and methods for encapsulating microelectromechanical (MEM) devices on a wafer scale |
| US7482193B2 (en) | 2004-12-20 | 2009-01-27 | Honeywell International Inc. | Injection-molded package for MEMS inertial sensor |
| US7211525B1 (en) | 2005-03-16 | 2007-05-01 | Novellus Systems, Inc. | Hydrogen treatment enhanced gap fill |
| US7576426B2 (en) | 2005-04-01 | 2009-08-18 | Skyworks Solutions, Inc. | Wafer level package including a device wafer integrated with a passive component |
| US7329586B2 (en) | 2005-06-24 | 2008-02-12 | Applied Materials, Inc. | Gapfill using deposition-etch sequence |
| GB0515980D0 (en) | 2005-08-03 | 2005-09-07 | Cavendish Kinetics Ltd | Memory cell for a circuit and method of operation therefor |
| GB0516148D0 (en) | 2005-08-05 | 2005-09-14 | Cavendish Kinetics Ltd | Method of integrating an element |
| GB0523715D0 (en) | 2005-11-22 | 2005-12-28 | Cavendish Kinetics Ltd | Method of minimising contact area |
| GB0523713D0 (en) | 2005-11-22 | 2005-12-28 | Cavendish Kinetics Ltd | Enclosure method |
| JP2007253265A (ja) * | 2006-03-22 | 2007-10-04 | Sony Corp | 電気機械素子の製造方法 |
-
2008
- 2008-11-07 US US12/267,186 patent/US7989262B2/en active Active
-
2009
- 2009-02-12 WO PCT/US2009/033927 patent/WO2009105382A2/en not_active Ceased
- 2009-02-12 JP JP2010547696A patent/JP2011513073A/ja active Pending
- 2009-02-12 CN CN200980112054.4A patent/CN101998930B/zh active Active
- 2009-02-12 EP EP09712954.8A patent/EP2268568B1/en active Active
- 2009-02-19 TW TW098105313A patent/TWI353338B/zh active
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2011
- 2011-08-01 US US13/195,215 patent/US8395249B2/en active Active
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2012
- 2012-09-12 JP JP2012200158A patent/JP2013031919A/ja active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US20040020782A1 (en) | 2002-05-07 | 2004-02-05 | Memgen Corporation | Electrochemically fabricated hermetically sealed microstructures and methods of and apparatus for producing such structures |
| EP1433740A1 (en) | 2002-12-24 | 2004-06-30 | Interuniversitair Microelektronica Centrum Vzw | Method for the closure of openings in a film |
| US20070235501A1 (en) | 2006-03-29 | 2007-10-11 | John Heck | Self-packaging MEMS device |
Also Published As
| Publication number | Publication date |
|---|---|
| EP2268568B1 (en) | 2014-12-17 |
| US20090215214A1 (en) | 2009-08-27 |
| US8395249B2 (en) | 2013-03-12 |
| CN101998930A (zh) | 2011-03-30 |
| CN101998930B (zh) | 2012-12-05 |
| JP2011513073A (ja) | 2011-04-28 |
| TW200938480A (en) | 2009-09-16 |
| US20110285035A1 (en) | 2011-11-24 |
| JP2013031919A (ja) | 2013-02-14 |
| US7989262B2 (en) | 2011-08-02 |
| WO2009105382A3 (en) | 2010-02-18 |
| EP2268568A2 (en) | 2011-01-05 |
| TWI353338B (en) | 2011-12-01 |
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