JP2011139365A - パルスエッジ選択回路と、それを使ったパルス生成回路、サンプルホールド回路及び固体撮像装置 - Google Patents

パルスエッジ選択回路と、それを使ったパルス生成回路、サンプルホールド回路及び固体撮像装置 Download PDF

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Publication number
JP2011139365A
JP2011139365A JP2009298821A JP2009298821A JP2011139365A JP 2011139365 A JP2011139365 A JP 2011139365A JP 2009298821 A JP2009298821 A JP 2009298821A JP 2009298821 A JP2009298821 A JP 2009298821A JP 2011139365 A JP2011139365 A JP 2011139365A
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JP
Japan
Prior art keywords
clock
pulse
circuit
gate
output
Prior art date
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Pending
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JP2009298821A
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English (en)
Japanese (ja)
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JP2011139365A5 (enExample
Inventor
Masaaki Iwane
正晃 岩根
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Canon Inc
Original Assignee
Canon Inc
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Filing date
Publication date
Application filed by Canon Inc filed Critical Canon Inc
Priority to JP2009298821A priority Critical patent/JP2011139365A/ja
Priority to US12/957,187 priority patent/US8368431B2/en
Publication of JP2011139365A publication Critical patent/JP2011139365A/ja
Publication of JP2011139365A5 publication Critical patent/JP2011139365A5/ja
Pending legal-status Critical Current

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    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/153—Arrangements in which a pulse is delivered at the instant when a predetermined characteristic of an input signal is present or at a fixed time interval after this instant
    • H03K5/1534—Transition or edge detectors
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K5/15—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors
    • H03K5/151—Arrangements in which pulses are delivered at different times at several outputs, i.e. pulse distributors with two complementary outputs
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L25/00—Baseband systems
    • H04L25/02—Details ; arrangements for supplying electrical power along data transmission lines
    • H04L25/06—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection
    • H04L25/069—DC level restoring means; Bias distortion correction ; Decision circuits providing symbol by symbol detection by detecting edges or zero crossings
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00013—Delay, i.e. output pulse is delayed after input pulse and pulse length of output pulse is dependent on pulse length of input pulse
    • H03K2005/00019—Variable delay
    • H03K2005/00026—Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter
    • H03K2005/00052—Variable delay controlled by an analog electrical signal, e.g. obtained after conversion by a D/A converter by mixing the outputs of fixed delayed signals with each other or with the input signal
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K5/00—Manipulating of pulses not covered by one of the other main groups of this subclass
    • H03K2005/00286—Phase shifter, i.e. the delay between the output and input pulse is dependent on the frequency, and such that a phase difference is obtained independent of the frequency

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  • Physics & Mathematics (AREA)
  • Nonlinear Science (AREA)
  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Manipulation Of Pulses (AREA)
  • Pulse Circuits (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
JP2009298821A 2009-12-28 2009-12-28 パルスエッジ選択回路と、それを使ったパルス生成回路、サンプルホールド回路及び固体撮像装置 Pending JP2011139365A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009298821A JP2011139365A (ja) 2009-12-28 2009-12-28 パルスエッジ選択回路と、それを使ったパルス生成回路、サンプルホールド回路及び固体撮像装置
US12/957,187 US8368431B2 (en) 2009-12-28 2010-11-30 Pulse edge selection circuit, and pulse generation circuit, sample-hold circuit, and solid-state image sensor using the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009298821A JP2011139365A (ja) 2009-12-28 2009-12-28 パルスエッジ選択回路と、それを使ったパルス生成回路、サンプルホールド回路及び固体撮像装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2014090473A Division JP5850975B2 (ja) 2014-04-24 2014-04-24 パルス生成回路、サンプルホールド回路、固体撮像装置

Publications (2)

Publication Number Publication Date
JP2011139365A true JP2011139365A (ja) 2011-07-14
JP2011139365A5 JP2011139365A5 (enExample) 2013-02-14

Family

ID=44186828

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009298821A Pending JP2011139365A (ja) 2009-12-28 2009-12-28 パルスエッジ選択回路と、それを使ったパルス生成回路、サンプルホールド回路及び固体撮像装置

Country Status (2)

Country Link
US (1) US8368431B2 (enExample)
JP (1) JP2011139365A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016502799A (ja) * 2012-11-15 2016-01-28 マイクロチップ テクノロジー インコーポレイテッドＭｉｃｒｏｃｈｉｐ Ｔｅｃｈｎｏｌｏｇｙ Ｉｎｃｏｒｐｏｒａｔｅｄ 相補出力ジェネレータモジュール
JP2019512941A (ja) * 2016-03-10 2019-05-16 アナログ ディヴァイスィズ インク 任意の幅を有する高解像度パルスを生成するためのタイミング発生器
JP2023515232A (ja) * 2020-03-12 2023-04-12 湖南轂梁微電子有限公司 超高精度デジタルパルス信号発生回路及び方法

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7471871B2 (ja) 2020-03-10 2024-04-22 キヤノン株式会社 電子デバイス、システム及び電子デバイスの制御方法

Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6083415A (ja) * 1983-10-14 1985-05-11 Sony Corp 可変遅延回路
JPS62176320A (ja) * 1986-01-30 1987-08-03 Oki Electric Ind Co Ltd 半導体集積回路用入力回路
JPH04192914A (ja) * 1990-11-27 1992-07-13 Mitsubishi Electric Corp 半導体集積回路
JPH06326574A (ja) * 1993-05-18 1994-11-25 Mega Chips:Kk 制御信号発生回路，パルス幅変調回路，遅延制御回路およびクロック発生回路
JPH07202652A (ja) * 1993-12-20 1995-08-04 Hewlett Packard Co <Hp> 位相変調クロックパルス発生器
JP2000232346A (ja) * 1998-08-11 2000-08-22 Toshiba Corp パルス幅変調波形発生回路
JP2004343395A (ja) * 2003-05-15 2004-12-02 Fuji Electric Device Technology Co Ltd パルス幅変調回路

Family Cites Families (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009044579A (ja) 2007-08-10 2009-02-26 Seiko Epson Corp クロック生成回路及び電子機器
JP2009249166A (ja) * 2008-04-10 2009-10-29 Seiko Epson Corp パルス信号生成装置、搬送装置、画像形成装置及びパルス生成方法
JP5588254B2 (ja) * 2009-08-04 2014-09-10 キヤノン株式会社 遅延同期ループ回路

Patent Citations (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6083415A (ja) * 1983-10-14 1985-05-11 Sony Corp 可変遅延回路
JPS62176320A (ja) * 1986-01-30 1987-08-03 Oki Electric Ind Co Ltd 半導体集積回路用入力回路
JPH04192914A (ja) * 1990-11-27 1992-07-13 Mitsubishi Electric Corp 半導体集積回路
JPH06326574A (ja) * 1993-05-18 1994-11-25 Mega Chips:Kk 制御信号発生回路，パルス幅変調回路，遅延制御回路およびクロック発生回路
JPH07202652A (ja) * 1993-12-20 1995-08-04 Hewlett Packard Co <Hp> 位相変調クロックパルス発生器
JP2000232346A (ja) * 1998-08-11 2000-08-22 Toshiba Corp パルス幅変調波形発生回路
JP2004343395A (ja) * 2003-05-15 2004-12-02 Fuji Electric Device Technology Co Ltd パルス幅変調回路

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2016502799A (ja) * 2012-11-15 2016-01-28 マイクロチップ テクノロジー インコーポレイテッドＭｉｃｒｏｃｈｉｐ Ｔｅｃｈｎｏｌｏｇｙ Ｉｎｃｏｒｐｏｒａｔｅｄ 相補出力ジェネレータモジュール
JP2019512941A (ja) * 2016-03-10 2019-05-16 アナログ ディヴァイスィズ インク 任意の幅を有する高解像度パルスを生成するためのタイミング発生器
JP2023515232A (ja) * 2020-03-12 2023-04-12 湖南轂梁微電子有限公司 超高精度デジタルパルス信号発生回路及び方法
JP7362169B2 (ja) 2020-03-12 2023-10-17 湖南轂梁微電子有限公司 超高精度デジタルパルス信号発生回路及び方法

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Publication number Publication date
US20110156939A1 (en) 2011-06-30
US8368431B2 (en) 2013-02-05

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