JP2011090865A - 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法 - Google Patents

導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法 Download PDF

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Publication number
JP2011090865A
JP2011090865A JP2009243028A JP2009243028A JP2011090865A JP 2011090865 A JP2011090865 A JP 2011090865A JP 2009243028 A JP2009243028 A JP 2009243028A JP 2009243028 A JP2009243028 A JP 2009243028A JP 2011090865 A JP2011090865 A JP 2011090865A
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JP
Japan
Prior art keywords
conductive film
layer
anodized layer
linear conductors
connection terminal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009243028A
Other languages
English (en)
Japanese (ja)
Other versions
JP2011090865A5 (enExample
Inventor
Michio Horiuchi
道夫 堀内
Yasue Tokutake
安衛 徳武
Yuichi Matsuda
勇一 松田
Takeshi Kobayashi
壮 小林
Tatsuaki Denda
達明 伝田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Shinko Electric Industries Co Ltd
Original Assignee
Shinko Electric Industries Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shinko Electric Industries Co Ltd filed Critical Shinko Electric Industries Co Ltd
Priority to JP2009243028A priority Critical patent/JP2011090865A/ja
Priority to US12/909,096 priority patent/US20110095419A1/en
Publication of JP2011090865A publication Critical patent/JP2011090865A/ja
Publication of JP2011090865A5 publication Critical patent/JP2011090865A5/ja
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/48Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the groups H01L21/18 - H01L21/326 or H10D48/04 - H10D48/07
    • H01L21/4814Conductive parts
    • H01L21/4846Leads on or in insulating or insulated substrates, e.g. metallisation
    • H01L21/486Via connections through the substrate with or without pins
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/48Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49827Via connections through the substrates, e.g. pins going through the substrate, coaxial cables
    • H10W70/095
    • H10W70/635
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/812Applying energy for connecting
    • H01L2224/81201Compression bonding
    • H01L2224/81203Thermocompression bonding, e.g. diffusion bonding, pressure joining, thermocompression welding or solid-state welding
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • H01L2224/818Bonding techniques
    • H01L2224/81801Soldering or alloying
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/10Bump connectors ; Manufacturing methods related thereto
    • H01L24/12Structure, shape, material or disposition of the bump connectors prior to the connecting process
    • H01L24/13Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01078Platinum [Pt]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10Details of semiconductor or other solid state devices to be connected
    • H01L2924/11Device type
    • H01L2924/12Passive devices, e.g. 2 terminal devices
    • H01L2924/1204Optical Diode
    • H01L2924/12044OLED
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09818Shape or layout details not covered by a single group of H05K2201/09009 - H05K2201/09809
    • H05K2201/09945Universal aspects, e.g. universal inner layers or via grid, or anisotropic interposer
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10227Other objects, e.g. metallic pieces
    • H05K2201/10378Interposers
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/03Metal processing
    • H05K2203/0315Oxidising metal
    • H10W72/07232
    • H10W72/07236
    • H10W72/20
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Ceramic Engineering (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Non-Insulated Conductors (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
JP2009243028A 2009-10-22 2009-10-22 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法 Pending JP2011090865A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2009243028A JP2011090865A (ja) 2009-10-22 2009-10-22 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法
US12/909,096 US20110095419A1 (en) 2009-10-22 2010-10-21 Conductive film, method of manufacturing the same, semiconductor device and method of manufacturing the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2009243028A JP2011090865A (ja) 2009-10-22 2009-10-22 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法

Publications (2)

Publication Number Publication Date
JP2011090865A true JP2011090865A (ja) 2011-05-06
JP2011090865A5 JP2011090865A5 (enExample) 2012-08-30

Family

ID=43897689

Family Applications (1)

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JP2009243028A Pending JP2011090865A (ja) 2009-10-22 2009-10-22 導電フィルムおよびその製造方法、並びに半導体装置およびその製造方法

Country Status (2)

Country Link
US (1) US20110095419A1 (enExample)
JP (1) JP2011090865A (enExample)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017150058A1 (ja) * 2016-02-29 2017-09-08 富士フイルム株式会社 異方導電性接合部材、半導体デバイス、半導体パッケージおよび半導体デバイスの製造方法
WO2017203884A1 (ja) * 2016-05-27 2017-11-30 富士フイルム株式会社 異方導電材、電子素子、半導体素子を含む構造体および電子素子の製造方法
JP2018037509A (ja) * 2016-08-31 2018-03-08 富士フイルム株式会社 多層配線基板の製造方法
JP2020107834A (ja) * 2018-12-28 2020-07-09 大日本印刷株式会社 電子ユニット
JPWO2022044585A1 (enExample) * 2020-08-24 2022-03-03

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR101739742B1 (ko) * 2010-11-11 2017-05-25 삼성전자 주식회사 반도체 패키지 및 이를 포함하는 반도체 시스템
US9226396B2 (en) * 2013-03-12 2015-12-29 Invensas Corporation Porous alumina templates for electronic packages
JP2014216552A (ja) * 2013-04-26 2014-11-17 富士通株式会社 積層構造体及びその製造方法
US11139262B2 (en) 2019-02-07 2021-10-05 Micron Technology, Inc. Use of pre-channeled materials for anisotropic conductors
KR102608888B1 (ko) * 2019-06-04 2023-12-01 (주)포인트엔지니어링 전기접속용 양극산화막 및 광소자 디스플레이 및 광소자 디스플레이 제조 방법
KR102865650B1 (ko) * 2020-01-31 2025-09-29 (주)포인트엔지니어링 프로브 헤드 및 이를 포함하는 프로브 카드

Citations (1)

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JPH04126307A (ja) * 1990-03-16 1992-04-27 Ricoh Co Ltd 異方性導電膜およびその製造方法

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EP0854506A3 (en) * 1987-03-04 1999-03-31 Canon Kabushiki Kaisha Electrically connecting member and electric circuit member
US5379515A (en) * 1989-12-11 1995-01-10 Canon Kabushiki Kaisha Process for preparing electrical connecting member
JPH10308565A (ja) * 1997-05-02 1998-11-17 Shinko Electric Ind Co Ltd 配線基板
JP2003034894A (ja) * 2001-07-25 2003-02-07 Kobe Steel Ltd 耐腐食性に優れたAl合金部材
DE602004018720D1 (de) * 2003-09-09 2009-02-12 Nitto Denko Corp Anisotrop-leitender Film , Herstellungs- und Gebrauchsverfahren
TWI255466B (en) * 2004-10-08 2006-05-21 Ind Tech Res Inst Polymer-matrix conductive film and method for fabricating the same
JP5143045B2 (ja) * 2008-07-09 2013-02-13 富士フイルム株式会社 微細構造体およびその製造方法

Patent Citations (1)

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Publication number Priority date Publication date Assignee Title
JPH04126307A (ja) * 1990-03-16 1992-04-27 Ricoh Co Ltd 異方性導電膜およびその製造方法

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2017150058A1 (ja) * 2016-02-29 2017-09-08 富士フイルム株式会社 異方導電性接合部材、半導体デバイス、半導体パッケージおよび半導体デバイスの製造方法
KR102110258B1 (ko) * 2016-02-29 2020-05-13 후지필름 가부시키가이샤 이방 도전성 접합 부재, 반도체 디바이스, 반도체 패키지 및 반도체 디바이스의 제조 방법
US10559548B2 (en) 2016-02-29 2020-02-11 Fujifilm Corporation Anisotropic conductive bonding member, semiconductor device, semiconductor package and semiconductor device production method
KR20180105205A (ko) * 2016-02-29 2018-09-27 후지필름 가부시키가이샤 이방 도전성 접합 부재, 반도체 디바이스, 반도체 패키지 및 반도체 디바이스의 제조 방법
JPWO2017150058A1 (ja) * 2016-02-29 2018-11-08 富士フイルム株式会社 異方導電性接合部材、半導体デバイス、半導体パッケージおよび半導体デバイスの製造方法
JPWO2017203884A1 (ja) * 2016-05-27 2019-02-21 富士フイルム株式会社 異方導電材、電子素子、半導体素子を含む構造体および電子素子の製造方法
KR20180134970A (ko) * 2016-05-27 2018-12-19 후지필름 가부시키가이샤 이방 도전재, 전자 소자, 반도체 소자를 포함하는 구조체 및 전자 소자의 제조 방법
WO2017203884A1 (ja) * 2016-05-27 2017-11-30 富士フイルム株式会社 異方導電材、電子素子、半導体素子を含む構造体および電子素子の製造方法
KR102134135B1 (ko) * 2016-05-27 2020-07-15 후지필름 가부시키가이샤 전자 소자, 및 반도체 소자를 포함하는 구조체
JP2018037509A (ja) * 2016-08-31 2018-03-08 富士フイルム株式会社 多層配線基板の製造方法
JP2020107834A (ja) * 2018-12-28 2020-07-09 大日本印刷株式会社 電子ユニット
JPWO2022044585A1 (enExample) * 2020-08-24 2022-03-03
WO2022044585A1 (ja) * 2020-08-24 2022-03-03 富士フイルム株式会社 金属充填微細構造体の製造方法
JP7506753B2 (ja) 2020-08-24 2024-06-26 富士フイルム株式会社 金属充填微細構造体の製造方法

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