JP2010093771A5 - - Google Patents

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Publication number
JP2010093771A5
JP2010093771A5 JP2009010679A JP2009010679A JP2010093771A5 JP 2010093771 A5 JP2010093771 A5 JP 2010093771A5 JP 2009010679 A JP2009010679 A JP 2009010679A JP 2009010679 A JP2009010679 A JP 2009010679A JP 2010093771 A5 JP2010093771 A5 JP 2010093771A5
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JP
Japan
Prior art keywords
clock
phase
delay
unit
control signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2009010679A
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English (en)
Japanese (ja)
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JP2010093771A (ja
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Publication date
Priority claimed from KR1020080100255A external-priority patent/KR100980405B1/ko
Application filed filed Critical
Publication of JP2010093771A publication Critical patent/JP2010093771A/ja
Publication of JP2010093771A5 publication Critical patent/JP2010093771A5/ja
Pending legal-status Critical Current

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JP2009010679A 2008-10-13 2009-01-21 Dll回路 Pending JP2010093771A (ja)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020080100255A KR100980405B1 (ko) 2008-10-13 2008-10-13 Dll 회로

Publications (2)

Publication Number Publication Date
JP2010093771A JP2010093771A (ja) 2010-04-22
JP2010093771A5 true JP2010093771A5 (enExample) 2012-03-08

Family

ID=42098306

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2009010679A Pending JP2010093771A (ja) 2008-10-13 2009-01-21 Dll回路

Country Status (4)

Country Link
US (1) US7821311B2 (enExample)
JP (1) JP2010093771A (enExample)
KR (1) KR100980405B1 (enExample)
TW (1) TWI488440B (enExample)

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Publication number Priority date Publication date Assignee Title
KR101022669B1 (ko) * 2008-12-02 2011-03-22 주식회사 하이닉스반도체 지연고정루프회로
US7872507B2 (en) * 2009-01-21 2011-01-18 Micron Technology, Inc. Delay lines, methods for delaying a signal, and delay lock loops
CA2714458C (en) * 2010-09-15 2012-02-21 Philip Y.W. Tsui Low current consumption electrical control switch
KR20120111282A (ko) * 2011-03-31 2012-10-10 에스케이하이닉스 주식회사 클럭 신호 생성회로
JP6241246B2 (ja) * 2013-12-10 2017-12-06 セイコーエプソン株式会社 検出装置、センサー、電子機器及び移動体
JP5880603B2 (ja) * 2014-03-19 2016-03-09 日本電気株式会社 クロック発生装置、サーバシステムおよびクロック制御方法
CN106026994B (zh) * 2016-05-16 2019-03-01 东南大学 一种基于pvtm的宽电压时钟拉伸电路
KR101765306B1 (ko) * 2016-08-19 2017-08-07 아주대학교산학협력단 분수형 주파수체배 지연고정루프
US10659059B2 (en) * 2018-10-02 2020-05-19 Texas Instruments Incorporated Multi-phase clock generation circuit
JP6903195B1 (ja) * 2020-05-15 2021-07-14 華邦電子股▲ふん▼有限公司Winbond Electronics Corp. 遅延ロックループデバイスとその動作方法
US10965292B1 (en) 2020-06-08 2021-03-30 Winbond Electronics Corp. Delay-locked loop device and operation method therefor
KR20220003712A (ko) * 2020-07-02 2022-01-11 삼성전자주식회사 지연 고정 루프 회로의 지연 회로 및 지연 고정 루프 회로
KR102532895B1 (ko) * 2021-01-28 2023-05-15 고려대학교 산학협력단 적응형 위상 회전자 지연 고정 루프 및 그 동작 방법
US11742862B2 (en) * 2021-08-25 2023-08-29 Nanya Technology Corporation Delay locked loop device and method for operating the same

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US4069462A (en) * 1976-12-13 1978-01-17 Data General Corporation Phase-locked loops
DE68915228T2 (de) * 1988-09-02 1994-12-15 Sanyo Electric Co Phasensynchronisierschaltung in einem Videosignalempfänger und Verfahren zur Herstellung der Phasensynchronisation.
JPH08180678A (ja) * 1994-12-27 1996-07-12 Hitachi Ltd ダイナミック型ram
JP3189774B2 (ja) * 1998-01-28 2001-07-16 日本電気株式会社 ビット同期回路
US6219397B1 (en) * 1998-03-20 2001-04-17 Samsung Electronics Co., Ltd. Low phase noise CMOS fractional-N frequency synthesizer for wireless communications
JPH11346145A (ja) * 1998-05-29 1999-12-14 Nec Corp 多相クロック生成回路及び方法
US6310498B1 (en) * 1998-12-09 2001-10-30 Agere Systems Guardian Corp. Digital phase selection circuitry and method for reducing jitter
US6326826B1 (en) * 1999-05-27 2001-12-04 Silicon Image, Inc. Wide frequency-range delay-locked loop circuit
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JP2001007698A (ja) * 1999-06-25 2001-01-12 Mitsubishi Electric Corp データpll回路
JP3622685B2 (ja) * 2000-10-19 2005-02-23 セイコーエプソン株式会社 サンプリングクロック生成回路、データ転送制御装置及び電子機器
US6809567B1 (en) * 2001-04-09 2004-10-26 Silicon Image System and method for multiple-phase clock generation
US6690243B1 (en) * 2001-06-07 2004-02-10 Cypress Semiconductor Corp. Multi-phase voltage-controlled oscillator at modulated, operating frequency
TW525350B (en) * 2001-12-20 2003-03-21 Realtek Semiconductor Co Ltd Hybrid phase locked loop
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JP4031671B2 (ja) * 2002-06-11 2008-01-09 松下電器産業株式会社 クロックリカバリ回路
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JP4660076B2 (ja) * 2003-06-23 2011-03-30 ルネサスエレクトロニクス株式会社 クロック発生回路
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