TWI488440B - 延遲鎖定迴路電路及具有延遲鎖定迴路電路之記憶裝置 - Google Patents

延遲鎖定迴路電路及具有延遲鎖定迴路電路之記憶裝置 Download PDF

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Publication number
TWI488440B
TWI488440B TW098122594A TW98122594A TWI488440B TW I488440 B TWI488440 B TW I488440B TW 098122594 A TW098122594 A TW 098122594A TW 98122594 A TW98122594 A TW 98122594A TW I488440 B TWI488440 B TW I488440B
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TW
Taiwan
Prior art keywords
signal
phase
clock signal
delay
unit
Prior art date
Application number
TW098122594A
Other languages
English (en)
Chinese (zh)
Other versions
TW201015864A (en
Inventor
Yong-Ju Kim
Sung-Woo Han
Hee-Woong Song
Ic-Su Oh
Hyung-Soo Kim
Tae-Jin Hwang
Hae-Rang Choi
Ji-Wang Lee
Jae-Min Jang
Chang-Kun Park
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Hynix Semiconductor Inc
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Publication of TW201015864A publication Critical patent/TW201015864A/zh
Application granted granted Critical
Publication of TWI488440B publication Critical patent/TWI488440B/zh

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Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/07—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop using several loops, e.g. for redundant clock signal generation
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0814—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the phase shifting device being digitally controlled
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 
    • G11C7/222—Clock generating, synchronizing or distributing circuits within memory device
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
    • H03L7/0812—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used
    • H03L7/0816—Details of the phase-locked loop provided with an additional controlled phase shifter and where no voltage or current controlled oscillator is used the controlled phase shifter and the frequency- or phase-detection arrangement being connected to a common input
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H03L7/08—Details of the phase-locked loop
    • H03L7/099—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop
    • H03L7/0995—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator
    • H03L7/0998—Details of the phase-locked loop concerning mainly the controlled oscillator of the loop the oscillator comprising a ring oscillator using phase interpolation
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C2207/00—Indexing scheme relating to arrangements for writing information into, or reading information out from, a digital store
    • G11C2207/22—Control and timing of internal memory operations
    • G11C2207/2254—Calibration

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Pulse Circuits (AREA)
  • Dram (AREA)
TW098122594A 2008-10-13 2009-07-03 延遲鎖定迴路電路及具有延遲鎖定迴路電路之記憶裝置 TWI488440B (zh)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020080100255A KR100980405B1 (ko) 2008-10-13 2008-10-13 Ｄｌｌ 회로

Publications (2)

Publication Number Publication Date
TW201015864A TW201015864A (en) 2010-04-16
TWI488440B true TWI488440B (zh) 2015-06-11

Family

ID=42098306

Family Applications (1)

Application Number Title Priority Date Filing Date
TW098122594A TWI488440B (zh) 2008-10-13 2009-07-03 延遲鎖定迴路電路及具有延遲鎖定迴路電路之記憶裝置

Country Status (4)

Country Link
US (1) US7821311B2 (enExample)
JP (1) JP2010093771A (enExample)
KR (1) KR100980405B1 (enExample)
TW (1) TWI488440B (enExample)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10965292B1 (en) 2020-06-08 2021-03-30 Winbond Electronics Corp. Delay-locked loop device and operation method therefor
TWI786936B (zh) * 2021-08-25 2022-12-11 南亞科技股份有限公司 延遲鎖相迴路裝置及延遲方法

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KR101022669B1 (ko) * 2008-12-02 2011-03-22 주식회사 하이닉스반도체 지연고정루프회로
US7872507B2 (en) * 2009-01-21 2011-01-18 Micron Technology, Inc. Delay lines, methods for delaying a signal, and delay lock loops
CA2714458C (en) * 2010-09-15 2012-02-21 Philip Y.W. Tsui Low current consumption electrical control switch
KR20120111282A (ko) * 2011-03-31 2012-10-10 에스케이하이닉스 주식회사 클럭 신호 생성회로
JP6241246B2 (ja) * 2013-12-10 2017-12-06 セイコーエプソン株式会社 検出装置、センサー、電子機器及び移動体
JP5880603B2 (ja) * 2014-03-19 2016-03-09 日本電気株式会社 クロック発生装置、サーバシステムおよびクロック制御方法
CN106026994B (zh) * 2016-05-16 2019-03-01 东南大学 一种基于pvtm的宽电压时钟拉伸电路
KR101765306B1 (ko) * 2016-08-19 2017-08-07 아주대학교산학협력단 분수형 주파수체배 지연고정루프
US10659059B2 (en) * 2018-10-02 2020-05-19 Texas Instruments Incorporated Multi-phase clock generation circuit
JP6903195B1 (ja) * 2020-05-15 2021-07-14 華邦電子股▲ふん▼有限公司Ｗｉｎｂｏｎｄ Ｅｌｅｃｔｒｏｎｉｃｓ Ｃｏｒｐ． 遅延ロックループデバイスとその動作方法
KR20220003712A (ko) * 2020-07-02 2022-01-11 삼성전자주식회사 지연 고정 루프 회로의 지연 회로 및 지연 고정 루프 회로
KR102532895B1 (ko) * 2021-01-28 2023-05-15 고려대학교 산학협력단 적응형 위상 회전자 지연 고정 루프 및 그 동작 방법

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US4069462A (en) * 1976-12-13 1978-01-17 Data General Corporation Phase-locked loops
US5754838A (en) * 1994-12-27 1998-05-19 Hitachi, Ltd. Synchronous dynamic memory device capable of operating over wide range of operation frequencies
US6252465B1 (en) * 1999-06-25 2001-06-26 Mitsubishi Denki Kabushiki Kaisha Data phase locked loop circuit
US20040257124A1 (en) * 2003-06-23 2004-12-23 Renesas Technology Corp. Spread spectrum clock generator capable of frequency modulation with high accuracy
TWI296171B (en) * 2002-05-21 2008-04-21 Hynix Semiconductor Inc Digital dll apparatus for correcting duty cycle and method thereof

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JP3189774B2 (ja) * 1998-01-28 2001-07-16 日本電気株式会社 ビット同期回路
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JPH11346145A (ja) * 1998-05-29 1999-12-14 Nec Corp 多相クロック生成回路及び方法
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US6794912B2 (en) 2002-02-18 2004-09-21 Matsushita Electric Industrial Co., Ltd. Multi-phase clock transmission circuit and method
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Publication number Priority date Publication date Assignee Title
US4069462A (en) * 1976-12-13 1978-01-17 Data General Corporation Phase-locked loops
US5754838A (en) * 1994-12-27 1998-05-19 Hitachi, Ltd. Synchronous dynamic memory device capable of operating over wide range of operation frequencies
US6252465B1 (en) * 1999-06-25 2001-06-26 Mitsubishi Denki Kabushiki Kaisha Data phase locked loop circuit
TWI296171B (en) * 2002-05-21 2008-04-21 Hynix Semiconductor Inc Digital dll apparatus for correcting duty cycle and method thereof
US20040257124A1 (en) * 2003-06-23 2004-12-23 Renesas Technology Corp. Spread spectrum clock generator capable of frequency modulation with high accuracy

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10965292B1 (en) 2020-06-08 2021-03-30 Winbond Electronics Corp. Delay-locked loop device and operation method therefor
TWI786936B (zh) * 2021-08-25 2022-12-11 南亞科技股份有限公司 延遲鎖相迴路裝置及延遲方法

Also Published As

Publication number Publication date
US7821311B2 (en) 2010-10-26
JP2010093771A (ja) 2010-04-22
US20100090736A1 (en) 2010-04-15
TW201015864A (en) 2010-04-16
KR20100041197A (ko) 2010-04-22
KR100980405B1 (ko) 2010-09-07

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