JP2009170510A - 積層デバイスの製造方法 - Google Patents
積層デバイスの製造方法 Download PDFInfo
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 30
- 230000003014 reinforcing effect Effects 0.000 claims abstract description 104
- 238000000034 method Methods 0.000 claims abstract description 39
- 239000000758 substrate Substances 0.000 claims abstract description 22
- 239000004020 conductor Substances 0.000 claims abstract description 14
- 238000010030 laminating Methods 0.000 claims abstract description 12
- 230000002093 peripheral effect Effects 0.000 claims description 23
- 238000005304 joining Methods 0.000 claims description 3
- 238000005520 cutting process Methods 0.000 abstract description 39
- 235000012431 wafers Nutrition 0.000 description 225
- 239000004065 semiconductor Substances 0.000 description 39
- 230000001681 protective effect Effects 0.000 description 12
- 238000003384 imaging method Methods 0.000 description 10
- 238000003475 lamination Methods 0.000 description 7
- 230000002787 reinforcement Effects 0.000 description 5
- XUIMIQQOPSSXEZ-UHFFFAOYSA-N Silicon Chemical compound [Si] XUIMIQQOPSSXEZ-UHFFFAOYSA-N 0.000 description 4
- 230000015572 biosynthetic process Effects 0.000 description 4
- 229910052710 silicon Inorganic materials 0.000 description 4
- 239000010703 silicon Substances 0.000 description 4
- 125000004122 cyclic group Chemical group 0.000 description 3
- 230000001678 irradiating effect Effects 0.000 description 3
- 239000003795 chemical substances by application Substances 0.000 description 2
- 230000003287 optical effect Effects 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- UMIVXZPTRXBADB-UHFFFAOYSA-N benzocyclobutene Chemical compound C1=CC=C2CCC2=C1 UMIVXZPTRXBADB-UHFFFAOYSA-N 0.000 description 1
- 239000007767 bonding agent Substances 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 229920000642 polymer Polymers 0.000 description 1
- 239000011347 resin Substances 0.000 description 1
- 229920005989 resin Polymers 0.000 description 1
- 230000011218 segmentation Effects 0.000 description 1
- 239000013585 weight reducing agent Substances 0.000 description 1
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Abstract
【解決手段】補強ウエーハ20の環状の補強部の内径より僅かに小さい直径を有し表面に補強ウエーハ20の該デバイス領域23に形成された複数のストリート21および複数のデバイス22と対応する複数のストリート21および基盤ウエーハ200を準備し、基盤ウエーハ200の表面に補強ウエーハ20におけるデバイス領域23に対応する裏面を対面させ互いに対応するストリート21を一致させて接合し、補強ウエーハ20の各デバイス22に形成された電極が位置する個所に基盤ウエーハ200の各デバイス22に形成された電極に達するビアホールを形成し、ビアホールに導電体を埋設して電極同士を接続する電極接続工程と、電極接続工程後に積層ウエーハ250をストリート21に沿って切断し、個々の積層デバイスに分割する分割工程とを含む。
【選択図】図8
Description
近年、電気機器の軽量化、小型化の要求が高く、ウエーハの厚さを100μm以下に形成すれば10枚以上のウエーハを積層しても積層デバイスの厚みを1000μm以下にすることができ、積層デバイスの機能を更に向上させることができる。
しかるに、ウエーハの厚みを100μm以下に形成すると剛性が著しく低下して破損し易くなり、ウエーハの搬送および積層等の取り扱いが困難になるという問題がある。
該補強ウエーハの該環状の補強部の内径より僅かに小さい直径を有し表面に該補強ウエーハの該デバイス領域に形成された複数のストリートおよび複数のデバイスと対応する複数のストリートおよび複数のデバイスが形成された基盤ウエーハを準備し、該基盤ウエーハの表面に該補強ウエーハにおける該デバイス領域に対応する裏面を対面させ互いに対応するストリートを一致させて接合し積層ウエーハを形成するウエーハ積層工程と、
該積層ウエーハを構成する該補強ウエーハの各デバイスに形成された電極が位置する個所に該基盤ウエーハの各デバイスに形成された電極に達するビアホールを形成し、該ビアホールに導電体を埋設して電極同士を接続する電極接続工程と、
該電極接続工程を実施した後に、該積層ウエーハをストリートに沿って切断し、個々の積層デバイスに分割する分割工程と、を含む、
ことを特徴とする積層デバイスの製造方法が提供される。
上記環状の補強部除去工程と第2のウエーハ積層工程および第2の電極接続工程を繰り返し実施し、多層の積層ウエーハを形成する。
また、上記分割工程を実施する前に、基盤ウエーハの裏面を研削して所定の厚みに形成する基盤ウエーハ研削工程を実施する。
先ず、本発明による積層デバイスの製造方法に用いる補強ウエーハについて説明する。
図1には本発明による積層デバイスの製造方法に用いる補強ウエーハを形成するためのウエーハとしての半導体ウエーハの斜視図が示されている。図1に示す半導体ウエーハ2は、例えば直径が200mmで厚さが350μmのシリコンウエーハからなっており、表面2aに複数のストリート21が格子状に形成されているとともに、該複数のストリート21によって区画された複数の領域にIC、LSI等のデバイス22が形成されている。このように構成された半導体ウエーハ2は、デバイス22が形成されているデバイス領域23と、該デバイス領域23を囲繞する外周余剰領域24を備えている。なお、各デバイス22の表面にはそれぞれ複数の電極25が形成されている。また、半導体ウエーハ2の外周には、方向を示す切り欠き2cが形成されている。
先ず、図9に示すレーザー加工装置6のチャックテーブル61上に上記積層ウエーハ250の基盤ウエーハ200側を載置し、積層ウエーハ250をチャックテーブ61上に吸引保持する。従って、積層ウエーハ250は、補強ウエーハ20の表面20aを上側にして保持される。
20:補強ウエーハ
200:基盤ウエーハ
250:積層ウエーハ
21:ストリート
22:デバイス
220:積層デバイス
23:デバイス領域
24:外周余剰領域
25:電極
26:ビアホール
27:導電体
3:保護部材
4:研削装置
5:切削装置
6:レーザー加工装置
7:研削装置
F:環状のフレーム
T:ダイシングテープ
Claims (4)
- 表面に格子状に配列されたストリートによって複数の領域が区画されるとともに該区画された領域にデバイスが形成されたデバイス領域と、該デバイス領域を囲繞する外周余剰領域とを有し、裏面におけるデバイス領域に対応する領域が研削されてデバイス領域の厚さが所定厚さに形成されるとともに、該外周囲繞領域に対応する領域が残存されて環状の補強部が形成されている補強ウエーハを用いて積層デバイスを製造する積層デバイスの製造方法であって、
該補強ウエーハの該環状の補強部の内径より僅かに小さい直径を有し表面に該補強ウエーハの該デバイス領域に形成された複数のストリートおよび複数のデバイスと対応する複数のストリートおよび複数のデバイスが形成された基盤ウエーハを準備し、該基盤ウエーハの表面に該補強ウエーハにおける該デバイス領域に対応する裏面を対面させ互いに対応するストリートを一致させて接合し積層ウエーハを形成するウエーハ積層工程と、
該積層ウエーハを構成する該補強ウエーハの各デバイスに形成された電極が位置する個所に該基盤ウエーハの各デバイスに形成された電極に達するビアホールを形成し、該ビアホールに導電体を埋設して電極同士を接続する電極接続工程と、
該電極接続工程を実施した後に、該積層ウエーハをストリートに沿って切断し、個々の積層デバイスに分割する分割工程と、を含む、
ことを特徴とする積層デバイスの製造方法。 - 該分割工程を実施する前に、該積層ウエーハを構成する該補強ウエーハを環状の補強部の内径より僅かに小さい直径となるように環状の補強部を除去する環状の補強部除去工程と、該環状の補強部除去工程が実施された該積層ウエーハにおける該補強ウエーハの表面に次に積層する補強ウエーハにおけるデバイス領域に対応する裏面を対面させ互いに対応するストリートを一致させて接合する第2のウエーハ積層工程と、該第2のウエーハ積層工程によって積層された上側の補強ウエーハの各デバイスに形成された電極が位置する個所に下側の補強ウエーハの各デバイスに形成された電極に達するビアホールを形成し該ビアホールに導電体を埋設して電極同士を接続する第2の電極接続工程を実施する、請求項1記載の積層デバイスの製造方法。
- 該環状の補強部除去工程と該第2のウエーハ積層工程および該第2の電極接続工程を繰り返し実施し、多層の積層ウエーハを形成する、請求項2記載の積層デバイスの製造方法。
- 該分割工程を実施する前に、該基盤ウエーハの裏面を研削して所定の厚みに形成する基盤ウエーハ研削工程を実施する、請求項1から3のいずれかに記載の積層デバイスの製造方法。
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JP2012019126A (ja) * | 2010-07-09 | 2012-01-26 | Disco Abrasive Syst Ltd | ウエーハの加工方法 |
JP2013062430A (ja) * | 2011-09-14 | 2013-04-04 | Disco Abrasive Syst Ltd | 積層被加工物の分割方法 |
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