JP2007535802A5 - - Google Patents

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Publication number
JP2007535802A5
JP2007535802A5 JP2006542666A JP2006542666A JP2007535802A5 JP 2007535802 A5 JP2007535802 A5 JP 2007535802A5 JP 2006542666 A JP2006542666 A JP 2006542666A JP 2006542666 A JP2006542666 A JP 2006542666A JP 2007535802 A5 JP2007535802 A5 JP 2007535802A5
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semiconductor
layer
single crystal
region
orientation
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JP2006542666A
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JP2007535802A (ja
JP5063114B2 (ja
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JP2006542666A 2003-12-02 2004-11-30 プレーナ型ハイブリッド配向基板を形成する方法 Expired - Fee Related JP5063114B2 (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US10/725,850 2003-12-02
US10/725,850 US20050116290A1 (en) 2003-12-02 2003-12-02 Planar substrate with selected semiconductor crystal orientations formed by localized amorphization and recrystallization of stacked template layers
PCT/US2004/039970 WO2005057631A2 (en) 2003-12-02 2004-11-30 Planar substrate with selected semiconductor crystal orientations formed by localized amorphzation and recrystallization of stacked template layers

Publications (3)

Publication Number Publication Date
JP2007535802A JP2007535802A (ja) 2007-12-06
JP2007535802A5 true JP2007535802A5 (enExample) 2008-01-24
JP5063114B2 JP5063114B2 (ja) 2012-10-31

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JP2006542666A Expired - Fee Related JP5063114B2 (ja) 2003-12-02 2004-11-30 プレーナ型ハイブリッド配向基板を形成する方法

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US (2) US20050116290A1 (enExample)
EP (1) EP1702350A2 (enExample)
JP (1) JP5063114B2 (enExample)
KR (1) KR100961800B1 (enExample)
CN (1) CN100505273C (enExample)
TW (1) TWI328286B (enExample)
WO (1) WO2005057631A2 (enExample)

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