JP2007335581A5 - - Google Patents

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Publication number
JP2007335581A5
JP2007335581A5 JP2006164822A JP2006164822A JP2007335581A5 JP 2007335581 A5 JP2007335581 A5 JP 2007335581A5 JP 2006164822 A JP2006164822 A JP 2006164822A JP 2006164822 A JP2006164822 A JP 2006164822A JP 2007335581 A5 JP2007335581 A5 JP 2007335581A5
Authority
JP
Japan
Prior art keywords
power supply
supply lead
wiring board
land portions
wiring
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006164822A
Other languages
English (en)
Japanese (ja)
Other versions
JP2007335581A (ja
Filing date
Publication date
Priority to JP2006164822A priority Critical patent/JP2007335581A/ja
Application filed filed Critical
Priority claimed from JP2006164822A external-priority patent/JP2007335581A/ja
Priority to TW096114262A priority patent/TW200807666A/zh
Priority to CNA2007101065554A priority patent/CN101090081A/zh
Priority to US11/759,290 priority patent/US7659146B2/en
Priority to KR1020070057541A priority patent/KR101296572B1/ko
Publication of JP2007335581A publication Critical patent/JP2007335581A/ja
Publication of JP2007335581A5 publication Critical patent/JP2007335581A5/ja
Priority to US12/545,964 priority patent/US7915086B2/en
Priority to US13/021,284 priority patent/US8048722B2/en
Priority to US13/226,607 priority patent/US8258018B2/en
Priority to US13/551,487 priority patent/US8420451B2/en
Pending legal-status Critical Current

Links

JP2006164822A 2006-06-14 2006-06-14 半導体装置の製造方法 Pending JP2007335581A (ja)

Priority Applications (9)

Application Number Priority Date Filing Date Title
JP2006164822A JP2007335581A (ja) 2006-06-14 2006-06-14 半導体装置の製造方法
TW096114262A TW200807666A (en) 2006-06-14 2007-04-23 Manufacturing Method of Semiconductor Device
CNA2007101065554A CN101090081A (zh) 2006-06-14 2007-06-06 半导体器件的制造方法
US11/759,290 US7659146B2 (en) 2006-06-14 2007-06-07 Manufacturing method of semiconductor device
KR1020070057541A KR101296572B1 (ko) 2006-06-14 2007-06-13 반도체 장치의 제조 방법
US12/545,964 US7915086B2 (en) 2006-06-14 2009-08-24 Manufacturing method of semiconductor device
US13/021,284 US8048722B2 (en) 2006-06-14 2011-02-04 Manufacturing method of semiconductor device
US13/226,607 US8258018B2 (en) 2006-06-14 2011-09-07 Manufacturing method of semiconductor device
US13/551,487 US8420451B2 (en) 2006-06-14 2012-07-17 Manufacturing method of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006164822A JP2007335581A (ja) 2006-06-14 2006-06-14 半導体装置の製造方法

Publications (2)

Publication Number Publication Date
JP2007335581A JP2007335581A (ja) 2007-12-27
JP2007335581A5 true JP2007335581A5 (enExample) 2009-07-16

Family

ID=38862090

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006164822A Pending JP2007335581A (ja) 2006-06-14 2006-06-14 半導体装置の製造方法

Country Status (5)

Country Link
US (5) US7659146B2 (enExample)
JP (1) JP2007335581A (enExample)
KR (1) KR101296572B1 (enExample)
CN (1) CN101090081A (enExample)
TW (1) TW200807666A (enExample)

Families Citing this family (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5692952B2 (ja) * 2007-12-11 2015-04-01 シチズン電子株式会社 発光ダイオード
JP5188289B2 (ja) * 2008-06-26 2013-04-24 ラピスセミコンダクタ株式会社 プリント基板の製造方法
US8749074B2 (en) * 2009-11-30 2014-06-10 Micron Technology, Inc. Package including an interposer having at least one topological feature
JP5587123B2 (ja) * 2010-09-30 2014-09-10 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US9082780B2 (en) * 2012-03-23 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer
JP6068175B2 (ja) * 2013-02-12 2017-01-25 新光電気工業株式会社 配線基板、発光装置、配線基板の製造方法及び発光装置の製造方法
KR20160000293A (ko) * 2014-06-24 2016-01-04 삼성전자주식회사 탭 핀에 타이바가 없는 반도체 모듈
JP2016122802A (ja) * 2014-12-25 2016-07-07 ルネサスエレクトロニクス株式会社 半導体装置
JP6293248B2 (ja) * 2016-12-12 2018-03-14 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
CN110112117A (zh) * 2018-02-01 2019-08-09 爱思开海力士有限公司 半导体封装
KR20190093488A (ko) * 2018-02-01 2019-08-09 에스케이하이닉스 주식회사 반도체 패키지
US10879160B2 (en) * 2018-02-01 2020-12-29 SK Hynix Inc. Semiconductor package with packaging substrate
CN110112116B (zh) 2018-02-01 2023-06-06 爱思开海力士有限公司 半导体封装件和形成半导体封装件的方法
KR102509051B1 (ko) * 2018-02-01 2023-03-10 에스케이하이닉스 주식회사 반도체 패키지
US11462501B2 (en) * 2019-10-25 2022-10-04 Shinko Electric Industries Co., Ltd. Interconnect substrate and method of making the same
CN116130445A (zh) * 2021-11-12 2023-05-16 合肥本源量子计算科技有限责任公司 一种量子器件及其制备方法、一种量子计算机

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6450450A (en) * 1987-08-20 1989-02-27 Toshiba Corp Package for semiconductor integrated circuit
JP3339473B2 (ja) * 1999-08-26 2002-10-28 日本電気株式会社 パッケージ基板、該パッケージ基板を備える半導体装置及びそれらの製造方法
JP3721299B2 (ja) * 2000-08-03 2005-11-30 新光電気工業株式会社 半導体パッケージの製造方法
JP3619773B2 (ja) * 2000-12-20 2005-02-16 株式会社ルネサステクノロジ 半導体装置の製造方法
KR100868419B1 (ko) * 2001-06-07 2008-11-11 가부시끼가이샤 르네사스 테크놀로지 반도체장치 및 그 제조방법
JP2003086735A (ja) * 2001-06-27 2003-03-20 Shinko Electric Ind Co Ltd 位置情報付配線基板及びその製造方法並びに半導体装置の製造方法
MY131114A (en) * 2001-06-27 2007-07-31 Shinko Electric Ind Co Wiring substrate having position information
JP2005079129A (ja) 2003-08-28 2005-03-24 Sumitomo Metal Electronics Devices Inc プラスチックパッケージ及びその製造方法
KR100557540B1 (ko) * 2004-07-26 2006-03-03 삼성전기주식회사 Ｂｇａ 패키지 기판 및 그 제작 방법
JP4651359B2 (ja) 2004-10-29 2011-03-16 ルネサスエレクトロニクス株式会社 半導体装置およびその製造方法
JP2006261485A (ja) * 2005-03-18 2006-09-28 Renesas Technology Corp 半導体装置およびその製造方法

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