KR101296572B1 - 반도체 장치의 제조 방법 - Google Patents

반도체 장치의 제조 방법 Download PDF

Info

Publication number
KR101296572B1
KR101296572B1 KR1020070057541A KR20070057541A KR101296572B1 KR 101296572 B1 KR101296572 B1 KR 101296572B1 KR 1020070057541 A KR1020070057541 A KR 1020070057541A KR 20070057541 A KR20070057541 A KR 20070057541A KR 101296572 B1 KR101296572 B1 KR 101296572B1
Authority
KR
South Korea
Prior art keywords
wiring
plating
delete delete
semiconductor device
main surface
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
KR1020070057541A
Other languages
English (en)
Korean (ko)
Other versions
KR20070119521A (ko
Inventor
데쯔하루 다노우에
Original Assignee
르네사스 일렉트로닉스 가부시키가이샤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 르네사스 일렉트로닉스 가부시키가이샤 filed Critical 르네사스 일렉트로닉스 가부시키가이샤
Publication of KR20070119521A publication Critical patent/KR20070119521A/ko
Application granted granted Critical
Publication of KR101296572B1 publication Critical patent/KR101296572B1/ko
Expired - Fee Related legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Classifications

    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • H10W74/10Encapsulations, e.g. protective coatings characterised by their shape or disposition
    • H10W74/111Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed
    • H10W74/114Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations
    • H10W74/117Encapsulations, e.g. protective coatings characterised by their shape or disposition the semiconductor body being completely enclosed by a substrate and the encapsulations the substrate having spherical bumps for external connection
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01Manufacture or treatment
    • H10W70/05Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/62Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their interconnections
    • H10W70/65Shapes or dispositions of interconnections
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/67Insulating or insulated package substrates; Interposers; Redistribution layers characterised by their insulating layers or insulating parts
    • H10W70/68Shapes or dispositions thereof
    • H10W70/685Shapes or dispositions thereof comprising multiple insulating layers
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/073Connecting or disconnecting of die-attach connectors
    • H10W72/07351Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting
    • H10W72/07353Connecting or disconnecting of die-attach connectors characterised by changes in properties of the die-attach connectors during connecting changes in shapes
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/071Connecting or disconnecting
    • H10W72/075Connecting or disconnecting of bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/331Shapes of die-attach connectors
    • H10W72/334Cross-sectional shape, i.e. in side view
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/30Die-attach connectors
    • H10W72/351Materials of die-attach connectors
    • H10W72/352Materials of die-attach connectors comprising metals or metalloids, e.g. solders
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/50Bond wires
    • H10W72/551Materials of bond wires
    • H10W72/552Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/851Dispositions of multiple connectors or interconnections
    • H10W72/874On different surfaces
    • H10W72/884Die-attach connectors and bond wires
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00Interconnections or connectors in packages
    • H10W72/90Bond pads, in general
    • H10W72/931Shapes of bond pads
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W74/00Encapsulations, e.g. protective coatings
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • HELECTRICITY
    • H10SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10WGENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00Package configurations
    • H10W90/701Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Wire Bonding (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
KR1020070057541A 2006-06-14 2007-06-13 반도체 장치의 제조 방법 Expired - Fee Related KR101296572B1 (ko)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2006164822A JP2007335581A (ja) 2006-06-14 2006-06-14 半導体装置の製造方法
JPJP-P-2006-00164822 2006-06-14

Publications (2)

Publication Number Publication Date
KR20070119521A KR20070119521A (ko) 2007-12-20
KR101296572B1 true KR101296572B1 (ko) 2013-08-13

Family

ID=38862090

Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020070057541A Expired - Fee Related KR101296572B1 (ko) 2006-06-14 2007-06-13 반도체 장치의 제조 방법

Country Status (5)

Country Link
US (5) US7659146B2 (enExample)
JP (1) JP2007335581A (enExample)
KR (1) KR101296572B1 (enExample)
CN (1) CN101090081A (enExample)
TW (1) TW200807666A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10950512B2 (en) 2018-02-01 2021-03-16 SK Hynix Inc. Semiconductor packages including a semiconductor chip and methods of forming the semiconductor packages

Families Citing this family (15)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP5692952B2 (ja) * 2007-12-11 2015-04-01 シチズン電子株式会社 発光ダイオード
JP5188289B2 (ja) * 2008-06-26 2013-04-24 ラピスセミコンダクタ株式会社 プリント基板の製造方法
US8749074B2 (en) * 2009-11-30 2014-06-10 Micron Technology, Inc. Package including an interposer having at least one topological feature
JP5587123B2 (ja) * 2010-09-30 2014-09-10 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US9082780B2 (en) * 2012-03-23 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer
JP6068175B2 (ja) * 2013-02-12 2017-01-25 新光電気工業株式会社 配線基板、発光装置、配線基板の製造方法及び発光装置の製造方法
KR20160000293A (ko) * 2014-06-24 2016-01-04 삼성전자주식회사 탭 핀에 타이바가 없는 반도체 모듈
JP2016122802A (ja) * 2014-12-25 2016-07-07 ルネサスエレクトロニクス株式会社 半導体装置
JP6293248B2 (ja) * 2016-12-12 2018-03-14 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
US10879160B2 (en) * 2018-02-01 2020-12-29 SK Hynix Inc. Semiconductor package with packaging substrate
CN110112117A (zh) * 2018-02-01 2019-08-09 爱思开海力士有限公司 半导体封装
KR102509051B1 (ko) * 2018-02-01 2023-03-10 에스케이하이닉스 주식회사 반도체 패키지
KR20190093488A (ko) * 2018-02-01 2019-08-09 에스케이하이닉스 주식회사 반도체 패키지
US11462501B2 (en) * 2019-10-25 2022-10-04 Shinko Electric Industries Co., Ltd. Interconnect substrate and method of making the same
CN116130445A (zh) * 2021-11-12 2023-05-16 合肥本源量子计算科技有限责任公司 一种量子器件及其制备方法、一种量子计算机

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6450450A (en) * 1987-08-20 1989-02-27 Toshiba Corp Package for semiconductor integrated circuit
JP2002050715A (ja) 2000-08-03 2002-02-15 Shinko Electric Ind Co Ltd 半導体パッケージの製造方法
KR101117848B1 (ko) 2004-10-29 2012-03-15 르네사스 일렉트로닉스 가부시키가이샤 반도체 장치 및 그 제조 방법

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3339473B2 (ja) * 1999-08-26 2002-10-28 日本電気株式会社 パッケージ基板、該パッケージ基板を備える半導体装置及びそれらの製造方法
JP3619773B2 (ja) * 2000-12-20 2005-02-16 株式会社ルネサステクノロジ 半導体装置の製造方法
WO2002103793A1 (en) * 2001-06-07 2002-12-27 Renesas Technology Corp. Semiconductor device and manufacturing method thereof
JP2003086735A (ja) * 2001-06-27 2003-03-20 Shinko Electric Ind Co Ltd 位置情報付配線基板及びその製造方法並びに半導体装置の製造方法
EP1280204A3 (en) * 2001-06-27 2004-09-01 Shinko Electric Industries Co. Ltd. Wiring substrate having position problem
JP2005079129A (ja) 2003-08-28 2005-03-24 Sumitomo Metal Electronics Devices Inc プラスチックパッケージ及びその製造方法
KR100557540B1 (ko) * 2004-07-26 2006-03-03 삼성전기주식회사 Bga 패키지 기판 및 그 제작 방법
JP2006261485A (ja) * 2005-03-18 2006-09-28 Renesas Technology Corp 半導体装置およびその製造方法

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6450450A (en) * 1987-08-20 1989-02-27 Toshiba Corp Package for semiconductor integrated circuit
JP2002050715A (ja) 2000-08-03 2002-02-15 Shinko Electric Ind Co Ltd 半導体パッケージの製造方法
KR101117848B1 (ko) 2004-10-29 2012-03-15 르네사스 일렉트로닉스 가부시키가이샤 반도체 장치 및 그 제조 방법

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US10950512B2 (en) 2018-02-01 2021-03-16 SK Hynix Inc. Semiconductor packages including a semiconductor chip and methods of forming the semiconductor packages
US11557523B2 (en) 2018-02-01 2023-01-17 SK Hynix Inc. Semiconductor packages and methods of forming the semiconductor packages

Also Published As

Publication number Publication date
US8420451B2 (en) 2013-04-16
US8258018B2 (en) 2012-09-04
TW200807666A (en) 2008-02-01
JP2007335581A (ja) 2007-12-27
US20110124159A1 (en) 2011-05-26
US7915086B2 (en) 2011-03-29
US20120282737A1 (en) 2012-11-08
US8048722B2 (en) 2011-11-01
CN101090081A (zh) 2007-12-19
US20070292993A1 (en) 2007-12-20
KR20070119521A (ko) 2007-12-20
US7659146B2 (en) 2010-02-09
US20090311833A1 (en) 2009-12-17
US20120083072A1 (en) 2012-04-05

Similar Documents

Publication Publication Date Title
KR101296572B1 (ko) 반도체 장치의 제조 방법
US6310390B1 (en) BGA package and method of fabrication
KR100319609B1 (ko) 와이어 어래이드 칩 사이즈 패키지 및 그 제조방법
US6541848B2 (en) Semiconductor device including stud bumps as external connection terminals
US8232641B2 (en) Wiring substrate and semiconductor device having connection pads formed in non-solder mask defined structure
KR101328250B1 (ko) 반도체 장치
US7518250B2 (en) Semiconductor device and a method for manufacturing of the same
US8138022B2 (en) Method of manufacturing semiconductor device
EP1715512A2 (en) Semiconductor device and method of forming the same
US20010017411A1 (en) Semiconductor chip and semiconductor device having the chip
US7566969B2 (en) Semiconductor device with improved arrangement of a through-hole in a wiring substrate
JP2012104790A (ja) 半導体装置
KR20010039547A (ko) 반도체 장치 및 그 제조 방법
US20210358770A1 (en) Encapsulated semiconductor package
CN102299130B (zh) 半导体装置及其制造方法
US12027485B2 (en) Semiconductor device assembly and method therefor
EP3319120A1 (en) Semiconductor device
KR100313826B1 (ko) 반도체 장치
JP2000216203A (ja) Bga用テ―プキャリアおよびそれを用いた半導体装置
JP3420706B2 (ja) 半導体装置、半導体装置の製造方法、回路基板、回路基板の製造方法
US6627986B2 (en) Substrate for semiconductor device and semiconductor device fabrication using the same
JP5103155B2 (ja) 半導体装置およびその製造方法
US20230063343A1 (en) Multilevel package substrate device with bga pin out and coaxial signal connections
JP2012033808A (ja) 半導体装置

Legal Events

Date Code Title Description
PA0109 Patent application

St.27 status event code: A-0-1-A10-A12-nap-PA0109

PG1501 Laying open of application

St.27 status event code: A-1-1-Q10-Q12-nap-PG1501

N231 Notification of change of applicant
PN2301 Change of applicant

St.27 status event code: A-3-3-R10-R13-asn-PN2301

St.27 status event code: A-3-3-R10-R11-asn-PN2301

R18-X000 Changes to party contact information recorded

St.27 status event code: A-3-3-R10-R18-oth-X000

A201 Request for examination
E13-X000 Pre-grant limitation requested

St.27 status event code: A-2-3-E10-E13-lim-X000

P11-X000 Amendment of application requested

St.27 status event code: A-2-2-P10-P11-nap-X000

P13-X000 Application amended

St.27 status event code: A-2-2-P10-P13-nap-X000

PA0201 Request for examination

St.27 status event code: A-1-2-D10-D11-exm-PA0201

E701 Decision to grant or registration of patent right
PE0701 Decision of registration

St.27 status event code: A-1-2-D10-D22-exm-PE0701

GRNT Written decision to grant
PR0701 Registration of establishment

St.27 status event code: A-2-4-F10-F11-exm-PR0701

PR1002 Payment of registration fee

St.27 status event code: A-2-2-U10-U11-oth-PR1002

Fee payment year number: 1

PG1601 Publication of registration

St.27 status event code: A-4-4-Q10-Q13-nap-PG1601

R18-X000 Changes to party contact information recorded

St.27 status event code: A-5-5-R10-R18-oth-X000

FPAY Annual fee payment

Payment date: 20160721

Year of fee payment: 4

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 4

FPAY Annual fee payment

Payment date: 20170720

Year of fee payment: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 5

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 6

FPAY Annual fee payment

Payment date: 20190725

Year of fee payment: 7

PR1001 Payment of annual fee

St.27 status event code: A-4-4-U10-U11-oth-PR1001

Fee payment year number: 7

PC1903 Unpaid annual fee

St.27 status event code: A-4-4-U10-U13-oth-PC1903

Not in force date: 20200808

Payment event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

PC1903 Unpaid annual fee

St.27 status event code: N-4-6-H10-H13-oth-PC1903

Ip right cessation event data comment text: Termination Category : DEFAULT_OF_REGISTRATION_FEE

Not in force date: 20200808

P22-X000 Classification modified

St.27 status event code: A-4-4-P10-P22-nap-X000