TW200807666A - Manufacturing Method of Semiconductor Device - Google Patents

Manufacturing Method of Semiconductor Device Download PDF

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Publication number
TW200807666A
TW200807666A TW096114262A TW96114262A TW200807666A TW 200807666 A TW200807666 A TW 200807666A TW 096114262 A TW096114262 A TW 096114262A TW 96114262 A TW96114262 A TW 96114262A TW 200807666 A TW200807666 A TW 200807666A
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TW
Taiwan
Prior art keywords
wiring
semiconductor device
power supply
main surface
manufacturing
Prior art date
Application number
TW096114262A
Other languages
English (en)
Chinese (zh)
Inventor
Tetsuharu Tanoue
Original Assignee
Renesas Tech Corp
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Filing date
Publication date
Application filed by Renesas Tech Corp filed Critical Renesas Tech Corp
Publication of TW200807666A publication Critical patent/TW200807666A/zh

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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
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    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
TW096114262A 2006-06-14 2007-04-23 Manufacturing Method of Semiconductor Device TW200807666A (en)

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JP5188289B2 (ja) * 2008-06-26 2013-04-24 ラピスセミコンダクタ株式会社 プリント基板の製造方法
US8749074B2 (en) * 2009-11-30 2014-06-10 Micron Technology, Inc. Package including an interposer having at least one topological feature
JP5587123B2 (ja) * 2010-09-30 2014-09-10 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US9082780B2 (en) * 2012-03-23 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer
JP6068175B2 (ja) * 2013-02-12 2017-01-25 新光電気工業株式会社 配線基板、発光装置、配線基板の製造方法及び発光装置の製造方法
KR20160000293A (ko) * 2014-06-24 2016-01-04 삼성전자주식회사 탭 핀에 타이바가 없는 반도체 모듈
JP2016122802A (ja) * 2014-12-25 2016-07-07 ルネサスエレクトロニクス株式会社 半導体装置
JP6293248B2 (ja) * 2016-12-12 2018-03-14 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
CN110112117A (zh) * 2018-02-01 2019-08-09 爱思开海力士有限公司 半导体封装
KR20190093488A (ko) * 2018-02-01 2019-08-09 에스케이하이닉스 주식회사 반도체 패키지
US10879160B2 (en) * 2018-02-01 2020-12-29 SK Hynix Inc. Semiconductor package with packaging substrate
CN110112116B (zh) 2018-02-01 2023-06-06 爱思开海力士有限公司 半导体封装件和形成半导体封装件的方法
KR102509051B1 (ko) * 2018-02-01 2023-03-10 에스케이하이닉스 주식회사 반도체 패키지
US11462501B2 (en) * 2019-10-25 2022-10-04 Shinko Electric Industries Co., Ltd. Interconnect substrate and method of making the same
CN116130445A (zh) * 2021-11-12 2023-05-16 合肥本源量子计算科技有限责任公司 一种量子器件及其制备方法、一种量子计算机

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CN101090081A (zh) 2007-12-19
US20070292993A1 (en) 2007-12-20
US20090311833A1 (en) 2009-12-17
US7915086B2 (en) 2011-03-29
KR20070119521A (ko) 2007-12-20
JP2007335581A (ja) 2007-12-27
US7659146B2 (en) 2010-02-09
US8048722B2 (en) 2011-11-01
KR101296572B1 (ko) 2013-08-13
US20110124159A1 (en) 2011-05-26
US8420451B2 (en) 2013-04-16
US20120282737A1 (en) 2012-11-08
US20120083072A1 (en) 2012-04-05

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