CN101090081A - 半导体器件的制造方法 - Google Patents

半导体器件的制造方法 Download PDF

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Publication number
CN101090081A
CN101090081A CNA2007101065554A CN200710106555A CN101090081A CN 101090081 A CN101090081 A CN 101090081A CN A2007101065554 A CNA2007101065554 A CN A2007101065554A CN 200710106555 A CN200710106555 A CN 200710106555A CN 101090081 A CN101090081 A CN 101090081A
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China
Prior art keywords
lead
semiconductor device
wiring
substrate
terminal pad
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CNA2007101065554A
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English (en)
Chinese (zh)
Inventor
田上哲治
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Renesas Technology Corp
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Renesas Technology Corp
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Publication of CN101090081A publication Critical patent/CN101090081A/zh
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    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Power Engineering (AREA)
  • General Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Geometry (AREA)
  • Ceramic Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Wire Bonding (AREA)
  • Printing Elements For Providing Electric Connections Between Printed Circuits (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
CNA2007101065554A 2006-06-14 2007-06-06 半导体器件的制造方法 Pending CN101090081A (zh)

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CN110112118A (zh) * 2018-02-01 2019-08-09 爱思开海力士有限公司 半导体封装
WO2023083021A1 (zh) * 2021-11-12 2023-05-19 合肥本源量子计算科技有限责任公司 一种量子器件及其制备方法、一种量子计算机

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JP5587123B2 (ja) * 2010-09-30 2014-09-10 ルネサスエレクトロニクス株式会社 半導体装置の製造方法
US9082780B2 (en) * 2012-03-23 2015-07-14 Stats Chippac, Ltd. Semiconductor device and method of forming a robust fan-out package including vertical interconnects and mechanical support layer
JP6068175B2 (ja) * 2013-02-12 2017-01-25 新光電気工業株式会社 配線基板、発光装置、配線基板の製造方法及び発光装置の製造方法
KR20160000293A (ko) * 2014-06-24 2016-01-04 삼성전자주식회사 탭 핀에 타이바가 없는 반도체 모듈
JP2016122802A (ja) * 2014-12-25 2016-07-07 ルネサスエレクトロニクス株式会社 半導体装置
JP6293248B2 (ja) * 2016-12-12 2018-03-14 ルネサスエレクトロニクス株式会社 半導体装置および半導体装置の製造方法
CN110112116B (zh) * 2018-02-01 2023-06-06 爱思开海力士有限公司 半导体封装件和形成半导体封装件的方法
KR102509051B1 (ko) * 2018-02-01 2023-03-10 에스케이하이닉스 주식회사 반도체 패키지
CN110112117A (zh) * 2018-02-01 2019-08-09 爱思开海力士有限公司 半导体封装
KR20190093488A (ko) * 2018-02-01 2019-08-09 에스케이하이닉스 주식회사 반도체 패키지
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CN110112118A (zh) * 2018-02-01 2019-08-09 爱思开海力士有限公司 半导体封装
WO2023083021A1 (zh) * 2021-11-12 2023-05-19 合肥本源量子计算科技有限责任公司 一种量子器件及其制备方法、一种量子计算机

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US8258018B2 (en) 2012-09-04
US8420451B2 (en) 2013-04-16
US7659146B2 (en) 2010-02-09
JP2007335581A (ja) 2007-12-27
US7915086B2 (en) 2011-03-29
US20120282737A1 (en) 2012-11-08
KR20070119521A (ko) 2007-12-20
US20110124159A1 (en) 2011-05-26
US20120083072A1 (en) 2012-04-05
US20070292993A1 (en) 2007-12-20
US8048722B2 (en) 2011-11-01
KR101296572B1 (ko) 2013-08-13
TW200807666A (en) 2008-02-01

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