JPS6450450A - Package for semiconductor integrated circuit - Google Patents
Package for semiconductor integrated circuitInfo
- Publication number
- JPS6450450A JPS6450450A JP20690987A JP20690987A JPS6450450A JP S6450450 A JPS6450450 A JP S6450450A JP 20690987 A JP20690987 A JP 20690987A JP 20690987 A JP20690987 A JP 20690987A JP S6450450 A JPS6450450 A JP S6450450A
- Authority
- JP
- Japan
- Prior art keywords
- input
- output terminals
- chips
- board
- package
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Landscapes
- Lead Frames For Integrated Circuits (AREA)
Abstract
PURPOSE:To eliminate a decline of fast performance of an integrated circuit by breaking plated wirings which electrically connect ends to input and output terminals and the other ends to a die pad of on board chips respectively at desired points in the neighborhood of the input and output terminal for the on board chips. CONSTITUTION:Input and output terminals 22 for on board chips and plated wiring 26 which electrically connects respective ends to the input and output terminals 22 and electrically joins the other ends to the die pad 25 of on board chips are formed on a substrate 21 which has semiconductor chips on board. The input and output terminals 22 for the outside of a package and the other input and output terminals 22 for the chips are electroplated by planted wiring 26, while the plated wiring 26 are formed to break at desired points in the neighborhood of the input and output terminals 22. Therefore, an open stab due to residue plated wiring is eliminated and a package for a fast operation integrated circuit can be obtained.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20690987A JPS6450450A (en) | 1987-08-20 | 1987-08-20 | Package for semiconductor integrated circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP20690987A JPS6450450A (en) | 1987-08-20 | 1987-08-20 | Package for semiconductor integrated circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS6450450A true JPS6450450A (en) | 1989-02-27 |
Family
ID=16531082
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP20690987A Pending JPS6450450A (en) | 1987-08-20 | 1987-08-20 | Package for semiconductor integrated circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS6450450A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6486052B1 (en) | 1999-08-16 | 2002-11-26 | Nec Corporation | Package having terminated plating layer and its manufacturing method |
| JP2007335581A (en) * | 2006-06-14 | 2007-12-27 | Renesas Technology Corp | Method for manufacturing semiconductor device |
| US8213185B2 (en) | 2008-10-08 | 2012-07-03 | Panasonic Corporation | Interposer substrate including capacitor for adjusting phase of signal transmitted in same interposer substrate |
-
1987
- 1987-08-20 JP JP20690987A patent/JPS6450450A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6486052B1 (en) | 1999-08-16 | 2002-11-26 | Nec Corporation | Package having terminated plating layer and its manufacturing method |
| JP2007335581A (en) * | 2006-06-14 | 2007-12-27 | Renesas Technology Corp | Method for manufacturing semiconductor device |
| US8258018B2 (en) | 2006-06-14 | 2012-09-04 | Renesas Electronics Corporation | Manufacturing method of semiconductor device |
| US8420451B2 (en) | 2006-06-14 | 2013-04-16 | Renesas Electronics Corporation | Manufacturing method of semiconductor device |
| KR101296572B1 (en) * | 2006-06-14 | 2013-08-13 | 르네사스 일렉트로닉스 가부시키가이샤 | Menufacturing method of semiconductor device |
| US8213185B2 (en) | 2008-10-08 | 2012-07-03 | Panasonic Corporation | Interposer substrate including capacitor for adjusting phase of signal transmitted in same interposer substrate |
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