JP2007311713A - 電子装置用基板およびその製造方法、ならびに電子装置およびその製造方法 - Google Patents
電子装置用基板およびその製造方法、ならびに電子装置およびその製造方法 Download PDFInfo
- Publication number
- JP2007311713A JP2007311713A JP2006141862A JP2006141862A JP2007311713A JP 2007311713 A JP2007311713 A JP 2007311713A JP 2006141862 A JP2006141862 A JP 2006141862A JP 2006141862 A JP2006141862 A JP 2006141862A JP 2007311713 A JP2007311713 A JP 2007311713A
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- electronic device
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Images
Classifications
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- A43B5/00—Footwear for sporting purposes
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- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/48—Manufacture or treatment of parts, e.g. containers, prior to assembly of the devices, using processes not provided for in a single one of the subgroups H01L21/06 - H01L21/326
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Abstract
【解決手段】複数の開口を有するPSR膜と、PSR膜上の所定の位置に搭載した電子部品21と、電子部品21と開口内に充填された第2のめっき膜7とを接続しているボンディングワイヤ22と、これらを覆うようにして形成された封止樹脂23と、PSR膜の裏面側で第1のめっき膜6に接して設けられる突起状端子24と、その突起状端子24の表面に形成される表面処理層25とを備えた電子装置20とする。
【選択図】図3
Description
また、図11に示すとおり、ダイパッド104が配置されているため、電子部品106の下に配線パターン105を配置することが出来ない。このため、従来のコアレスパッケージの設計では、コアレスパッケージ120の実装面積が大きくなるという実装上の不都合を生じていた。
(電子装置用基板の構成)
図1は、本発明の第1の実施の形態に係る電子装置用基板を示す。
電子装置用基板10は、銅箔による基材としての金属層3に、剥離可能層を成膜し、さらにこの剥離可能層に薄い金属膜2を成膜した複合金属層(複合銅箔)12と、この複合金属層12に、接着剤9(図2参照)を介して貼り合わせたテープ部材1と、金属層3上に所定のパターンで形成された第1の電気絶縁層としてのPSR膜4と、PSR膜4の所定位置に形成された開口5内に設けられた第1のめっき膜6と、第1のめっき膜6上に設けられた第2のめっき膜7とを備える。
次に、第1の実施の形態に係る電子装置用基板の製造方法について説明する。図2は、図1の電子装置用基板の製造方法を示す。
第1の実施の形態によれば、下記の効果を奏する。
(イ)複合金属層12の金属膜2に支持基板であるテープ部材1を貼着しておくと、厚い金属層3と、ポリイミドテープ8との厚さのバランスが保たれ、ポリイミドテープの引き剥がし除去が極めてスムーズに行われる。
(ロ)PSR膜4、および金属めっき層13は30μm以下と薄いため、微細加工が容易になり、厚さ、投影面積ともに、搭載される電子部品のサイズよりもやや大きい程度で、小型で薄型の電子装置を提供することができる。
(ハ)銅箔をエッチングして微細パターンを形成する必要がないので、フォトエッチングのためのレジスト塗工、露光、現像、およびエッチング工程を不要にすることができる。
(ニ)開口5を設けるためのPSR膜4は、めっき後に溶解除去させないので、剥離液による汚染の心配がない他、基板製造工程の大幅な時間短縮とそれに伴う低コスト化が可能となる。
(ホ)製造方法においては、PSR膜4として、不溶解性のソルダーレジストまたはフォトソルダーレジストを用いたことにより、剥離液による汚染の心配がないほか、めっき用レジスト膜の溶解除去工程が不要となり、基板製造時間の短縮化とそれに伴う低コスト化が可能となる。
(電子装置の構成)
図3は、本発明の第2の実施の形態に係る電子装置を示す。
この電子装置20は、第1の実施の形態に示した前記電子装置用基板10のうち基材11部分を除去した電子装置用基板10’と、電子装置用基板10’上の所定の位置に搭載した電子部品21と、電子部品21上の図示しない外部接続用の端子と電子装置用基板10’の前記第2のめっき膜7とを接続しているボンディングワイヤ22と、電子部品21、ボンディングワイヤ22、および第2のめっき膜7を覆うようにして電子装置用基板10’上に被覆された絶縁性被覆材料としての封止樹脂23と、PSR膜4の裏面側で第1のめっき膜6に接して設けられる突起状端子24と、その突起状端子24の表面に形成される表面処理層25とを備える。
次に、第2の実施の形態に係る図3の電子装置の製造方法について説明する。図4及び図5は、図3の電子装置の製造方法を示す。
第2の実施の形態によれば、下記の効果を奏する。
(イ)基材11において、剥離層を介した金属層3と金属膜2との接着力が、金属層3とPSR膜4との接着力よりも小さいので、剥離層を利用して電子装置用基板10から正確にテープ部材1及び金属膜2を除去でき、その応力でクラック等が入ったりすることがなく、容易にかつ完全に金属層3を電子装置用基板10’に残留させることができる。このため、フィルム状基板であった場合等に発生していた接着剤等の電子装置側の金属電極への残渣やフィルム裂けを無くすことができる。
(ロ)薄型化に有利なコアレスタイプであって、かつ電子装置の裏面側において外部実装に有利なように、突起状端子24を有する電子装置20を実現することができる。
(ハ)突出形状に加工された外部実装用の突起状端子24は膜厚一定の金属層3からフォトファブリケーションによるケミカルエッチング法により作製されるものであるため、厚さ、幅などの形状が均一で、かつ位置精度が極めて良い。
(ニ)突出形状に加工された外部実装用の突起状端子24は18μm厚程度の薄い金属基板から作製されるため、BGAの場合のはんだボ−ルと比較して微細加工に適しており、大きさ、厚さという電子装置サイズの小形化を制限させるものではない。また、突起状に製作されるため、突起状端子の側面と下面で外部実装に使用する半田との接続が可能である。従来のコアレスパッケージ(図11)では、外部実装に使用する金属電極105aの下部でしか外部実装に使用する半田と接続しない。よって、従来のコアレスパッケージと比べて、外部実装に使用する半田との接触面積を大きくでき、BGAとほぼ同等の接続強度を確保できる。
(ホ)金属めっき層13の側面に配置したPSR膜4は、金属めっき層13と電子部品21の周囲を被覆している封止樹脂23の接着強度を上げ、かつPSR膜4を電子装置製造工程中の機械的耐久性を向上させる補強材として機能するため、薄型でありながら機械的強度の高い電子装置が製造できる。
(ヘ)複合金属層12に、更に耐熱性を有するテープ部材1を貼り合わせているので、基板加工および電子装置組立時の熱的、機械的応力に対する耐性を高めることができる。
(ト)複合金属層12とテープ部材1との厚さのバランスが保たれているから、ポリイミドテープ8の引き剥がし除去を極めてスムーズに行うことができる。
(チ)支持基板が存在することにより金属層3が20μm以下に薄い場合でも、電子装置用基板が製造できるため、電子装置裏面の20μm以下の突起状端子が形成できる。
(電子装置の構成)
図6は、本発明の第3の実施の形態に係る電子装置を示す。
この電子装置30は、第1の実施の形態に示した前記電子装置用基板10のうち基材11部分を除去した電子装置用基板10’と、電子装置用基板10’上の所定の位置に搭載した電子部品21と、電子部品21上の図示しない外部接続用の端子と電子装置用基板10’の前記第2のめっき膜7とを接続しているボンディングワイヤ22と、電子部品21、ボンディングワイヤ22、および第2のめっき膜7を覆うようにして電子装置用基板10’上に被覆された絶縁性被覆材料としての封止樹脂23と、PSR膜4の裏面側で第1のめっき膜6に接して設けられる導体配線層(導体回路)31と、その導体配線層(導体回路)31の表面に形成される表面処理層32と、その表面処理層32の一部を被覆する第2の電気絶縁層33とを備える。
本実施の形態では、特に、電子部品21下のPSR膜4のその下に導体配線層31を配置して、電子装置30の実装面積の縮小を行っている。
次に、第3の実施の形態に係る図6の電子装置の製造方法について説明する。図7及び図8は、図6の電子装置の製造方法を示す。
図9(a)、(b)に示すように、従来のコアレスパッケージ120では、ダイパッド104があり、電子部品21の下に外部端子である金属電極105aを配置することができない。このため、電子部品106の周囲に全ての金属端子105aを配置せざるを得ない。これに対して、図9(c)、(d)に示す本実施形態の多端子電子装置30では、電子部品21の下にも導体配線層31が形成可能なため、大幅な実装面積の縮小が可能となる。
本実施形態の多端子電子装置30(外部端子22個)では、従来のコアレスパッケージ120(外部端子22個)に対して実装面積を約70%まで縮小可能であった。
第3の実施の形態によれば、下記の効果を奏する。
(イ)基材11において、剥離層を介した金属層3と金属膜2との接着力が、金属層3とPSR膜4との接着力よりも小さいので、剥離層を利用して電子装置用基板10から正確にテープ部材1及び金属膜2を除去でき、その応力でクラック等が入ったりすることがなく、容易にかつ完全に金属層3を電子装置用基板10’に残留させることができる。このため、フィルム状基板であった場合等に発生していた接着剤等の電子装置側の金属電極への残渣やフィルム裂けを無くすことができる。
(ロ)薄型化に有利なコアレスタイプであって、かつ電子装置の裏面側において外部実装に有利なように、導体配線層31を有する電子装置30を実現することができる。
(ハ)突出形状に加工された外部実装用の導体配線層31は膜厚一定の金属層3からフォトファブリケーションによるケミカルエッチング法により作製されるものであるため、厚さ、幅などの形状が均一で、かつ位置精度が極めて良い。
(ニ)突出形状に加工された外部実装用の導体配線層31は18μm厚程度の薄い金属基板から作製されるため、BGAの場合のはんだボールと比較して微細加工に適しており、大きさ、厚さという電子装置サイズの小形化を制限させるものではない。また、導体配線層31は突出形状に製作されるため、この導体配線層31の外部実装用端子部分では側面と下面で外部実装に使用する半田との接続が可能である。従来のコアレスパッケージでは、外部実装に使用する金属電極105aの下部でしか外部実装に使用する半田と接続しない。よって、従来のコアレスパッケージ(図11)と比べて、外部実装に使用する半田との接続面積を大きくでき、BGAとほぼ同等の接続強度を確保できる。
(ホ)金属めっき層13の側面に配置したPSR膜4は、金属めっき層13と電子部品21の周囲を被覆している封止樹脂23の接着強度を上げ、かつPSR膜4を電子装置製造工程中の機械的耐久性を向上させる補強材として機能するため、薄型でありながら機械的強度の高い電子装置が製造できる。
(ヘ)複合金属層12に、更に耐熱性を有するテープ部材1を貼り合わせているので、基板加工および電子装置組立時の熱的、機械的応力に対する耐性を高めることができる。
(ト)複合金属層12とテープ部材1との厚さのバランスが保たれているから、ポリイミドテープ8の引き剥がし除去を極めてスムーズに行うことができる。
(チ)支持基板が存在することにより金属層3が20μm以下に薄い場合でも、電子装置用基板が製造できるため、電子装置裏面の20μm以下の導体配線層(導体回路)が形成できる。
(リ)電子部品21の下に電気絶縁層であるPSR膜4が存在することで、導体配線層31を電子部品21の下に配置可能となり、実装面積を縮小できる。
なお、本発明は、上記各実施の形態に限定されず、本発明の技術思想を逸脱あるいは変更しない範囲内で種々な変形が可能である。
また、導体端子と電子部品との電気的な接続は、ワイヤボンディングに代えて、バンプによるいわゆるフリップチップ接続であってもよい。
2 金属膜
3 金属層
4 PSR膜(電気絶縁層)
5 開口
6 第1のめっき膜
7 第2のめっき膜
8 ポリイミドテープ
9 接着剤
10 電子装置用基板
11 基材
12 複合金属層
13 金属めっき層
15A,15B ロール
17 フォトマスク
18 紫外線
20 電子装置
21 電子部品
21a 端子
22 ボンディングワイヤ
23 封止樹脂(絶縁性被覆材料)
24 突起状端子(導電性構造物)
25 表面処理層
26 ICパッケージ
27 フォトレジスト
28 フォトマスク
29 紫外線
30 電子装置
31 導体配線層(導電性構造物)
32 表面処理層
33 第2の電気絶縁層
34 フォトマスク
Claims (14)
- 薄板状の基材と、
前記基材上に設けられ、かつ厚み方向に複数の開口を有する電気絶縁層と、
前記開口内に充填される金属めっき層とを備え、
前記基材は、少なくとも、金属層と、前記金属層に接して形成した剥離層と、前記剥離層に接して形成した金属膜とを有することを特徴とする電子装置用基板。 - 前記基材は、前記電気絶縁層の側から順に、金属層、剥離層、金属膜、テープ部材の層構成を有し、前記剥離層を介した前記金属層と前記金属膜との接着力が、前記金属層と前記電気絶縁層との接着力よりも小さいことを特徴とする請求項1記載の電子装置用基板。
- 前記電気絶縁層は、ソルダーレジスト、フォトソルダーレジスト、またはポリイミドフィルムであることを特徴とする請求項1記載の電子装置用基板。
- 前記金属めっき層は、金、銀、銅、ニッケル、パラジウム、スズ、ロジウム、コバルトの単体、あるいはそれらの合金の単層、或いは積層したものであることを特徴とする請求項1記載の電子装置用基板。
- 金属層、剥離層、及び金属膜を積層して形成した複合金属層と、テープ部材とを一体化して基材を形成する第1の工程と、
前記基材の前記金属層上に電気絶縁層を形成する第2の工程と、
前記電気絶縁層に開口を形成する第3の工程と、
前記開口に金属めっき層を充填する第4の工程と、を含むことを特徴とする電子装置用基板の製造方法。 - 1つ以上の外部接続用の電極を備えた電子部品と、
前記電子部品が搭載されると共に、厚み方向に複数の開口が形成された電気絶縁層と、
前記電気絶縁層の前記開口内のみに充填され、前記電子部品の前記電極と接続される金属めっき層と、
前記金属めっき層の前記電子部品との接続面と前記電子部品とを被覆する絶縁性被覆材料と、
前記電気絶縁層の絶縁性被覆材料の反対側で前記金属めっき層に接して設けられる導電性構造物とを備えることを特徴とする電子装置。 - 前記導電性構造物の表面に表面処理層が形成されていることを特徴とする請求項6記載の電子装置。
- 前記導電性構造物が外部実装用の突起状端子であることを特徴とする請求項6記載の電子装置。
- 前記導電性構造物が導体回路を構成する断面矩形状の導体配線層であることを特徴とする請求項6記載の電子装置。
- テープ部材上に、順に、金属膜、剥離層、金属層が形成された薄板状の基材と、前記基材上に設けられ、かつ厚み方向に複数の開口を有する電気絶縁層と、前記開口内に充填される金属めっき層とを備える電子装置用基板を用意する第1の工程と、
前記電子装置用基板に、電子部品を搭載し、前記電子部品の所定の電極と前記金属めっき層とを電気的に接続後、少なくとも前記電子部品と前記金属めっき層の電気的接続部を絶縁性被覆材料で被覆する第2の工程と、
前記剥離層を利用して前記電子装置用基板から前記テープ部材及び前記金属膜を除去すると共に、前記金属層を前記電子装置用基板に残留させる第3の工程と、
前記金属層において、前記金属めっき層に対応する位置にフォトファブリケーションによる選択的ケミカルエッチング法を用いて導電性構造物を形成する第4の工程とを含むことを特徴とする電子装置の製造方法。 - 前記導電性構造物が外部実装用の突起状端子であることを特徴とする請求項10記載の電子装置の製造方法。
- 前記突起状端子の表面に、更に、めっき法により表面処理層を設ける工程を含むことを特徴とする請求項11記載の電子装置の製造方法。
- 前記導電性構造物が導体回路を構成する断面矩形状の導体配線層であることを特徴とする請求項10記載の電子装置の製造方法。
- 前記導体配線層の表面に、めっき法により表面処理層を設け、更に該表面処理層の一部に第2の電気絶縁層を被覆することを特徴とする請求項13記載の電子装置の製造方法。
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JP2005236035A (ja) * | 2004-02-19 | 2005-09-02 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
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JPH09252014A (ja) | 1996-03-15 | 1997-09-22 | Nissan Motor Co Ltd | 半導体素子の製造方法 |
US6635957B2 (en) * | 1998-06-10 | 2003-10-21 | Asat Ltd. | Leadless plastic chip carrier with etch back pad singulation and die attach pad array |
US6346335B1 (en) * | 2000-03-10 | 2002-02-12 | Olin Corporation | Copper foil composite including a release layer |
JP3626075B2 (ja) | 2000-06-20 | 2005-03-02 | 九州日立マクセル株式会社 | 半導体装置の製造方法 |
JP4245370B2 (ja) * | 2003-02-21 | 2009-03-25 | 大日本印刷株式会社 | 半導体装置の製造方法 |
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JP5113346B2 (ja) * | 2006-05-22 | 2013-01-09 | 日立電線株式会社 | 電子装置用基板およびその製造方法、ならびに電子装置およびその製造方法 |
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JPH10125818A (ja) * | 1996-10-16 | 1998-05-15 | Toppan Printing Co Ltd | 半導体装置用基板並びに半導体装置及びそれらの製造方法 |
JP2004179295A (ja) * | 2002-11-26 | 2004-06-24 | Hitachi Metals Ltd | パッケージの製造方法 |
JP2005011883A (ja) * | 2003-06-17 | 2005-01-13 | Shinko Electric Ind Co Ltd | 配線基板、半導体装置および配線基板の製造方法 |
JP2005236035A (ja) * | 2004-02-19 | 2005-09-02 | Sanyo Electric Co Ltd | 半導体装置およびその製造方法 |
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JP2009158912A (ja) * | 2007-12-26 | 2009-07-16 | Samsung Electro-Mechanics Co Ltd | パッケージ用基板及びその製造方法 |
JP2010287893A (ja) * | 2009-06-11 | 2010-12-24 | Lsi Corp | 電子デバイスパッケージ及び製造方法 |
CN102270584A (zh) * | 2010-06-02 | 2011-12-07 | 联致科技股份有限公司 | 电路板结构、封装结构与制作电路板的方法 |
KR20160032921A (ko) * | 2014-09-17 | 2016-03-25 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지의 제조 방법 및 반도체 패키지 |
KR101666719B1 (ko) * | 2014-09-17 | 2016-10-17 | 앰코 테크놀로지 코리아 주식회사 | 반도체 패키지의 제조 방법 및 반도체 패키지 |
Also Published As
Publication number | Publication date |
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US8230588B2 (en) | 2012-07-31 |
KR20070112699A (ko) | 2007-11-27 |
US20070269590A1 (en) | 2007-11-22 |
US20090323299A1 (en) | 2009-12-31 |
US7880091B2 (en) | 2011-02-01 |
KR100838440B1 (ko) | 2008-06-16 |
JP5113346B2 (ja) | 2013-01-09 |
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