JP2007205908A - 重量センサ - Google Patents

重量センサ Download PDF

Info

Publication number
JP2007205908A
JP2007205908A JP2006025455A JP2006025455A JP2007205908A JP 2007205908 A JP2007205908 A JP 2007205908A JP 2006025455 A JP2006025455 A JP 2006025455A JP 2006025455 A JP2006025455 A JP 2006025455A JP 2007205908 A JP2007205908 A JP 2007205908A
Authority
JP
Japan
Prior art keywords
strain
insulating
paste
weight sensor
insulating layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP2006025455A
Other languages
English (en)
Inventor
Koichi Yuda
康一 油田
Hiroaki Ishida
裕昭 石田
Yukio Mizukami
行雄 水上
Masahiko Obayashi
正彦 大林
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP2006025455A priority Critical patent/JP2007205908A/ja
Priority to US12/160,960 priority patent/US7933127B2/en
Publication of JP2007205908A publication Critical patent/JP2007205908A/ja
Pending legal-status Critical Current

Links

Images

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00Details of semiconductor or other solid state devices
    • H01L23/52Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/538Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates
    • H01L23/5388Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates for flat cards, e.g. credit cards
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/81Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L24/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L25/00Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof
    • H01L25/03Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes
    • H01L25/04Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers
    • H01L25/065Assemblies consisting of a plurality of individual semiconductor or other solid state devices ; Multistep manufacturing processes thereof all the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/00, or in a single subclass of H10K, H10N, e.g. assemblies of rectifier diodes the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L25/0657Stacked arrangements of devices
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/0556Disposition
    • H01L2224/05568Disposition the whole external layer protruding from the surface
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02Bonding areas; Manufacturing methods related thereto
    • H01L2224/04Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/05Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
    • H01L2224/0554External layer
    • H01L2224/05573Single external layer
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/28Structure, shape, material or disposition of the layer connectors prior to the connecting process
    • H01L2224/29Structure, shape, material or disposition of the layer connectors prior to the connecting process of an individual layer connector
    • H01L2224/29001Core members of the layer connector
    • H01L2224/29099Material
    • H01L2224/2919Material with a principal constituent of the material being a polymer, e.g. polyester, phenolic based polymer, epoxy
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73201Location after the connecting process on the same surface
    • H01L2224/73203Bump and layer connectors
    • H01L2224/73204Bump and layer connectors the bump connector being embedded into the layer connector
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/8319Arrangement of the layer connectors prior to mounting
    • H01L2224/83192Arrangement of the layer connectors prior to mounting wherein the layer connectors are disposed only on another item or body to be connected to the semiconductor or solid-state body
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/80Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected
    • H01L2224/83Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a layer connector
    • H01L2224/838Bonding techniques
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06517Bump or bump-like direct electrical connections from device to substrate
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06555Geometry of the stack, e.g. form of the devices, geometry to facilitate stacking
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06572Auxiliary carrier between devices, the carrier having an electrical connection structure
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2225/00Details relating to assemblies covered by the group H01L25/00 but not provided for in its subgroups
    • H01L2225/03All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00
    • H01L2225/04All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers
    • H01L2225/065All the devices being of a type provided for in the same subgroup of groups H01L27/00 - H01L33/648 and H10K99/00 the devices not having separate containers the devices being of a type provided for in group H01L27/00
    • H01L2225/06503Stacked arrangements of devices
    • H01L2225/06582Housing for the assembly, e.g. chip scale package [CSP]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/0001Technical content checked by a classifier
    • H01L2924/00014Technical content checked by a classifier the subject-matter covered by the group, the symbol of which is combined with the symbol of this group, being disclosed without further technical details
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01005Boron [B]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01006Carbon [C]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01033Arsenic [As]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01047Silver [Ag]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01074Tungsten [W]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01079Gold [Au]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01082Lead [Pb]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01Chemical elements
    • H01L2924/01087Francium [Fr]
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013Alloys
    • H01L2924/014Solder alloys
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/06Polymers
    • H01L2924/0665Epoxy resin
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/182Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09009Substrate related
    • H05K2201/09072Hole or recess under component or special relationship between hole and component
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10007Types of components
    • H05K2201/10159Memory
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10507Involving several components
    • H05K2201/10515Stacked components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10674Flip chip
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10954Other details of electrical connections
    • H05K2201/10977Encapsulated connections
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/13Moulding and encapsulation; Deposition techniques; Protective layers
    • H05K2203/1305Moulding and encapsulation
    • H05K2203/1316Moulded encapsulation of mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/28Applying non-metallic protective coatings
    • H05K3/284Applying non-metallic protective coatings for encapsulating mounted components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/30Assembling printed circuits with electric components, e.g. with resistor
    • H05K3/32Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits
    • H05K3/34Assembling printed circuits with electric components, e.g. with resistor electrically connecting electric components or wires to printed circuits by soldering
    • H05K3/341Surface mounted components
    • H05K3/3431Leadless components
    • H05K3/3436Leadless components having an array of bottom contacts, e.g. pad grid array or ball grid array components
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10TTECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
    • Y10T29/00Metal working
    • Y10T29/49Method of mechanical manufacture
    • Y10T29/49002Electrical device making
    • Y10T29/49117Conductor or circuit manufacturing
    • Y10T29/49124On flat or curved insulated base, e.g., printed circuit, etc.
    • Y10T29/4913Assembling to base an electrical component, e.g., capacitor, etc.

Abstract

【課題】電極と絶縁層との熱膨張率の違いにより、焼成時に絶縁層にクラックが発生するということのない、製造時の歩留まりの向上した重量センサを提供することを目的とするものである。
【解決手段】複数の貫通孔10を有し荷重により歪を生じる金属板(ステンレス板)からなる起歪体12と、この起歪体12の貫通孔10の間に配置され歪量に応じて抵抗値が変化する4つの抵抗素子14と、抵抗素子14の両端部に接続した電極16と、配線パターン17を介して電極16と結線された信号処理回路18とを備え、抵抗素子14および電極16および配線パターン17は起歪体12上に配置した絶縁ガラスからなる絶縁層20上に絶縁層20とともに同時焼成して形成され、焼成前の電極16および配線パターンは粒径が2.0μm〜10.0μmのAg粒子を含有し、焼成前の絶縁層には1.0重量%〜3.0重量%の無機フィラーを添加した構成である。
【選択図】図1

Description

本発明は、車両用シート等の荷重を測定するための重量センサに関するものである。
以下、従来の重量センサについて説明する。
図5は従来の重量センサの平面図、図6は図5におけるA部の拡大断面図である。
図5、図6において、従来の重量センサは、複数の貫通孔1を有し荷重により歪を生じる金属板からなる起歪体2と、この起歪体2の貫通孔1の間に配置され歪量に応じて抵抗値が変化する抵抗素子3と、抵抗素子3の両端部に接続した電極4と、この電極4に結線された信号処理回路(図示せず)とを備えている。抵抗素子3および電極4は起歪体2上に配置した絶縁ガラスからなる絶縁層5上に設けている。
その製造方法は、荷重により歪を生じる金属板からなる起歪体2に、絶縁ガラスからなる絶縁層5を形成する工程と、歪量に応じて抵抗値が変化する抵抗素子3および抵抗素子3に接続した電極4とを絶縁層5上に形成する工程とを備えている。また、電極4および絶縁層5は、起歪体2上にガラス粒子を含有した絶縁ペーストを塗布するとともに、この絶縁ペースト上にAg粒子を含有したAgペーストを塗布して、これら絶縁ペーストおよびAgペーストを同時焼成して形成する。
この重量センサを、例えば、車両用シートと床面部との間に取り付ければ、車両用シートに座る人員の荷重を測定することができる。起歪体2に設けた複数の貫通孔1の内、内側の貫通孔1に車両用シートの一部を挿入して起歪体2と車両用シートとを連結し、外側の貫通孔1に床面部の一部を挿入して起歪体2と床面部とを連結して取り付ける。そうすると、車両用シートに荷重が加わった際、起歪体2が歪んで抵抗素子3の抵抗値が変化するので、これを信号処理回路(図示せず)で処理することによって荷重を測定することができる。
なお、この出願の発明に関連する先行技術文献情報としては、例えば、特許文献1が知られている。
特開2003−240633号公報
上記構成において、電極4および絶縁層5は、起歪体2上にガラス粒子を含有した絶縁ペーストを塗布するとともに、この絶縁ペースト上にAg粒子を含有したAgペーストを塗布して、これら絶縁ペーストおよびAgペーストを同時焼成して形成されている。この焼成の際、電極4と絶縁層5の熱膨張率等の違いにより、電極4の方が絶縁層5よりも縮むため、図6に示すように、絶縁層5にクラック6が発生することとなり、その結果、絶縁層5にクラック6が発生していない良品のみ選別する必要が生じるから、重量センサの製造時の歩留まりが低下してしまうという課題を有していた。
本発明は上記問題点を解決するもので、電極と絶縁層との熱膨張率の違いにより、焼成時に絶縁層にクラックが発生するということのない、製造時の歩留まりの向上した重量センサを提供することを目的とするものである。
上記目的を達成するために本発明は、荷重により歪を生じる金属板からなる起歪体と、前記起歪体に配置され歪量に応じて抵抗値が変化する抵抗素子と、前記抵抗素子に接続した導体とを備え、前記抵抗素子および前記導体は前記起歪体上に配置した絶縁ガラスからなる絶縁層上に形成するとともに、前記導体および前記絶縁ガラスは同時焼成して形成しており、焼成前の前記導体は粒径が2.0μm〜10.0μmのAg粒子を含有するとともに、焼成前の前記絶縁ガラスは無機フィラーを含有する構成である。
また、その製造方法は、荷重により歪を生じる金属板からなる起歪体に、絶縁ガラスからなる絶縁層を形成する工程と、歪量に応じて抵抗値が変化する抵抗素子および前記抵抗素子に接続した導体とを前記絶縁層上に形成する工程とを備え、前記絶縁層および前記導体は、前記起歪体上にガラス粒子と無機フィラーを含有した絶縁ペーストを塗布するとともに前記絶縁ペースト上にAg粒子を含有したAgペーストを塗布し、前記絶縁ペーストと前記Agペーストとを同時焼成して形成し、かつ、前記Agペーストは粒径が2.0μm〜10.0μmのAg粒子を含有する構成である。
上記構成により、焼成前の導体は粒径が2.0μm〜10.0μmのAg粒子を含有するので、焼成時におけるAg粒子の収縮速度を低下させることができるとともに、焼成前の絶縁ガラスは無機フィラーを含有するので、焼成時における流動性を低下させることができるため、電極が絶縁層よりも縮むということがなくなり、これにより、絶縁層にクラックが発生しなくなるから、製造時に絶縁層にクラックの発生していない良品のみを選別する必要がなくなり、その結果、歩留まりの向上した重量センサを提供することができるという効果を有するものである。
以下、本発明の実施の形態について図面を参照しながら説明する。
図1は本発明の一実施の形態における重量センサの平面図、図2は図1におけるA部の拡大断面図、図3は図1におけるA部の拡大斜視図、図4は同重量センサに用いる信号処理回路図である。
図1〜図4において、本発明の一実施の形態における重量センサは、複数の貫通孔10を有し荷重により歪を生じる金属板(ステンレス板)からなる起歪体12と、この起歪体12の貫通孔10の間に配置され歪量に応じて抵抗値が変化する4つの抵抗素子14と、抵抗素子14の両端部に接続した電極16と、配線パターン17を介して電極16と結線された信号処理回路18とを備えている。抵抗素子14および電極16は起歪体12上に配置した絶縁ガラスからなる絶縁層20上に同時焼成して形成されている。
また、その製造方法においては、荷重により歪を生じる金属板(ステンレス板)からなる起歪体12上に絶縁ガラスからなる絶縁層20を形成する工程と、歪量に応じて抵抗値が変化する抵抗素子14およびこの抵抗素子14に接続した導体からなる電極16およびこの電極16と信号処理回路18を結線する導体からなる配線パターン17とを絶縁層20上に形成する工程とを備えている。絶縁層20および導体を形成する工程では、起歪体12上にガラス粒子を含有した絶縁ペーストを塗布する工程と、この絶縁ペースト上にAg粒子を含有したAgペーストを塗布する工程と、塗布された絶縁ペーストおよびAgペーストを同時焼成する工程とを有する。ペーストとは金属粉末やガラス粉末や無機酸化物等を有機溶媒中に混練、分散させて液状にしたものであり、金属粉末の一つであるAgを含有したものが上記Agペーストであり、絶縁性材料を含有したものが上記絶縁ペーストである。上記の同時焼成により、起歪体12上には絶縁ガラスからなる絶縁層20が形成され、絶縁層20上には導体からなる電極16および配線パターン17が形成される。
このAgペーストは粒径が2.0μm〜10.0μmのAg粒子を含有し、この絶縁ペーストには1.0重量%〜3.0重量%の無機フィラーを添加している。このAg粒子の粒径および無機フィラーの割合は、所定の絶縁層20の膜厚に対し、絶縁層20と電極16との境界部分、絶縁層20と配線パターン17との境界部分において、クラックの発生がない割合にて定めている。
絶縁ペーストに対する無機フィラー(アルミナ)の添加量が1.5重量%時において、絶縁層20の膜厚とAg粒子の平均粒径におけるクラック発生有無の関係は(表1)に示すとおりである。
Figure 2007205908
また、AgペーストのAg粒子の平均粒径がφ2.0μm時において、絶縁層20の膜厚と無機フィラーの添加量におけるクラック発生有無の関係は(表2)に示すとおりである。
Figure 2007205908
この重量センサを、例えば、車両用シートと床面部との間に取り付ければ、車両用シートに座る人員の荷重を測定することができる。起歪体12に設けた複数の貫通孔10の内、内側の貫通孔10に車両用シートの一部を挿入して起歪体12と車両用シートとを連結し、外側の貫通孔10に床面部の一部を挿入して起歪体12と床面部とを連結して取り付ける。そうすると、車両用シートに荷重が加わった際、起歪体12が歪んで抵抗素子14の抵抗値が変化するので、これをCPU19を有する信号処理回路18で処理することによって荷重を測定することができる。信号処理回路18としては、例えば、図4に示すように、4つの抵抗素子14をホーイストンブリッジ回路28で形成し、この出力信号をCPU19で処理すればよい。
上記構成により、焼成前の導体であるAgペーストは粒径が2.0μm〜10.0μmのAg粒子を含有するので、焼成時におけるAg粒子の収縮速度を低下させることができ、また、焼成前の絶縁ガラスである絶縁ペーストは無機フィラーを含有するので、焼成時における流動性を低下させることができるとともに、焼成前の絶縁ガラスは無機フィラーを含有するので、焼成時における流動性を低下させることができるため、電極16が絶縁層20よりも縮むということがなくなり、これにより、絶縁層20にクラックが発生しなくなるから、製造時に絶縁層20にクラックの発生していない良品のみを選別する必要がなくなるという作用効果を有するものである。
すなわち、電極16と絶縁層20との境界部分におけるクラックの発生を防止して製造時の歩留まりを向上させることができる。さらに、焼成前の絶縁ガラスである絶縁ペーストに含有する無機フィラーの添加量は1.0重量%〜3.0重量%とすれば、的確にクラックの発生を防止できる。
以上のように本発明にかかる重量センサは、製造時の歩留まりの向上した重量センサを提供することができるという効果を有し、車両用シート等の荷重を測定するための重量センサ等に有用である。
本発明の一実施の形態における重量センサの平面図 図1におけるA部の拡大断面図 図1におけるA部の拡大斜視図 同重量センサに用いる信号処理回路図 従来の重量センサの平面図 図4におけるA部の拡大断面図
符号の説明
10 貫通孔
12 起歪体
14 抵抗素子
16 電極
17 配線パターン
18 信号処理回路
19 CPU
20 絶縁層
28 ホーイストンブリッジ回路

Claims (4)

  1. 荷重により歪を生じる金属板からなる起歪体と、前記起歪体に配置され歪量に応じて抵抗値が変化する抵抗素子と、前記抵抗素子に接続した導体とを備え、前記抵抗素子および前記導体は前記起歪体上に配置した絶縁ガラスからなる絶縁層上に形成するとともに、前記導体および前記絶縁ガラスは同時焼成して形成しており、焼成前の前記導体は粒径が2.0μm〜10.0μmのAg粒子を含有するとともに、焼成前の前記絶縁ガラスは無機フィラーを含有する重量センサ。
  2. 焼成前の前記絶縁ガラスに含有する無機フィラーの添加量は1.0重量%〜3.0重量%とした請求項1記載の重量センサ。
  3. 荷重により歪を生じる金属板からなる起歪体に、絶縁ガラスからなる絶縁層を形成する工程と、歪量に応じて抵抗値が変化する抵抗素子および前記抵抗素子に接続した導体とを前記絶縁層上に形成する工程とを備え、前記導体および前記絶縁層は、前記起歪体上にガラス粒子と無機フィラーを含有した絶縁ペーストを塗布するとともに前記絶縁ペースト上にAg粒子を含有したAgペーストを塗布し、前記絶縁ペーストと前記Agペーストとを同時焼成して形成し、かつ、前記Agペーストは粒径が2.0μm〜10.0μmのAg粒子を含有する重量センサの製造方法。
  4. 前記絶縁ペーストには1.0重量%〜3.0重量%の無機フィラーを添加する請求項3記載の重量センサの製造方法。
JP2006025455A 2006-02-02 2006-02-02 重量センサ Pending JP2007205908A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2006025455A JP2007205908A (ja) 2006-02-02 2006-02-02 重量センサ
US12/160,960 US7933127B2 (en) 2006-02-02 2007-01-24 Memory card and memory card manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2006025455A JP2007205908A (ja) 2006-02-02 2006-02-02 重量センサ

Publications (1)

Publication Number Publication Date
JP2007205908A true JP2007205908A (ja) 2007-08-16

Family

ID=38485499

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2006025455A Pending JP2007205908A (ja) 2006-02-02 2006-02-02 重量センサ

Country Status (2)

Country Link
US (1) US7933127B2 (ja)
JP (1) JP2007205908A (ja)

Families Citing this family (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN101689252A (zh) * 2007-06-15 2010-03-31 松下电器产业株式会社 存储卡及其制造方法
JP2010079445A (ja) * 2008-09-24 2010-04-08 Toshiba Corp Ssd装置
USD794643S1 (en) * 2009-01-07 2017-08-15 Samsung Electronics Co., Ltd. Memory device
USD795261S1 (en) * 2009-01-07 2017-08-22 Samsung Electronics Co., Ltd. Memory device
USD794641S1 (en) * 2009-01-07 2017-08-15 Samsung Electronics Co., Ltd. Memory device
USD794642S1 (en) * 2009-01-07 2017-08-15 Samsung Electronics Co., Ltd. Memory device
USD794034S1 (en) * 2009-01-07 2017-08-08 Samsung Electronics Co., Ltd. Memory device
USD794644S1 (en) * 2009-01-07 2017-08-15 Samsung Electronics Co., Ltd. Memory device
USD795262S1 (en) * 2009-01-07 2017-08-22 Samsung Electronics Co., Ltd. Memory device
CN110959314A (zh) * 2017-08-04 2020-04-03 株式会社藤仓 多层印刷布线板的制造方法以及多层印刷布线板

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63271878A (ja) * 1987-04-30 1988-11-09 Matsushita Electric Ind Co Ltd 面ヒ−タ
JPH0878847A (ja) * 1994-08-31 1996-03-22 Kyocera Corp 低温焼成多層回路基板
JP2002525599A (ja) * 1998-09-23 2002-08-13 マンネスマン ファウ デー オー アクチエンゲゼルシャフト 機械電気式トランスデューサ
WO2004015384A1 (ja) * 2002-08-07 2004-02-19 Matsushita Electric Industrial Co., Ltd. 荷重センサ及びその製造方法、それに用いるペースト及びその製造方法
WO2005043102A1 (ja) * 2003-11-04 2005-05-12 Matsushita Electric Industrial Co., Ltd. 荷重センサ及びその製造方法
JP2006194598A (ja) * 2005-01-11 2006-07-27 Matsushita Electric Ind Co Ltd 歪センサとその製造方法

Family Cites Families (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2550009B1 (fr) * 1983-07-29 1986-01-24 Inf Milit Spatiale Aeronaut Boitier de composant electronique muni d'un condensateur
US5237204A (en) * 1984-05-25 1993-08-17 Compagnie D'informatique Militaire Spatiale Et Aeronautique Electric potential distribution device and an electronic component case incorporating such a device
JP2847949B2 (ja) 1990-10-31 1999-01-20 松下電器産業株式会社 半導体装置
EP0732107A3 (en) * 1995-03-16 1997-05-07 Toshiba Kk Screen device for circuit substrate
JPH10244791A (ja) * 1997-03-07 1998-09-14 Fujitsu Ltd カード型電子装置
KR100298897B1 (ko) * 1998-12-23 2001-09-22 이형도 인쇄회로기판제조방법
JP2001077293A (ja) * 1999-09-02 2001-03-23 Nec Corp 半導体装置
US6368894B1 (en) 1999-09-08 2002-04-09 Ming-Tung Shen Multi-chip semiconductor module and manufacturing process thereof
JP2001102516A (ja) 1999-09-27 2001-04-13 Toshiba Corp 半導体装置およびその製造方法
JP3822768B2 (ja) * 1999-12-03 2006-09-20 株式会社ルネサステクノロジ Icカードの製造方法
JP3815936B2 (ja) * 2000-01-25 2006-08-30 株式会社ルネサステクノロジ Icカード
JP2002109498A (ja) 2000-09-28 2002-04-12 Toshiba Corp 携帯可能電子媒体
JP3499202B2 (ja) * 2000-10-16 2004-02-23 沖電気工業株式会社 半導体装置の製造方法
JP2002288618A (ja) 2001-03-23 2002-10-04 Toshiba Corp 携帯可能電子媒体及び電子回路部品
JP4408598B2 (ja) 2001-09-28 2010-02-03 パナソニック株式会社 カード型記録媒体
US6998292B2 (en) * 2001-11-30 2006-02-14 Vitesse Semiconductor Corporation Apparatus and method for inter-chip or chip-to-substrate connection with a sub-carrier
JP4171246B2 (ja) 2002-06-10 2008-10-22 株式会社ルネサステクノロジ メモリカードおよびその製造方法
KR100842518B1 (ko) * 2006-11-27 2008-07-01 삼성전자주식회사 메인 보드

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63271878A (ja) * 1987-04-30 1988-11-09 Matsushita Electric Ind Co Ltd 面ヒ−タ
JPH0878847A (ja) * 1994-08-31 1996-03-22 Kyocera Corp 低温焼成多層回路基板
JP2002525599A (ja) * 1998-09-23 2002-08-13 マンネスマン ファウ デー オー アクチエンゲゼルシャフト 機械電気式トランスデューサ
WO2004015384A1 (ja) * 2002-08-07 2004-02-19 Matsushita Electric Industrial Co., Ltd. 荷重センサ及びその製造方法、それに用いるペースト及びその製造方法
WO2005043102A1 (ja) * 2003-11-04 2005-05-12 Matsushita Electric Industrial Co., Ltd. 荷重センサ及びその製造方法
JP2006194598A (ja) * 2005-01-11 2006-07-27 Matsushita Electric Ind Co Ltd 歪センサとその製造方法

Also Published As

Publication number Publication date
US20100157550A1 (en) 2010-06-24
US7933127B2 (en) 2011-04-26

Similar Documents

Publication Publication Date Title
JP2007205908A (ja) 重量センサ
EP2902775B1 (en) Metal paste for sensor electrode formation, manufacturing method thereof, sensor electrode and manufacturing method thereof
JP2007018884A (ja) 導電性ペースト
JP4884103B2 (ja) セラミックヒータおよびガスセンサ素子
WO2005117493A1 (ja) セラミックヒータとそれを用いた酸素センサ及びヘアアイロン
KR20110063635A (ko) 세라믹 히터
JP2019004000A (ja) インダクタ部品及びその製造方法
JP3800108B2 (ja) 導電性ペースト
JP6968524B2 (ja) 厚膜導電ペーストおよびセラミック多層積層電子部品の製造方法
JP5576843B2 (ja) 導体パターン印刷用インク
JP6850608B2 (ja) 電子構造素子およびその製造方法
JPWO2003031907A1 (ja) 歪センサ及びその製造方法
JP5856738B2 (ja) サーマルヘッド
JP2005116938A (ja) キャビティ付き多層セラミック基板およびその製造方法
JP3807257B2 (ja) セラミック部品の製造方法
JP2011002478A (ja) 感光性ペースト、及び電子部品
JP3130914B2 (ja) 多層回路基板
JP7294827B2 (ja) 電気検査用基板
JPWO2017146121A1 (ja) ガスセンサー電極及びその製造方法
JP2006278786A (ja) 温度検出素子
JPH08178768A (ja) 力学量センサ
JP2009301826A (ja) セラミックヒータの製造方法
JP2016152373A (ja) セラミック基板
JP4522887B2 (ja) 圧電トランス
JP2001189558A (ja) 多層配線基板

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20090113

RD01 Notification of change of attorney

Free format text: JAPANESE INTERMEDIATE CODE: A7421

Effective date: 20091127

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20110411

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20110419

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20110823