JP2007005801A - 金属反射層を形成したledパッケージ及びその製造方法 - Google Patents
金属反射層を形成したledパッケージ及びその製造方法 Download PDFInfo
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- 229910052751 metal Inorganic materials 0.000 title claims abstract description 38
- 239000002184 metal Substances 0.000 title claims abstract description 38
- 238000004519 manufacturing process Methods 0.000 title claims abstract description 31
- 238000000465 moulding Methods 0.000 claims abstract description 80
- 239000000758 substrate Substances 0.000 claims abstract description 55
- 238000001721 transfer moulding Methods 0.000 claims abstract description 15
- 238000009826 distribution Methods 0.000 claims abstract description 9
- 229920006336 epoxy molding compound Polymers 0.000 claims description 44
- 238000000034 method Methods 0.000 claims description 30
- OAICVXFJPJFONN-UHFFFAOYSA-N Phosphorus Chemical compound [P] OAICVXFJPJFONN-UHFFFAOYSA-N 0.000 claims description 24
- 238000007747 plating Methods 0.000 claims description 15
- 239000000203 mixture Substances 0.000 claims description 13
- 238000004544 sputter deposition Methods 0.000 claims description 13
- 238000005520 cutting process Methods 0.000 claims description 10
- 229910052709 silver Inorganic materials 0.000 claims description 8
- 229910052782 aluminium Inorganic materials 0.000 claims description 7
- 229910052737 gold Inorganic materials 0.000 claims description 7
- 229910052759 nickel Inorganic materials 0.000 claims description 7
- 229910052697 platinum Inorganic materials 0.000 claims description 7
- 229910052719 titanium Inorganic materials 0.000 claims description 7
- 229910052721 tungsten Inorganic materials 0.000 claims description 7
- 239000007787 solid Substances 0.000 claims description 5
- 229910010293 ceramic material Inorganic materials 0.000 claims description 4
- 238000005498 polishing Methods 0.000 claims description 4
- 239000007788 liquid Substances 0.000 claims description 3
- 238000002310 reflectometry Methods 0.000 claims description 3
- 238000005530 etching Methods 0.000 claims description 2
- 238000001465 metallisation Methods 0.000 claims description 2
- 238000007740 vapor deposition Methods 0.000 claims description 2
- 230000003287 optical effect Effects 0.000 abstract description 2
- 230000001788 irregular Effects 0.000 abstract 1
- 238000002347 injection Methods 0.000 description 5
- 239000007924 injection Substances 0.000 description 5
- 239000004593 Epoxy Substances 0.000 description 4
- 239000000463 material Substances 0.000 description 4
- 238000007789 sealing Methods 0.000 description 3
- 238000010586 diagram Methods 0.000 description 2
- 238000007772 electroless plating Methods 0.000 description 2
- 238000009713 electroplating Methods 0.000 description 2
- 239000003822 epoxy resin Substances 0.000 description 2
- 229920000647 polyepoxide Polymers 0.000 description 2
- 239000000047 product Substances 0.000 description 2
- 229920005989 resin Polymers 0.000 description 2
- 239000011347 resin Substances 0.000 description 2
- 239000000243 solution Substances 0.000 description 2
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 239000012141 concentrate Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000010438 heat treatment Methods 0.000 description 1
- 239000007791 liquid phase Substances 0.000 description 1
- 239000007769 metal material Substances 0.000 description 1
- 238000012986 modification Methods 0.000 description 1
- 230000004048 modification Effects 0.000 description 1
- 239000012071 phase Substances 0.000 description 1
- 229920001690 polydopamine Polymers 0.000 description 1
- 239000002244 precipitate Substances 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007790 solid phase Substances 0.000 description 1
- 238000001771 vacuum deposition Methods 0.000 description 1
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- H—ELECTRICITY
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- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/58—Optical field-shaping elements
- H01L33/60—Reflective elements
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- H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
- H01L24/93—Batch processes
- H01L24/95—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips
- H01L24/97—Batch processes at chip-level, i.e. with connecting carried out on a plurality of singulated devices, i.e. on diced chips the devices being connected to a common substrate, e.g. interposer, said common substrate being separable into individual assemblies after connecting
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
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- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73201—Location after the connecting process on the same surface
- H01L2224/73203—Bump and layer connectors
- H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
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- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/10—Details of semiconductor or other solid state devices to be connected
- H01L2924/11—Device type
- H01L2924/12—Passive devices, e.g. 2 terminal devices
- H01L2924/1204—Optical Diode
- H01L2924/12041—LED
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/156—Material
- H01L2924/15786—Material with a principal constituent of the material being a non metallic, non metalloid inorganic material
- H01L2924/15787—Ceramics, e.g. crystalline carbides, nitrides or oxides
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/483—Containers
- H01L33/486—Containers adapted for surface mounting
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Led Device Packages (AREA)
Abstract
【解決手段】本発明はLEDチップから出た光を一方向に投射させるためのLEDパッケージにおいて、電極が形成された基板と、上記基板上に配置されたLEDチップと、上記基板とLEDチップ上に覆われ上記素子を保護するモールディング部、及び上記モールディング部側面を取り囲み、上記モールディング部の上部面に投光面を形成した反射層と、を含む金属反射層を形成したLEDパッケージとその製造方法を提供する。本発明によれば、光損失を最小化して輝度を改善し、PCBタイプで大量生産が可能で、EMCトランスファーモールディング法を採択することにより不均一な色分布の最小化が可能なため光学品質が大きく向上される効果が得られる。
【選択図】図4
Description
5 LEDチップ
10 モールディング部
15 基板
15a、15b、15c 電極
17 投光面
20 反射層
22 メッキ層
22’ スパッタリング層
100 LEDパッケージの製造方法
102 電極が形成された基板を提供する段階
104 LEDチップを配置する段階
106 モールディング部を形成する段階
108 モールディング部を切断する段階
110 反射層を形成する段階
110’ 投光面を形成する段階
112 多数個に分離してLEDパッケージ1を製作する段階
200 EMCトランスファーモールディング法
210 モールド
220 透明EMCと蛍光体の混合物
222a 透明EMC
222b 蛍光体
300 LEDパッケージ
310 LEDチップ
312 反射層
314 密封板
320 基板
322 凹部
400 LEDパッケージ
410 基板
412 LEDチップ
414 射出物
414a 空間
416 モールディング部
418a エポキシ
418b 蛍光体
Claims (14)
- LEDチップから出た光を一方向に投射させるためのLEDパッケージにおいて、
電極が形成された基板と、
前記基板上に配置され、前記電極と電気的に接続されたLEDチップと、
前記基板とLEDチップ上を覆い、前記LEDチップを保護するモールディング部と、
前記モールディング部の側面を取り囲み、前記モールディング部の上部面に投光面を形成した反射層と
を含むことを特徴とする金属反射層を形成したLEDパッケージ。 - 前記反射層は、Al、Au、Ag、Ni、W、Ti、Ptのうちの少なくともいずれかを金属蒸着またはメッキすることにより形成されることを特徴とする請求項1に記載の金属反射層を形成したLEDパッケージ。
- 前記基板は、電極が形成されたPCBであるかセラミック材料からなることを特徴とする請求項1に記載の金属反射層を形成したLEDパッケージ。
- 前記投光面の光投射方向は、前記LEDチップが配置される面の正面であることを特徴とする請求項1に記載の金属反射層を形成したLEDパッケージ。
- 前記モールディング部は、蛍光体が混合された透明EMC(Epoxy Molding Compound)の混合物で形成されEMC内に蛍光体が均一に散布されたことを特徴とする請求項1に記載の金属反射層を形成したLEDパッケージ。
- LEDチップから出た光を一方向に投射させるためのLEDパッケージの製造方法において、
電極が形成された基板を提供する段階と、
前記基板上にLEDチップを配置して、前記LEDチップを前記電極と電気的に接続する段階と、
前記基板とLEDチップ上にモールディング部を形成する段階と、
前記モールディング部を切断して側面を形成する段階と、
前記モールディング部の前記側面に反射層を形成する段階と
を含むことを特徴とする金属反射層を形成したLEDパッケージの製造方法。 - 前記モールディング部を形成する段階は、蛍光体が混合された透明EMC(Epoxy Molding Compound)トランスファーモールディング法を利用することを特徴とする請求項6に記載の金属反射層を形成したLEDパッケージの製造方法。
- 前記基板を提供する段階において、前記基板上にメッキ用パターン電極が設けられ、
前記モールディング部を切断する段階は、前記LEDチップに対して所望の形態のモールディング部が形成されるようモールディング部のみをダイシング(dicing)またはエッチング(etching)し、前記基板上の前記メッキ用パターン電極を露出させることを特徴とする請求項6に記載の金属反射層を形成したLEDパッケージの製造方法。 - 前記反射層を形成する段階は、Al、Au、Ag、Ni、W、Ti、Ptのうちの少なくともいずれかを金属蒸着またはメッキすることにより形成されることを特徴とする請求項6に記載の金属反射層を形成したLEDパッケージの製造方法。
- 前記反射層を形成する段階は、反射率が高い金属を真空スパッタリング(sputtering)でモールディング部の前記側面および前面を覆うようにスパッタリング層を形成した後、前記前面に形成された前記スパッタリング層をポリシング(Polishing)して除去させることにより投光面を形成する段階を含むことを特徴とする請求項6に記載の金属反射層を形成したLEDパッケージの製造方法。
- 前記反射層を形成する段階は、それぞれのLEDパッケージごとにメッキ層またはスパッタリング層と基板を切断してLEDパッケージを相互分離する段階を含むことを特徴とする請求項6に記載の金属反射層を形成したLEDパッケージの製造方法。
- 前記モールディング部を形成する段階は、150〜190℃に維持されるモールド内に基板とLEDチップを投入し、モールドに80〜90℃に維持される固体状態の透明EMCと蛍光体の混合物を投入した後、前記透明EMCと蛍光体の混合物を固体状態から液体状態にモールド内で相変化させモールディング部を形成するEMCトランスファーモールディング法を用いることを特徴とする請求項7に記載の金属反射層を形成したLEDパッケージの製造方法。
- 前記透明EMCと蛍光体の混合物はモールド内で500〜1000psiに加圧されることをさらに含むことを特徴とする請求項12に記載の金属反射層を形成したLEDパッケージの製造方法。
- 前記EMCトランスファーモールディング法で製作されたモールディング部は透明EMC内に含まれた蛍光体が沈殿されないため不均一な色分布(irregular color distribution)が最小化される状態で硬化されることを特徴とする請求項13に記載の金属反射層を形成したLEDパッケージの製造方法。
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KR1020050053163A KR100638868B1 (ko) | 2005-06-20 | 2005-06-20 | 금속 반사 층을 형성한 엘이디 패키지 및 그 제조 방법 |
KR10-2005-0053163 | 2005-06-20 |
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US (2) | US20060284207A1 (ja) |
JP (1) | JP4824487B2 (ja) |
KR (1) | KR100638868B1 (ja) |
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JP2009224537A (ja) * | 2008-03-17 | 2009-10-01 | Citizen Holdings Co Ltd | Ledデバイスおよびその製造方法 |
WO2010082614A1 (ja) * | 2009-01-19 | 2010-07-22 | ローム株式会社 | Ledモジュールの製造方法およびledモジュール |
JPWO2009066430A1 (ja) * | 2007-11-19 | 2011-03-31 | パナソニック株式会社 | 半導体発光装置および半導体発光装置の製造方法 |
JP2011228671A (ja) * | 2010-04-16 | 2011-11-10 | Advanced Optoelectronic Technology Inc | 発光ダイオードチップ収納用パッケージ及びその基体の製造方法 |
JP2014522129A (ja) * | 2011-08-16 | 2014-08-28 | コーニンクレッカ フィリップス エヌ ヴェ | スロット内に形成される反射壁部を備えるled混合チャンバ |
JP2018509650A (ja) * | 2015-03-11 | 2018-04-05 | オスラム オプト セミコンダクターズ ゲゼルシャフト ミット ベシュレンクテル ハフツングOsram Opto Semiconductors GmbH | 複数の変換素子、変換素子、およびオプトエレクトロニクス装置の製造方法 |
JP7386417B2 (ja) | 2020-03-18 | 2023-11-27 | 日亜化学工業株式会社 | 発光装置及びその製造方法 |
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Also Published As
Publication number | Publication date |
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TWI307973B (en) | 2009-03-21 |
US20080233666A1 (en) | 2008-09-25 |
CN100444417C (zh) | 2008-12-17 |
US20060284207A1 (en) | 2006-12-21 |
KR100638868B1 (ko) | 2006-10-27 |
JP4824487B2 (ja) | 2011-11-30 |
TW200723566A (en) | 2007-06-16 |
CN1885580A (zh) | 2006-12-27 |
US7687292B2 (en) | 2010-03-30 |
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