JP2006528839A - 部品を埋め込まれた回路基板及び製造方法 - Google Patents
部品を埋め込まれた回路基板及び製造方法 Download PDFInfo
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/18—Printed circuits structurally associated with non-printed electric components
- H05K1/182—Printed circuits structurally associated with non-printed electric components associated with components mounted in the printed circuit board, e.g. insert mounted components [IMC]
- H05K1/185—Components encapsulated in the insulating substrate of the printed circuit or incorporated in internal layers of a multilayer circuit
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/11—Printed elements for providing electric connections to or between printed circuits
- H05K1/111—Pads for surface mounting, e.g. lay-out
- H05K1/112—Pads for surface mounting, e.g. lay-out directly combined with via connections
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/09—Shape and layout
- H05K2201/09209—Shape and layout details of conductors
- H05K2201/095—Conductive through-holes or vias
- H05K2201/09509—Blind vias, i.e. vias having one side closed
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
- H05K2201/10—Details of components or other objects attached to or integrated in a printed circuit board
- H05K2201/10613—Details of electrical connections of non-printed components, e.g. special leads
- H05K2201/10621—Components characterised by their electrical contacts
- H05K2201/10636—Leadless chip, e.g. chip capacitor or resistor
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- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/46—Manufacturing multilayer circuits
- H05K3/4602—Manufacturing multilayer circuits characterized by a special circuit board as base or central core whereon additional circuit layers are built or additional circuit boards are laminated
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
- Y02P70/50—Manufacturing or production processes characterised by the final manufactured product
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49126—Assembling bases
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49128—Assembling formed circuit to base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/4913—Assembling to base an electrical component, e.g., capacitor, etc.
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10T—TECHNICAL SUBJECTS COVERED BY FORMER US CLASSIFICATION
- Y10T29/00—Metal working
- Y10T29/49—Method of mechanical manufacture
- Y10T29/49002—Electrical device making
- Y10T29/49117—Conductor or circuit manufacturing
- Y10T29/49124—On flat or curved insulated base, e.g., printed circuit, etc.
- Y10T29/49155—Manufacturing circuit on or in base
- Y10T29/49165—Manufacturing circuit on or in base by forming conductive walled aperture in base
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- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
Abstract
Description
本発明は回路基板一般に関し、より詳細には、部品を埋め込まれた回路基板に関する。
ファインピッチボールグリッドアレイ(BGA)、チップスケールパッケージング(CSP)及び他の開発途上の技術のフォームファクタの使用が徐々に広がりを見せていることは、新たな製造技法を用いて、プリント回路基板(PCB)及びその上に部品を配置するためのアーキテクチャを作り出さなければならないことを意味している。さらに、様々なコスト削減のための努力が、開発途上にある、さらに小型で、さらに高密度で、さらに軽量で、さらに高速のシステムに関連する問題の度合いをさらに強めている。
本発明による実施形態によれば、個別の抵抗、インダクタ及びキャパシタ部品のような部品又は他の適当な部品をPCBに集積できるようになる。一態様では、複数の実施形態が、既存の面実装チップ部品を、Z軸に沿って組み付けるという新規の方法で用いることができる。個別部品を概ね垂直な向きで基板内に埋め込むことにより、この技術によれば、基板を貫通するバイパスデバイスを真の意味でZ軸に沿って組み付けることができるようになる。本発明は確かに、そのような構成だけに限定されることは意図していないが、この手法は非常にきれいな自己シールド設計を容易にする。Z軸に向けること、及び列挙された部品は単なる例示的な構造として記載されており、本発明の範囲を限定することは意図していない。
Claims (10)
- 基板アセンブリ内に埋込部品を形成する方法であって、
第1のキャリア上に第1の導電層を被覆するステップと、
前記第1の導電層上に第1の接着層を被覆するステップと、
前記第1の接着層上に前処理された基板を配置するステップであって、該前処理された基板は少なくとも1つのバイアを含む、前処理された基板を配置するステップと、
前記バイア内に前記埋込部品を配置するステップであって、該埋込部品は少なくとも2つの導電性端子を含む、前記埋込部品を配置するステップと、
前記前処理された基板の少なくとも一部の上と、前記埋込部品の少なくとも一部の上方とに第2の接着層を被覆するステップと、
前記第2の接着層上に第2の導電層を被覆するステップと、
前記第2の導電層上に第2のキャリアを配置するステップと、
前記第1のキャリア及び前記第2のキャリアに互いに向けて力を加えるステップであって、それによって、前記第1の導電層と前記第2の導電層との間に前記埋込部品を有する前記基板アセンブリを形成する、力を加えるステップとを含む、基板アセンブリ内に埋込部品を形成する方法。 - 前記第1のキャリア及び前記第2のキャリアのうちの少なくとも一方を除去するステップと、
前記第1の導電層及び前記第1の接着層から形成される第1の対及び前記第2の導電層及び前記第2の接着層から形成される第2の対のうちの少なくとも一方の層の対を貫通する開口部を形成するステップであって、それによって、前記埋込部品の少なくとも導電性表面を露出させる、開口部を形成するステップと、
前記埋込部品の前記導電性表面と、前記開口部を有する前記第1の導電層及び前記第2の導電層のうちの少なくとも一方との間に配線を形成するステップとをさらに含む、請求項1に記載の基板アセンブリ内に埋込部品を形成する方法。 - 前記第1の導電層及び前記第2の導電層のうちの少なくとも一方の上に導電性パターンを形成するステップをさらに含む、請求項2に記載の基板アセンブリ内に埋込部品を形成する方法。
- 前記埋込部品を配置するステップは、該埋込部品を前記バイア内に垂直な向きに配置するステップを含む、請求項1に記載の基板アセンブリ内に埋込部品を形成する方法。
- 前記埋込部品を配置するステップは、ピックアンドプレース装着機を用いて、前記埋込部品を前記バイア内に落とすステップを含み、前記方法は、前記埋込部品が存在するかに関して前記バイアを検査するステップをさらに含む、請求項1に記載の基板アセンブリ内に埋込部品を形成する方法。
- 基板コアのバイア内に少なくとも1つの埋込部品を有する基板アセンブリであって、
第1の導電層上にある第1の接着層であって、該第1の導電層を前記基板コアの下側表面に結合する、第1の接着層と、
前記バイア内にある埋込部品であって、少なくとも2つの導電性端子を含む、埋込部品と、
前記基板コアの上側表面の少なくとも一部の上と、前記埋込部品の少なくとも一部の上方とにある第2の接着層であって、前記第1の接着層及び該第2の接着層のうちの少なくとも一方は前記バイアを少なくとも部分的に埋める、第2の接着層と、
前記第2の接着層上にある第2の導電層とを備える、基板コアのバイア内に少なくとも1つの埋込部品を有する基板アセンブリ。 - 前記基板アセンブリは、前記埋込部品の導電性表面と、前記第1の導電層及び前記第2の導電層のうちの少なくとも一方との間に配線をさらに備える、請求項6に記載の基板コアのバイア内に少なくとも1つの埋込部品を有する基板アセンブリ。
- 前記配線は、前記埋込部品の少なくとも1つの導電性表面を少なくとも一時的に露出させる開口部を通して形成され、該開口部は、前記第1の導電層及び前記第1の接着層から形成される第1の対及び前記第2の導電層及び前記第2の接着層から形成される第2の対のうちの少なくとも一方の層の対を貫通する、請求項7に記載の基板コアのバイア内に少なくとも1つの埋込部品を有する基板アセンブリ。
- 前記基板アセンブリは、前記埋込部品の第1の導電性端子と前記第1の導電層との間に第1の配線と、前記埋込部品の第2の導電性端子と前記第2の導電層との間に第2の配線とをさらに備える、請求項6に記載の基板コアのバイア内に少なくとも1つの埋込部品を有する基板アセンブリ。
- 前記第1の配線は前記第1の導電層及び前記第1の接着層内の開口部を通して形成され、前記第2の配線は前記第2の導電層及び前記第2の接着層内の開口部を通して形成される、請求項9に記載の基板コアのバイア内に少なくとも1つの埋込部品を有する基板アセンブリ。
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US10/626,058 US6928726B2 (en) | 2003-07-24 | 2003-07-24 | Circuit board with embedded components and method of manufacture |
PCT/US2004/023292 WO2005011343A2 (en) | 2003-07-24 | 2004-07-20 | Circuit board with embedded components and method of manufacture |
Publications (1)
Publication Number | Publication Date |
---|---|
JP2006528839A true JP2006528839A (ja) | 2006-12-21 |
Family
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Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2006521183A Pending JP2006528839A (ja) | 2003-07-24 | 2004-07-20 | 部品を埋め込まれた回路基板及び製造方法 |
Country Status (5)
Country | Link |
---|---|
US (1) | US6928726B2 (ja) |
JP (1) | JP2006528839A (ja) |
CN (1) | CN100490611C (ja) |
MX (1) | MXPA06000842A (ja) |
WO (1) | WO2005011343A2 (ja) |
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Also Published As
Publication number | Publication date |
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WO2005011343A2 (en) | 2005-02-03 |
CN100490611C (zh) | 2009-05-20 |
US6928726B2 (en) | 2005-08-16 |
CN1823555A (zh) | 2006-08-23 |
MXPA06000842A (es) | 2006-04-19 |
US20050016763A1 (en) | 2005-01-27 |
WO2005011343A3 (en) | 2005-06-02 |
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