JP2006515467A5 - - Google Patents

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Publication number
JP2006515467A5
JP2006515467A5 JP2004571478A JP2004571478A JP2006515467A5 JP 2006515467 A5 JP2006515467 A5 JP 2006515467A5 JP 2004571478 A JP2004571478 A JP 2004571478A JP 2004571478 A JP2004571478 A JP 2004571478A JP 2006515467 A5 JP2006515467 A5 JP 2006515467A5
Authority
JP
Japan
Prior art keywords
surface roughness
substrate
metal layer
region
patterned
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Ceased
Application number
JP2004571478A
Other languages
English (en)
Japanese (ja)
Other versions
JP2006515467A (ja
Filing date
Publication date
Priority claimed from DE10319135A external-priority patent/DE10319135B4/de
Application filed filed Critical
Priority claimed from PCT/US2003/041181 external-priority patent/WO2004097932A2/en
Publication of JP2006515467A publication Critical patent/JP2006515467A/ja
Publication of JP2006515467A5 publication Critical patent/JP2006515467A5/ja
Ceased legal-status Critical Current

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JP2004571478A 2003-04-28 2003-12-22 後続の化学機械研磨（ＣＭＰ：ＣｈｅｍｉｃａｌＭｅｃｈａｎｉｃａｌＰｏｌｉｓｈｉｎｇ）プロセスのプロセス均一性が向上するようにパターン誘電層上に銅を電気メッキするための方法 Ceased JP2006515467A (ja)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10319135A DE10319135B4 (de) 2003-04-28 2003-04-28 Verfahren zum Elektroplattieren von Kupfer über einer strukturierten dielektrischen Schicht, um die Prozess-Gleichförmigkeit eines nachfolgenden CMP-Prozesses zu verbessern
US10/666,195 US6958247B2 (en) 2003-04-28 2003-09-19 Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent CMP process
PCT/US2003/041181 WO2004097932A2 (en) 2003-04-28 2003-12-22 Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent cmp process

Publications (2)

Publication Number Publication Date
JP2006515467A JP2006515467A (ja) 2006-05-25
JP2006515467A5 true JP2006515467A5 (cg-RX-API-DMAC7.html) 2007-02-15

Family

ID=33419999

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2004571478A Ceased JP2006515467A (ja) 2003-04-28 2003-12-22 後続の化学機械研磨（ＣＭＰ：ＣｈｅｍｉｃａｌＭｅｃｈａｎｉｃａｌＰｏｌｉｓｈｉｎｇ）プロセスのプロセス均一性が向上するようにパターン誘電層上に銅を電気メッキするための方法

Country Status (5)

Country Link
JP (1) JP2006515467A (cg-RX-API-DMAC7.html)
KR (1) KR101136139B1 (cg-RX-API-DMAC7.html)
AU (1) AU2003302261A1 (cg-RX-API-DMAC7.html)
GB (1) GB2418067B (cg-RX-API-DMAC7.html)
WO (1) WO2004097932A2 (cg-RX-API-DMAC7.html)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100761360B1 (ko) * 2006-03-29 2007-09-27 주식회사 하이닉스반도체 플래쉬 메모리 소자의 메탈 배선 제조 방법
JP5981455B2 (ja) * 2011-01-26 2016-08-31 エンソン インコーポレイテッド マイクロ電子工業におけるビアホール充填方法
US12146235B2 (en) 2022-03-03 2024-11-19 Applied Materials, Inc. Plating and deplating currents for material co-planarity in semiconductor plating processes
US12571119B2 (en) * 2022-03-22 2026-03-10 Applied Materials Inc. Methods and apparatus for altering lithographic patterns to adjust plating uniformity

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2891161B2 (ja) 1996-02-15 1999-05-17 日本電気株式会社 配線形成方法
KR20000043909A (ko) * 1998-12-29 2000-07-15 김영환 반도체 소자의 금속배선 형성 방법
KR20000056852A (ko) * 1999-02-26 2000-09-15 로버트 에이치. 씨. 챠오 집적회로 내의 금속 상호연결 구조의 제조 방법
US6179691B1 (en) * 1999-08-06 2001-01-30 Taiwan Semiconductor Manufacturing Company Method for endpoint detection for copper CMP
US6350364B1 (en) * 2000-02-18 2002-02-26 Taiwan Semiconductor Manufacturing Company Method for improvement of planarity of electroplated copper
JP3725054B2 (ja) * 2000-09-20 2005-12-07 株式会社荏原製作所 基板の電解めっき方法および電解めっき装置
US6746589B2 (en) * 2000-09-20 2004-06-08 Ebara Corporation Plating method and plating apparatus
JP3797860B2 (ja) * 2000-09-27 2006-07-19 株式会社荏原製作所 めっき装置及びめっき方法
US6863795B2 (en) * 2001-03-23 2005-03-08 Interuniversitair Microelektronica Centrum (Imec) Multi-step method for metal deposition
JP2003068689A (ja) * 2001-08-22 2003-03-07 Tokyo Seimitsu Co Ltd フィードバック式研磨装置及び研磨方法
JP3807295B2 (ja) * 2001-11-30 2006-08-09 ソニー株式会社 研磨方法
JP2003277985A (ja) * 2002-03-20 2003-10-02 Fujitsu Ltd メッキ成膜方法及びメッキ成膜装置

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