GB2418067B - Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent CMP process - Google Patents

Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent CMP process

Info

Publication number
GB2418067B
GB2418067B GB0521254A GB0521254A GB2418067B GB 2418067 B GB2418067 B GB 2418067B GB 0521254 A GB0521254 A GB 0521254A GB 0521254 A GB0521254 A GB 0521254A GB 2418067 B GB2418067 B GB 2418067B
Authority
GB
United Kingdom
Prior art keywords
dielectric layer
patterned dielectric
electroplating copper
copper over
subsequent cmp
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
GB0521254A
Other languages
English (en)
Other versions
GB0521254D0 (en
GB2418067A (en
Inventor
Gerd Franz Marxsen
Axel Preusse
Markus Nopper
Frank Mauersberger
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Advanced Micro Devices Inc
Original Assignee
Advanced Micro Devices Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from DE10319135A external-priority patent/DE10319135B4/de
Application filed by Advanced Micro Devices Inc filed Critical Advanced Micro Devices Inc
Publication of GB0521254D0 publication Critical patent/GB0521254D0/en
Publication of GB2418067A publication Critical patent/GB2418067A/en
Application granted granted Critical
Publication of GB2418067B publication Critical patent/GB2418067B/en
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H01L21/2885—
    • H01L21/7684—
    • H01L21/76877—
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
    • H10P14/47—Electrolytic deposition, i.e. electroplating; Electroless plating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/062—Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation
GB0521254A 2003-04-28 2003-12-22 Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent CMP process Expired - Fee Related GB2418067B (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
DE10319135A DE10319135B4 (de) 2003-04-28 2003-04-28 Verfahren zum Elektroplattieren von Kupfer über einer strukturierten dielektrischen Schicht, um die Prozess-Gleichförmigkeit eines nachfolgenden CMP-Prozesses zu verbessern
US10/666,195 US6958247B2 (en) 2003-04-28 2003-09-19 Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent CMP process
PCT/US2003/041181 WO2004097932A2 (en) 2003-04-28 2003-12-22 Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent cmp process

Publications (3)

Publication Number Publication Date
GB0521254D0 GB0521254D0 (en) 2005-11-30
GB2418067A GB2418067A (en) 2006-03-15
GB2418067B true GB2418067B (en) 2007-02-14

Family

ID=33419999

Family Applications (1)

Application Number Title Priority Date Filing Date
GB0521254A Expired - Fee Related GB2418067B (en) 2003-04-28 2003-12-22 Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent CMP process

Country Status (5)

Country Link
JP (1) JP2006515467A (cg-RX-API-DMAC7.html)
KR (1) KR101136139B1 (cg-RX-API-DMAC7.html)
AU (1) AU2003302261A1 (cg-RX-API-DMAC7.html)
GB (1) GB2418067B (cg-RX-API-DMAC7.html)
WO (1) WO2004097932A2 (cg-RX-API-DMAC7.html)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100761360B1 (ko) * 2006-03-29 2007-09-27 주식회사 하이닉스반도체 플래쉬 메모리 소자의 메탈 배선 제조 방법
JP5981455B2 (ja) * 2011-01-26 2016-08-31 エンソン インコーポレイテッド マイクロ電子工業におけるビアホール充填方法
US12146235B2 (en) 2022-03-03 2024-11-19 Applied Materials, Inc. Plating and deplating currents for material co-planarity in semiconductor plating processes
US12571119B2 (en) * 2022-03-22 2026-03-10 Applied Materials Inc. Methods and apparatus for altering lithographic patterns to adjust plating uniformity

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6179691B1 (en) * 1999-08-06 2001-01-30 Taiwan Semiconductor Manufacturing Company Method for endpoint detection for copper CMP
EP1191128A2 (en) * 2000-09-20 2002-03-27 Ebara Corporation Plating method and plating apparatus
US20020175080A1 (en) * 2001-03-23 2002-11-28 Ivo Teerlinck Multi-step method for metal deposition

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2891161B2 (ja) 1996-02-15 1999-05-17 日本電気株式会社 配線形成方法
KR20000043909A (ko) * 1998-12-29 2000-07-15 김영환 반도체 소자의 금속배선 형성 방법
KR20000056852A (ko) * 1999-02-26 2000-09-15 로버트 에이치. 씨. 챠오 집적회로 내의 금속 상호연결 구조의 제조 방법
US6350364B1 (en) * 2000-02-18 2002-02-26 Taiwan Semiconductor Manufacturing Company Method for improvement of planarity of electroplated copper
JP3725054B2 (ja) * 2000-09-20 2005-12-07 株式会社荏原製作所 基板の電解めっき方法および電解めっき装置
JP3797860B2 (ja) * 2000-09-27 2006-07-19 株式会社荏原製作所 めっき装置及びめっき方法
JP2003068689A (ja) * 2001-08-22 2003-03-07 Tokyo Seimitsu Co Ltd フィードバック式研磨装置及び研磨方法
JP3807295B2 (ja) * 2001-11-30 2006-08-09 ソニー株式会社 研磨方法
JP2003277985A (ja) * 2002-03-20 2003-10-02 Fujitsu Ltd メッキ成膜方法及びメッキ成膜装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6179691B1 (en) * 1999-08-06 2001-01-30 Taiwan Semiconductor Manufacturing Company Method for endpoint detection for copper CMP
EP1191128A2 (en) * 2000-09-20 2002-03-27 Ebara Corporation Plating method and plating apparatus
US20020175080A1 (en) * 2001-03-23 2002-11-28 Ivo Teerlinck Multi-step method for metal deposition

Also Published As

Publication number Publication date
WO2004097932A2 (en) 2004-11-11
WO2004097932A3 (en) 2004-12-16
KR20060008946A (ko) 2006-01-27
KR101136139B1 (ko) 2012-04-20
JP2006515467A (ja) 2006-05-25
AU2003302261A1 (en) 2004-11-23
GB0521254D0 (en) 2005-11-30
GB2418067A (en) 2006-03-15

Similar Documents

Publication Publication Date Title
GB0325748D0 (en) A method of forming a patterned layer on a substrate
EP1550689A4 (en) METHOD FOR PRODUCING CONDUCTIVE POLYMER
GB2381661B (en) Method of forming wiring using a dual damascene process
SG118210A1 (en) Method for fabricating copper interconnects
EP1897971A4 (en) METHOD FOR FORMING ELECTRICALLY CONDUCTIVE SWITCHING
WO2008084524A1 (ja) 半導体装置の製造方法、および半導体装置の製造装置
GB0301933D0 (en) Method of forming a conductive metal region on a substrate
AU2003247709A8 (en) Process for coating to obtain special surface effects
GB2419605B (en) Method of manufacturing composite copper material
SG109542A1 (en) Method for ultra low-k dielectric deposition
TWI366835B (en) Method for producing conductive particles
SG111180A1 (en) Barrier-slurry-free copper cmp process
SG114716A1 (en) Method and device for electrolytically increasing the thickness of an electrically conductive pattern on a dielectric substrate, as well as a dielectric substrate
GB2418067B (en) Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent CMP process
PL378077A1 (pl) Sposób wytwarzania para-ksylenu
AU2003287156A1 (en) Two-step atomic layer deposition of copper layers
SG111148A1 (en) Method of forming a semiconductor device with a substantially uniform density low-k dielectric layer
EP1589605A4 (en) DIELECTRIC CHANNEL AND MANUFACTURING METHOD THEREFOR
SG115529A1 (en) Production process for unsaturated aldehyde
SG118296A1 (en) Method to deposit a copper layer
SG131123A1 (en) A method of making direct contact on gate by using dielectric stop layer
SG101455A1 (en) Method of forming a high k metallic dielectric layer
TWI317766B (en) Method of electroless plating for copper leads
SG120148A1 (en) Process for forming metal damascene structure to prevent dielectric layer peeling
GB0319128D0 (en) Method to avoid copper contamination of a via or dual damascene structure

Legal Events

Date Code Title Description
732E Amendments to the register in respect of changes of name or changes affecting rights (sect. 32/1977)

Free format text: REGISTERED BETWEEN 20091210 AND 20091216

PCNP Patent ceased through non-payment of renewal fee

Effective date: 20111222