KR101136139B1 - 후속 ｃｍｐ 공정의 공정 균일성 개선을 위한 패턴화된유전층에 대한 구리 전기도금 방법 - Google Patents

후속 ｃｍｐ 공정의 공정 균일성 개선을 위한 패턴화된유전층에 대한 구리 전기도금 방법 Download PDF

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Publication number
KR101136139B1
KR101136139B1 KR1020057020605A KR20057020605A KR101136139B1 KR 101136139 B1 KR101136139 B1 KR 101136139B1 KR 1020057020605 A KR1020057020605 A KR 1020057020605A KR 20057020605 A KR20057020605 A KR 20057020605A KR 101136139 B1 KR101136139 B1 KR 101136139B1
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South Korea
Prior art keywords
metal layer
region
substrate
surface roughness
metal
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Expired - Fee Related
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KR1020057020605A
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English (en)
Korean (ko)
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KR20060008946A (ko
Inventor
게르드 프란츠 마크센
악셀 프루세
마르쿠스 노페르
프랭크 마우에르스베르게르
Original Assignee
글로벌파운드리즈 인크.
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Priority claimed from DE10319135A external-priority patent/DE10319135B4/de
Application filed by 글로벌파운드리즈 인크. filed Critical 글로벌파운드리즈 인크.
Publication of KR20060008946A publication Critical patent/KR20060008946A/ko
Application granted granted Critical
Publication of KR101136139B1 publication Critical patent/KR101136139B1/ko
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/40—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials
    • H10P14/46—Formation of materials, e.g. in the shape of layers or pillars of conductive or resistive materials using a liquid
    • H10P14/47—Electrolytic deposition, i.e. electroplating; Electroless plating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/056—Manufacture or treatment of conductive parts of the interconnections by filling conductive material into holes, grooves or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/031—Manufacture or treatment of conductive parts of the interconnections
    • H10W20/062—Manufacture or treatment of conductive parts of the interconnections by smoothing of conductive parts, e.g. by planarisation

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  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electroplating Methods And Accessories (AREA)
  • Electrodes Of Semiconductors (AREA)
  • Manufacturing Of Printed Wiring (AREA)
KR1020057020605A 2003-04-28 2003-12-22 후속 ｃｍｐ 공정의 공정 균일성 개선을 위한 패턴화된유전층에 대한 구리 전기도금 방법 Expired - Fee Related KR101136139B1 (ko)

Applications Claiming Priority (5)

Application Number Priority Date Filing Date Title
DE10319135A DE10319135B4 (de) 2003-04-28 2003-04-28 Verfahren zum Elektroplattieren von Kupfer über einer strukturierten dielektrischen Schicht, um die Prozess-Gleichförmigkeit eines nachfolgenden CMP-Prozesses zu verbessern
DE10319135.6 2003-04-28
US10/666,195 US6958247B2 (en) 2003-04-28 2003-09-19 Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent CMP process
US10/666,195 2003-09-19
PCT/US2003/041181 WO2004097932A2 (en) 2003-04-28 2003-12-22 Method of electroplating copper over a patterned dielectric layer to enhance process uniformity of a subsequent cmp process

Publications (2)

Publication Number Publication Date
KR20060008946A KR20060008946A (ko) 2006-01-27
KR101136139B1 true KR101136139B1 (ko) 2012-04-20

Family

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Family Applications (1)

Application Number Title Priority Date Filing Date
KR1020057020605A Expired - Fee Related KR101136139B1 (ko) 2003-04-28 2003-12-22 후속 ｃｍｐ 공정의 공정 균일성 개선을 위한 패턴화된유전층에 대한 구리 전기도금 방법

Country Status (5)

Country Link
JP (1) JP2006515467A (cg-RX-API-DMAC7.html)
KR (1) KR101136139B1 (cg-RX-API-DMAC7.html)
AU (1) AU2003302261A1 (cg-RX-API-DMAC7.html)
GB (1) GB2418067B (cg-RX-API-DMAC7.html)
WO (1) WO2004097932A2 (cg-RX-API-DMAC7.html)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100761360B1 (ko) * 2006-03-29 2007-09-27 주식회사 하이닉스반도체 플래쉬 메모리 소자의 메탈 배선 제조 방법
JP5981455B2 (ja) * 2011-01-26 2016-08-31 エンソン インコーポレイテッド マイクロ電子工業におけるビアホール充填方法
US12146235B2 (en) 2022-03-03 2024-11-19 Applied Materials, Inc. Plating and deplating currents for material co-planarity in semiconductor plating processes
US12571119B2 (en) * 2022-03-22 2026-03-10 Applied Materials Inc. Methods and apparatus for altering lithographic patterns to adjust plating uniformity

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100256523B1 (ko) 1996-02-15 2000-05-15 가네꼬 히사시 배선층의 형성방법
KR20000043909A (ko) * 1998-12-29 2000-07-15 김영환 반도체 소자의 금속배선 형성 방법
KR20000056852A (ko) * 1999-02-26 2000-09-15 로버트 에이치. 씨. 챠오 집적회로 내의 금속 상호연결 구조의 제조 방법

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6179691B1 (en) * 1999-08-06 2001-01-30 Taiwan Semiconductor Manufacturing Company Method for endpoint detection for copper CMP
US6350364B1 (en) * 2000-02-18 2002-02-26 Taiwan Semiconductor Manufacturing Company Method for improvement of planarity of electroplated copper
JP3725054B2 (ja) * 2000-09-20 2005-12-07 株式会社荏原製作所 基板の電解めっき方法および電解めっき装置
US6746589B2 (en) * 2000-09-20 2004-06-08 Ebara Corporation Plating method and plating apparatus
JP3797860B2 (ja) * 2000-09-27 2006-07-19 株式会社荏原製作所 めっき装置及びめっき方法
US6863795B2 (en) * 2001-03-23 2005-03-08 Interuniversitair Microelektronica Centrum (Imec) Multi-step method for metal deposition
JP2003068689A (ja) * 2001-08-22 2003-03-07 Tokyo Seimitsu Co Ltd フィードバック式研磨装置及び研磨方法
JP3807295B2 (ja) * 2001-11-30 2006-08-09 ソニー株式会社 研磨方法
JP2003277985A (ja) * 2002-03-20 2003-10-02 Fujitsu Ltd メッキ成膜方法及びメッキ成膜装置

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100256523B1 (ko) 1996-02-15 2000-05-15 가네꼬 히사시 배선층의 형성방법
KR20000043909A (ko) * 1998-12-29 2000-07-15 김영환 반도체 소자의 금속배선 형성 방법
KR20000056852A (ko) * 1999-02-26 2000-09-15 로버트 에이치. 씨. 챠오 집적회로 내의 금속 상호연결 구조의 제조 방법

Also Published As

Publication number Publication date
GB2418067B (en) 2007-02-14
WO2004097932A2 (en) 2004-11-11
WO2004097932A3 (en) 2004-12-16
KR20060008946A (ko) 2006-01-27
JP2006515467A (ja) 2006-05-25
AU2003302261A1 (en) 2004-11-23
GB0521254D0 (en) 2005-11-30
GB2418067A (en) 2006-03-15

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