JP2004179232A - 半導体装置及びその製造方法並びに電子機器 - Google Patents

半導体装置及びその製造方法並びに電子機器 Download PDF

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Publication number
JP2004179232A
JP2004179232A JP2002340879A JP2002340879A JP2004179232A JP 2004179232 A JP2004179232 A JP 2004179232A JP 2002340879 A JP2002340879 A JP 2002340879A JP 2002340879 A JP2002340879 A JP 2002340879A JP 2004179232 A JP2004179232 A JP 2004179232A
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JP
Japan
Prior art keywords
circuit board
wiring pattern
semiconductor element
electrode
electrically connected
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Withdrawn
Application number
JP2002340879A
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English (en)
Japanese (ja)
Other versions
JP2004179232A5 (enExample
Inventor
Tetsutoshi Aoyanagi
哲理 青柳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Original Assignee
Seiko Epson Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp filed Critical Seiko Epson Corp
Priority to JP2002340879A priority Critical patent/JP2004179232A/ja
Priority to US10/719,888 priority patent/US20040135243A1/en
Publication of JP2004179232A publication Critical patent/JP2004179232A/ja
Publication of JP2004179232A5 publication Critical patent/JP2004179232A5/ja
Withdrawn legal-status Critical Current

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Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/18Printed circuits structurally associated with non-printed electric components
    • H05K1/181Printed circuits structurally associated with non-printed electric components associated with surface mounted components
    • H10W70/611
    • H10W90/00
    • H10W90/401
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/14Structural association of two or more printed circuits
    • H05K1/141One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10439Position of a single component
    • H05K2201/10477Inverted
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10431Details of mounted components
    • H05K2201/10507Involving several components
    • H05K2201/10515Stacked components
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/10Details of components or other objects attached to or integrated in a printed circuit board
    • H05K2201/10613Details of electrical connections of non-printed components, e.g. special leads
    • H05K2201/10621Components characterised by their electrical contacts
    • H05K2201/10734Ball grid array [BGA]; Bump grid array
    • H10W70/60
    • H10W72/075
    • H10W72/551
    • H10W72/879
    • H10W72/951
    • H10W74/00
    • H10W74/15
    • H10W90/20
    • H10W90/22
    • H10W90/721
    • H10W90/722
    • H10W90/724
    • H10W90/754
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02PCLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50Manufacturing or production processes characterised by the final manufactured product

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Combinations Of Printed Boards (AREA)
JP2002340879A 2002-11-25 2002-11-25 半導体装置及びその製造方法並びに電子機器 Withdrawn JP2004179232A (ja)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP2002340879A JP2004179232A (ja) 2002-11-25 2002-11-25 半導体装置及びその製造方法並びに電子機器
US10/719,888 US20040135243A1 (en) 2002-11-25 2003-11-21 Semiconductor device, its manufacturing method and electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2002340879A JP2004179232A (ja) 2002-11-25 2002-11-25 半導体装置及びその製造方法並びに電子機器

Publications (2)

Publication Number Publication Date
JP2004179232A true JP2004179232A (ja) 2004-06-24
JP2004179232A5 JP2004179232A5 (enExample) 2005-06-23

Family

ID=32703392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2002340879A Withdrawn JP2004179232A (ja) 2002-11-25 2002-11-25 半導体装置及びその製造方法並びに電子機器

Country Status (2)

Country Link
US (1) US20040135243A1 (enExample)
JP (1) JP2004179232A (enExample)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008211126A (ja) * 2007-02-28 2008-09-11 Matsushita Electric Ind Co Ltd 半導体モジュールおよびカード型情報装置
JP2012502476A (ja) * 2008-09-08 2012-01-26 インテル・コーポレーション メインボードに直接取着されたダイをパッケージが被覆しているメインボード構造
JPWO2014097725A1 (ja) * 2012-12-18 2017-01-12 株式会社村田製作所 積層型電子装置およびその製造方法

Families Citing this family (26)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3891123B2 (ja) * 2003-02-06 2007-03-14 セイコーエプソン株式会社 半導体装置、電子デバイス、電子機器、及び半導体装置の製造方法
JP4110992B2 (ja) * 2003-02-07 2008-07-02 セイコーエプソン株式会社 半導体装置、電子デバイス、電子機器、半導体装置の製造方法および電子デバイスの製造方法
JP2004259886A (ja) * 2003-02-25 2004-09-16 Seiko Epson Corp 半導体装置、電子デバイス、電子機器、半導体装置の製造方法および電子デバイスの製造方法
JP2004281818A (ja) * 2003-03-17 2004-10-07 Seiko Epson Corp 半導体装置、電子デバイス、電子機器、キャリア基板の製造方法、半導体装置の製造方法および電子デバイスの製造方法
JP4069771B2 (ja) * 2003-03-17 2008-04-02 セイコーエプソン株式会社 半導体装置、電子機器および半導体装置の製造方法
JP3680839B2 (ja) * 2003-03-18 2005-08-10 セイコーエプソン株式会社 半導体装置および半導体装置の製造方法
JP2004281919A (ja) * 2003-03-18 2004-10-07 Seiko Epson Corp 半導体装置、電子デバイス、電子機器、半導体装置の製造方法および電子デバイスの製造方法
JP2004281920A (ja) * 2003-03-18 2004-10-07 Seiko Epson Corp 半導体装置、電子デバイス、電子機器、半導体装置の製造方法および電子デバイスの製造方法
JP4096774B2 (ja) * 2003-03-24 2008-06-04 セイコーエプソン株式会社 半導体装置、電子デバイス、電子機器、半導体装置の製造方法及び電子デバイスの製造方法
JP2004349495A (ja) * 2003-03-25 2004-12-09 Seiko Epson Corp 半導体装置、電子デバイス、電子機器および半導体装置の製造方法
JPWO2006080351A1 (ja) * 2005-01-25 2008-08-07 松下電器産業株式会社 半導体装置およびその製造方法
JP4827556B2 (ja) * 2005-03-18 2011-11-30 キヤノン株式会社 積層型半導体パッケージ
WO2009045371A2 (en) * 2007-09-28 2009-04-09 Tessera, Inc. Flip chip interconnection with double post
US20100044860A1 (en) * 2008-08-21 2010-02-25 Tessera Interconnect Materials, Inc. Microelectronic substrate or element having conductive pads and metal posts joined thereto using bond layer
US8106499B2 (en) * 2009-06-20 2012-01-31 Stats Chippac Ltd. Integrated circuit packaging system with a dual substrate package and method of manufacture thereof
US8404518B2 (en) * 2009-12-13 2013-03-26 Stats Chippac Ltd. Integrated circuit packaging system with package stacking and method of manufacture thereof
US8580607B2 (en) 2010-07-27 2013-11-12 Tessera, Inc. Microelectronic packages with nanoparticle joining
US8853558B2 (en) 2010-12-10 2014-10-07 Tessera, Inc. Interconnect structure
KR20120126366A (ko) * 2011-05-11 2012-11-21 에스케이하이닉스 주식회사 반도체 장치
DE102013217301A1 (de) * 2013-08-30 2015-03-05 Robert Bosch Gmbh Bauteil
EP2884242B1 (en) * 2013-12-12 2021-12-08 ams International AG Sensor Package And Manufacturing Method
US10886250B2 (en) 2015-07-10 2021-01-05 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
US9633971B2 (en) 2015-07-10 2017-04-25 Invensas Corporation Structures and methods for low temperature bonding using nanoparticles
TWI822659B (zh) 2016-10-27 2023-11-21 美商艾德亞半導體科技有限責任公司 用於低溫接合的結構和方法
TWI653919B (zh) * 2017-08-10 2019-03-11 晶巧股份有限公司 高散熱等線距堆疊晶片封裝結構和方法
CN116848631A (zh) 2020-12-30 2023-10-03 美商艾德亚半导体接合科技有限公司 具有导电特征的结构及其形成方法

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5994166A (en) * 1997-03-10 1999-11-30 Micron Technology, Inc. Method of constructing stacked packages
JPH10270496A (ja) * 1997-03-27 1998-10-09 Hitachi Ltd 電子装置、情報処理装置、半導体装置並びに半導体チップの実装方法
DE10164800B4 (de) * 2001-11-02 2005-03-31 Infineon Technologies Ag Verfahren zur Herstellung eines elektronischen Bauelements mit mehreren übereinander gestapelten und miteinander kontaktierten Chips
TW567601B (en) * 2002-10-18 2003-12-21 Siliconware Precision Industries Co Ltd Module device of stacked semiconductor package and method for fabricating the same

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008211126A (ja) * 2007-02-28 2008-09-11 Matsushita Electric Ind Co Ltd 半導体モジュールおよびカード型情報装置
JP2012502476A (ja) * 2008-09-08 2012-01-26 インテル・コーポレーション メインボードに直接取着されたダイをパッケージが被覆しているメインボード構造
JP2014030042A (ja) * 2008-09-08 2014-02-13 Intel Corp コンピューティングシステムおよびその方法
US10251273B2 (en) 2008-09-08 2019-04-02 Intel Corporation Mainboard assembly including a package overlying a die directly attached to the mainboard
JPWO2014097725A1 (ja) * 2012-12-18 2017-01-12 株式会社村田製作所 積層型電子装置およびその製造方法

Also Published As

Publication number Publication date
US20040135243A1 (en) 2004-07-15

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