JP2004014828A5 - - Google Patents
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- Publication number
- JP2004014828A5 JP2004014828A5 JP2002166621A JP2002166621A JP2004014828A5 JP 2004014828 A5 JP2004014828 A5 JP 2004014828A5 JP 2002166621 A JP2002166621 A JP 2002166621A JP 2002166621 A JP2002166621 A JP 2002166621A JP 2004014828 A5 JP2004014828 A5 JP 2004014828A5
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- wiring layer
- semiconductor device
- manufacturing
- polishing
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000005498 polishing Methods 0.000 claims 8
- 239000011810 insulating material Substances 0.000 claims 7
- 238000004519 manufacturing process Methods 0.000 claims 7
- 239000004065 semiconductor Substances 0.000 claims 7
- 238000000034 method Methods 0.000 claims 2
- 239000000758 substrate Substances 0.000 claims 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims 1
- 239000004020 conductor Substances 0.000 claims 1
- 238000000151 deposition Methods 0.000 claims 1
- 230000002209 hydrophobic effect Effects 0.000 claims 1
- 238000009413 insulation Methods 0.000 claims 1
- 239000000463 material Substances 0.000 claims 1
- 229910052814 silicon oxide Inorganic materials 0.000 claims 1
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002166621A JP4076131B2 (ja) | 2002-06-07 | 2002-06-07 | 半導体装置の製造方法 |
| US10/326,378 US6686285B2 (en) | 2002-06-07 | 2002-12-23 | Semiconductor device manufacture method preventing dishing and erosion during chemical mechanical polishing |
| TW091137886A TWI224536B (en) | 2002-06-07 | 2002-12-30 | Semiconductor device manufacture method preventing dishing and erosion during chemical mechanical polishing |
| KR1020030000520A KR100814234B1 (ko) | 2002-06-07 | 2003-01-06 | 반도체 장치의 제조 방법 |
| CNB031064248A CN1225019C (zh) | 2002-06-07 | 2003-02-25 | 防止化学机械抛光中的凹陷和侵蚀的半导体器件制造方法 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2002166621A JP4076131B2 (ja) | 2002-06-07 | 2002-06-07 | 半導体装置の製造方法 |
Publications (3)
| Publication Number | Publication Date |
|---|---|
| JP2004014828A JP2004014828A (ja) | 2004-01-15 |
| JP2004014828A5 true JP2004014828A5 (enExample) | 2005-10-06 |
| JP4076131B2 JP4076131B2 (ja) | 2008-04-16 |
Family
ID=29706730
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2002166621A Expired - Fee Related JP4076131B2 (ja) | 2002-06-07 | 2002-06-07 | 半導体装置の製造方法 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US6686285B2 (enExample) |
| JP (1) | JP4076131B2 (enExample) |
| KR (1) | KR100814234B1 (enExample) |
| CN (1) | CN1225019C (enExample) |
| TW (1) | TWI224536B (enExample) |
Families Citing this family (11)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2004253791A (ja) | 2003-01-29 | 2004-09-09 | Nec Electronics Corp | 絶縁膜およびそれを用いた半導体装置 |
| US7217649B2 (en) * | 2003-03-14 | 2007-05-15 | Lam Research Corporation | System and method for stress free conductor removal |
| JP2006165214A (ja) * | 2004-12-07 | 2006-06-22 | Sony Corp | 半導体装置およびその製造方法 |
| KR100711912B1 (ko) * | 2005-12-28 | 2007-04-27 | 동부일렉트로닉스 주식회사 | 반도체 소자의 금속 배선 형성 방법 |
| JP4231055B2 (ja) * | 2006-02-06 | 2009-02-25 | 株式会社東芝 | 半導体装置及びその製造方法 |
| JP2007251135A (ja) * | 2006-02-18 | 2007-09-27 | Seiko Instruments Inc | 半導体装置およびその製造方法 |
| JP2007294514A (ja) * | 2006-04-21 | 2007-11-08 | Renesas Technology Corp | 半導体装置 |
| US8193087B2 (en) | 2006-05-18 | 2012-06-05 | Taiwan Semiconductor Manufacturing Co., Ltd. | Process for improving copper line cap formation |
| JP2010171064A (ja) * | 2009-01-20 | 2010-08-05 | Panasonic Corp | 半導体装置及びその製造方法 |
| JP2012064713A (ja) * | 2010-09-15 | 2012-03-29 | Toshiba Corp | 半導体装置の製造方法 |
| US11862607B2 (en) * | 2021-08-16 | 2024-01-02 | Micron Technology, Inc. | Composite dielectric structures for semiconductor die assemblies and associated systems and methods |
Family Cites Families (20)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| FR2630588A1 (fr) * | 1988-04-22 | 1989-10-27 | Philips Nv | Procede pour realiser une configuration d'interconnexion sur un dispositif semiconducteur notamment un circuit a densite d'integration elevee |
| KR100238220B1 (en) * | 1996-12-17 | 2000-01-15 | Samsung Electronics Co Ltd | Plattening method of semiconductor device |
| US6140226A (en) * | 1998-01-16 | 2000-10-31 | International Business Machines Corporation | Dual damascene processing for semiconductor chip interconnects |
| US6420261B2 (en) * | 1998-08-31 | 2002-07-16 | Fujitsu Limited | Semiconductor device manufacturing method |
| US6150272A (en) * | 1998-11-16 | 2000-11-21 | Taiwan Semiconductor Manufacturing Company | Method for making metal plug contacts and metal lines in an insulating layer by chemical/mechanical polishing that reduces polishing-induced damage |
| KR100292409B1 (ko) * | 1999-05-24 | 2001-06-01 | 윤종용 | 실리콘-메틸 결합을 함유하는 절연층을 포함하는 다층 구조의 절연막 및 그 형성방법 |
| JP2001144086A (ja) * | 1999-08-31 | 2001-05-25 | Sony Corp | 埋め込み配線の形成方法、及び、基体処理装置 |
| US7041599B1 (en) * | 1999-12-21 | 2006-05-09 | Applied Materials Inc. | High through-put Cu CMP with significantly reduced erosion and dishing |
| US6380003B1 (en) * | 1999-12-22 | 2002-04-30 | International Business Machines Corporation | Damascene anti-fuse with slot via |
| US6503827B1 (en) * | 2000-06-28 | 2003-01-07 | International Business Machines Corporation | Method of reducing planarization defects |
| JP3917355B2 (ja) * | 2000-09-21 | 2007-05-23 | 株式会社東芝 | 半導体装置およびその製造方法 |
| US20020064951A1 (en) * | 2000-11-30 | 2002-05-30 | Eissa Mona M. | Treatment of low-k dielectric films to enable patterning of deep submicron features |
| US6432811B1 (en) * | 2000-12-20 | 2002-08-13 | Intel Corporation | Method of forming structural reinforcement of highly porous low k dielectric films by Cu diffusion barrier structures |
| US6583047B2 (en) * | 2000-12-26 | 2003-06-24 | Honeywell International, Inc. | Method for eliminating reaction between photoresist and OSG |
| JP4160277B2 (ja) * | 2001-06-29 | 2008-10-01 | 株式会社東芝 | 半導体装置の製造方法 |
| US6562725B2 (en) * | 2001-07-05 | 2003-05-13 | Taiwan Semiconductor Manufacturing Co., Ltd | Dual damascene structure employing nitrogenated silicon carbide and non-nitrogenated silicon carbide etch stop layers |
| KR100442863B1 (ko) * | 2001-08-01 | 2004-08-02 | 삼성전자주식회사 | 금속-절연체-금속 커패시터 및 다마신 배선 구조를 갖는반도체 소자의 제조 방법 |
| JP4131786B2 (ja) * | 2001-09-03 | 2008-08-13 | 株式会社東芝 | 半導体装置の製造方法およびウエハ構造体 |
| US6440840B1 (en) * | 2002-01-25 | 2002-08-27 | Taiwan Semiconductor Manufactoring Company | Damascene process to eliminate copper defects during chemical-mechanical polishing (CMP) for making electrical interconnections on integrated circuits |
| US6531386B1 (en) * | 2002-02-08 | 2003-03-11 | Chartered Semiconductor Manufacturing Ltd. | Method to fabricate dish-free copper interconnects |
-
2002
- 2002-06-07 JP JP2002166621A patent/JP4076131B2/ja not_active Expired - Fee Related
- 2002-12-23 US US10/326,378 patent/US6686285B2/en not_active Expired - Lifetime
- 2002-12-30 TW TW091137886A patent/TWI224536B/zh not_active IP Right Cessation
-
2003
- 2003-01-06 KR KR1020030000520A patent/KR100814234B1/ko not_active Expired - Fee Related
- 2003-02-25 CN CNB031064248A patent/CN1225019C/zh not_active Expired - Fee Related
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