JP2001077368A - 半導体装置及びその製造方法 - Google Patents
半導体装置及びその製造方法Info
- Publication number
- JP2001077368A JP2001077368A JP25047599A JP25047599A JP2001077368A JP 2001077368 A JP2001077368 A JP 2001077368A JP 25047599 A JP25047599 A JP 25047599A JP 25047599 A JP25047599 A JP 25047599A JP 2001077368 A JP2001077368 A JP 2001077368A
- Authority
- JP
- Japan
- Prior art keywords
- insulating film
- element isolation
- semiconductor layer
- layer
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D30/00—Field-effect transistors [FET]
- H10D30/60—Insulated-gate field-effect transistors [IGFET]
- H10D30/67—Thin-film transistors [TFT]
- H10D30/6729—Thin-film transistors [TFT] characterised by the electrodes
- H10D30/673—Thin-film transistors [TFT] characterised by the electrodes characterised by the shapes, relative sizes or dispositions of the gate electrodes
- H10D30/6733—Multi-gate TFTs
- H10D30/6734—Multi-gate TFTs having gate electrodes arranged on both top and bottom sides of the channel, e.g. dual-gate TFTs
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/01—Manufacture or treatment
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10D—INORGANIC ELECTRIC SEMICONDUCTOR DEVICES
- H10D86/00—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates
- H10D86/201—Integrated devices formed in or on insulating or conducting substrates, e.g. formed in silicon-on-insulator [SOI] substrates or on stainless steel or glass substrates the substrates comprising an insulating layer on a semiconductor body, e.g. SOI
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/76—Making of isolation regions between components
- H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
- H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
- H01L21/76264—SOI together with lateral isolation, e.g. using local oxidation of silicon, or dielectric or polycristalline material refilled trench or air gap isolation regions, e.g. completely isolated semiconductor islands
- H01L21/76281—Lateral isolation by selective oxidation of silicon
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Thin Film Transistor (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
Priority Applications (5)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25047599A JP2001077368A (ja) | 1999-09-03 | 1999-09-03 | 半導体装置及びその製造方法 |
| US09/488,713 US6252280B1 (en) | 1999-09-03 | 2000-01-21 | Semiconductor device and manufacturing method thereof |
| DE10043183A DE10043183A1 (de) | 1999-09-03 | 2000-09-01 | Halbleitervorrichtung und Herstellungsvorrichtung von einer Halbleitervorrichtung |
| KR1020000051844A KR100340395B1 (ko) | 1999-09-03 | 2000-09-02 | 반도체 장치 및 그 제조 방법 |
| US09/838,267 US6337230B2 (en) | 1999-09-03 | 2001-04-20 | Semiconductor device and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP25047599A JP2001077368A (ja) | 1999-09-03 | 1999-09-03 | 半導体装置及びその製造方法 |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JP2001077368A true JP2001077368A (ja) | 2001-03-23 |
| JP2001077368A5 JP2001077368A5 (enExample) | 2006-10-12 |
Family
ID=17208415
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP25047599A Pending JP2001077368A (ja) | 1999-09-03 | 1999-09-03 | 半導体装置及びその製造方法 |
Country Status (4)
| Country | Link |
|---|---|
| US (2) | US6252280B1 (enExample) |
| JP (1) | JP2001077368A (enExample) |
| KR (1) | KR100340395B1 (enExample) |
| DE (1) | DE10043183A1 (enExample) |
Cited By (9)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002299633A (ja) * | 2001-04-03 | 2002-10-11 | Sony Corp | 電界効果型トランジスタ |
| JP2006049784A (ja) * | 2003-08-28 | 2006-02-16 | Renesas Technology Corp | 半導体記憶装置及びその製造方法 |
| JP2006066691A (ja) * | 2004-08-27 | 2006-03-09 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| US7170110B2 (en) | 2001-04-03 | 2007-01-30 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for fabricating the same |
| US7271454B2 (en) | 2003-08-28 | 2007-09-18 | Renesas Technology Corp. | Semiconductor memory device and method of manufacturing the same |
| US7504291B2 (en) | 2002-04-25 | 2009-03-17 | Renesas Technology Corp. | MOS transistor on an SOI substrate with a body contact and a gate insulating film with variable thickness |
| US7531878B2 (en) | 2002-10-17 | 2009-05-12 | Renesas Technology Corp. | Semiconductor MIS transistor formed on SOI semiconductor substrate |
| JP2010045331A (ja) * | 2008-07-22 | 2010-02-25 | Honeywell Internatl Inc | ボディ・タイの領域に効果的に直接コンタクトを設けるプロセスフロー |
| CN106226942A (zh) * | 2010-09-13 | 2016-12-14 | 株式会社半导体能源研究所 | 液晶显示设备及其制造方法 |
Families Citing this family (19)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US6444432B1 (en) * | 1997-06-13 | 2002-09-03 | Alan M. Kleinfeld | Method of detection of cardiac ischemia using fatty acid binding protein |
| JP2000243967A (ja) * | 1999-02-22 | 2000-09-08 | Sony Corp | 半導体装置の製造方法 |
| JP3716406B2 (ja) * | 2000-02-08 | 2005-11-16 | 富士通株式会社 | 絶縁ゲート型半導体装置及びその製造方法 |
| JP4698793B2 (ja) * | 2000-04-03 | 2011-06-08 | ルネサスエレクトロニクス株式会社 | 半導体装置 |
| JP4988086B2 (ja) * | 2000-06-13 | 2012-08-01 | ルネサスエレクトロニクス株式会社 | 半導体装置及びその製造方法並びに抵抗器及び半導体素子 |
| JP2002033484A (ja) * | 2000-07-18 | 2002-01-31 | Mitsubishi Electric Corp | 半導体装置 |
| JP3990858B2 (ja) * | 2000-07-31 | 2007-10-17 | 株式会社東芝 | 半導体装置 |
| JP2002185011A (ja) * | 2000-12-19 | 2002-06-28 | Seiko Epson Corp | 半導体装置 |
| US7196369B2 (en) * | 2002-07-15 | 2007-03-27 | Macronix International Co., Ltd. | Plasma damage protection circuit for a semiconductor device |
| JP4154578B2 (ja) * | 2002-12-06 | 2008-09-24 | 日本電気株式会社 | 半導体装置及びその製造方法 |
| US6905919B2 (en) | 2003-07-29 | 2005-06-14 | Chartered Semiconductor Manufacturing Ltd. | Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension |
| JP2006054430A (ja) * | 2004-07-12 | 2006-02-23 | Renesas Technology Corp | 半導体装置 |
| KR100629264B1 (ko) | 2004-07-23 | 2006-09-29 | 삼성전자주식회사 | 게이트 관통 바디 콘택을 갖는 반도체소자 및 그 제조방법 |
| US7170816B2 (en) * | 2004-12-16 | 2007-01-30 | Macronix International Co., Ltd. | Method and apparatus for passing charge from word lines during manufacture |
| JP5270876B2 (ja) * | 2007-08-22 | 2013-08-21 | セイコーインスツル株式会社 | 半導体装置 |
| US8680617B2 (en) * | 2009-10-06 | 2014-03-25 | International Business Machines Corporation | Split level shallow trench isolation for area efficient body contacts in SOI MOSFETS |
| US9490249B2 (en) | 2014-04-30 | 2016-11-08 | Macronix International Co., Ltd. | Antenna effect discharge circuit and manufacturing method |
| FR3069373A1 (fr) * | 2017-07-19 | 2019-01-25 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Transistors double grilles optimises et procede de fabrication |
| US10546929B2 (en) | 2017-07-19 | 2020-01-28 | Commissariat A L'energie Atomique Et Aux Energies Alternatives | Optimized double-gate transistors and fabricating process |
Family Cites Families (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US5559368A (en) * | 1994-08-30 | 1996-09-24 | The Regents Of The University Of California | Dynamic threshold voltage mosfet having gate to body connection for ultra-low voltage operation |
| JPH0969610A (ja) * | 1995-08-31 | 1997-03-11 | Hitachi Ltd | 集積半導体装置およびその製造方法 |
| US5753955A (en) * | 1996-12-19 | 1998-05-19 | Honeywell Inc. | MOS device having a gate to body connection with a body injection current limiting feature for use on silicon on insulator substrates |
| TW362258B (en) * | 1998-03-20 | 1999-06-21 | United Microelectronics Corp | Silicon trench contact structure on the insulation layer |
| US6080612A (en) * | 1998-05-20 | 2000-06-27 | Sharp Laboratories Of America, Inc. | Method of forming an ultra-thin SOI electrostatic discharge protection device |
| US6159807A (en) * | 1998-09-21 | 2000-12-12 | International Business Machines Corporation | Self-aligned dynamic threshold CMOS device |
-
1999
- 1999-09-03 JP JP25047599A patent/JP2001077368A/ja active Pending
-
2000
- 2000-01-21 US US09/488,713 patent/US6252280B1/en not_active Expired - Fee Related
- 2000-09-01 DE DE10043183A patent/DE10043183A1/de not_active Ceased
- 2000-09-02 KR KR1020000051844A patent/KR100340395B1/ko not_active Expired - Fee Related
-
2001
- 2001-04-20 US US09/838,267 patent/US6337230B2/en not_active Expired - Fee Related
Cited By (17)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002299633A (ja) * | 2001-04-03 | 2002-10-11 | Sony Corp | 電界効果型トランジスタ |
| US7170110B2 (en) | 2001-04-03 | 2007-01-30 | Matsushita Electric Industrial Co., Ltd. | Semiconductor device and method for fabricating the same |
| US7504291B2 (en) | 2002-04-25 | 2009-03-17 | Renesas Technology Corp. | MOS transistor on an SOI substrate with a body contact and a gate insulating film with variable thickness |
| US7531878B2 (en) | 2002-10-17 | 2009-05-12 | Renesas Technology Corp. | Semiconductor MIS transistor formed on SOI semiconductor substrate |
| US7271454B2 (en) | 2003-08-28 | 2007-09-18 | Renesas Technology Corp. | Semiconductor memory device and method of manufacturing the same |
| US7382026B2 (en) | 2003-08-28 | 2008-06-03 | Renesas Technology Corp. | Semiconductor memory device and method of manufacturing the same |
| CN100423267C (zh) * | 2003-08-28 | 2008-10-01 | 株式会社瑞萨科技 | 半导体存储器件及其制造方法 |
| JP2006049784A (ja) * | 2003-08-28 | 2006-02-16 | Renesas Technology Corp | 半導体記憶装置及びその製造方法 |
| US7675122B2 (en) | 2003-08-28 | 2010-03-09 | Renesas Technology Corp. | Semiconductor memory device |
| US7402865B2 (en) | 2004-08-27 | 2008-07-22 | Renesas Technology Corp. | Semiconductor device including a contact connected to the body and method of manufacturing the same |
| JP2006066691A (ja) * | 2004-08-27 | 2006-03-09 | Renesas Technology Corp | 半導体装置およびその製造方法 |
| JP2010045331A (ja) * | 2008-07-22 | 2010-02-25 | Honeywell Internatl Inc | ボディ・タイの領域に効果的に直接コンタクトを設けるプロセスフロー |
| CN106226942A (zh) * | 2010-09-13 | 2016-12-14 | 株式会社半导体能源研究所 | 液晶显示设备及其制造方法 |
| CN106226942B (zh) * | 2010-09-13 | 2021-10-01 | 株式会社半导体能源研究所 | 显示设备及包括显示设备的电子设备 |
| US11417688B2 (en) | 2010-09-13 | 2022-08-16 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device and method for manufacturing the same |
| US11682678B2 (en) | 2010-09-13 | 2023-06-20 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device and method for manufacturing the same |
| US12199107B2 (en) | 2010-09-13 | 2025-01-14 | Semiconductor Energy Laboratory Co., Ltd. | Liquid crystal display device and method for manufacturing the same |
Also Published As
| Publication number | Publication date |
|---|---|
| US20010029067A1 (en) | 2001-10-11 |
| DE10043183A1 (de) | 2001-04-12 |
| KR20010030243A (ko) | 2001-04-16 |
| KR100340395B1 (ko) | 2002-06-15 |
| US6252280B1 (en) | 2001-06-26 |
| US6337230B2 (en) | 2002-01-08 |
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Legal Events
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| A521 | Request for written amendment filed |
Free format text: JAPANESE INTERMEDIATE CODE: A523 Effective date: 20060825 |
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