JP5270876B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
- Publication number
- JP5270876B2 JP5270876B2 JP2007215947A JP2007215947A JP5270876B2 JP 5270876 B2 JP5270876 B2 JP 5270876B2 JP 2007215947 A JP2007215947 A JP 2007215947A JP 2007215947 A JP2007215947 A JP 2007215947A JP 5270876 B2 JP5270876 B2 JP 5270876B2
- Authority
- JP
- Japan
- Prior art keywords
- region
- shallow trench
- mos transistor
- esd protection
- type mos
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000004065 semiconductor Substances 0.000 title claims description 17
- 238000002955 isolation Methods 0.000 claims abstract description 43
- 238000000926 separation method Methods 0.000 claims description 9
- 230000006378 damage Effects 0.000 claims description 3
- 239000000758 substrate Substances 0.000 description 7
- 238000004519 manufacturing process Methods 0.000 description 3
- 238000000034 method Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 230000007547 defect Effects 0.000 description 2
- 230000005611 electricity Effects 0.000 description 2
- 230000003068 static effect Effects 0.000 description 2
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N Silicium dioxide Chemical compound O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 238000009413 insulation Methods 0.000 description 1
- 238000005468 ion implantation Methods 0.000 description 1
- 229910021420 polycrystalline silicon Inorganic materials 0.000 description 1
- 229920005591 polysilicon Polymers 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 229910052814 silicon oxide Inorganic materials 0.000 description 1
Images
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/0203—Particular design considerations for integrated circuits
- H01L27/0248—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
- H01L27/0251—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
- H01L27/0266—Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)
- Semiconductor Integrated Circuits (AREA)
- Insulated Gate Type Field-Effect Transistor (AREA)
Description
502 ゲート電極
503 ドレイン領域
504 シャロートレンチ分離領域
505 離間領域
Claims (2)
- 外部接続端子と内部回路領域との間に前記内部回路領域に形成された内部素子をESDによる破壊から保護するために形成された、素子分離にシャロートレンチ分離領域を用いたシャロートレンチ構造を有するESD保護用のN型MOSトランジスタにおいて、
前記ESD保護用のN型MOSトランジスタのドレイン領域は、前記ドレイン領域が前記ESD保護用のN型MOSトランジスタのゲート電極と隣接する領域の両端においてのみ、前記ゲート電極により覆われていない、前記ドレイン領域とは逆の導電型を有する離間領域があることにより前記シャロートレンチ分離領域から離れて配置されていることを特徴とする半導体装置。 - 前記ESD保護用のN型MOSトランジスタのドレイン領域は、少なくとも前記ESD保護用のN型MOSトランジスタのゲート電極に近接する領域において、前記シャロートレンチ分離領域から少なくとも前記ESD保護用のN型MOSトランジスタのゲート長以上の距離をおいて配置されていることを特徴とする請求項1記載の半導体装置。
Priority Applications (5)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007215947A JP5270876B2 (ja) | 2007-08-22 | 2007-08-22 | 半導体装置 |
US12/191,661 US8907443B2 (en) | 2007-08-22 | 2008-08-14 | Semiconductor device |
TW097131725A TWI453891B (zh) | 2007-08-22 | 2008-08-20 | 半導體裝置 |
CN 200810168672 CN101373767B (zh) | 2007-08-22 | 2008-08-22 | 半导体器件 |
KR1020080082594A KR101549701B1 (ko) | 2007-08-22 | 2008-08-22 | 반도체 디바이스 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2007215947A JP5270876B2 (ja) | 2007-08-22 | 2007-08-22 | 半導体装置 |
Publications (2)
Publication Number | Publication Date |
---|---|
JP2009049295A JP2009049295A (ja) | 2009-03-05 |
JP5270876B2 true JP5270876B2 (ja) | 2013-08-21 |
Family
ID=40381363
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2007215947A Expired - Fee Related JP5270876B2 (ja) | 2007-08-22 | 2007-08-22 | 半導体装置 |
Country Status (5)
Country | Link |
---|---|
US (1) | US8907443B2 (ja) |
JP (1) | JP5270876B2 (ja) |
KR (1) | KR101549701B1 (ja) |
CN (1) | CN101373767B (ja) |
TW (1) | TWI453891B (ja) |
Families Citing this family (6)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JP5546191B2 (ja) * | 2009-09-25 | 2014-07-09 | セイコーインスツル株式会社 | 半導体装置 |
JP2011071329A (ja) * | 2009-09-25 | 2011-04-07 | Seiko Instruments Inc | 半導体装置 |
JP5498822B2 (ja) * | 2010-03-15 | 2014-05-21 | セイコーインスツル株式会社 | 半導体装置 |
CN102412155B (zh) * | 2011-01-17 | 2013-12-18 | 上海华虹Nec电子有限公司 | 隔离型ldmos的制造方法 |
US8994121B2 (en) | 2013-03-22 | 2015-03-31 | Kabushiki Kaisha Toshiba | Nonvolatile semiconductor memory device |
US9899376B2 (en) * | 2016-03-04 | 2018-02-20 | Texas Instruments Incorporated | MOSFET transistors with robust subthreshold operations |
Family Cites Families (32)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5451799A (en) * | 1992-12-28 | 1995-09-19 | Matsushita Electric Industrial Co., Ltd. | MOS transistor for protection against electrostatic discharge |
US5567553A (en) * | 1994-07-12 | 1996-10-22 | International Business Machines Corporation | Method to suppress subthreshold leakage due to sharp isolation corners in submicron FET structures |
JPH0897411A (ja) * | 1994-09-21 | 1996-04-12 | Fuji Electric Co Ltd | 横型高耐圧トレンチmosfetおよびその製造方法 |
US5757038A (en) * | 1995-11-06 | 1998-05-26 | International Business Machines Corporation | Self-aligned dual gate MOSFET with an ultranarrow channel |
KR100268930B1 (ko) * | 1996-11-12 | 2000-10-16 | 김영환 | 박막트랜지스터의 구조 및 그 제조방법 |
JP3237555B2 (ja) * | 1997-01-09 | 2001-12-10 | 富士電機株式会社 | 半導体装置 |
KR100259078B1 (ko) * | 1997-08-14 | 2000-06-15 | 김영환 | 박막트랜지스터 및 이의 제조방법 |
JP3528554B2 (ja) * | 1997-12-04 | 2004-05-17 | セイコーエプソン株式会社 | 半導体装置 |
DE69925078T2 (de) * | 1998-08-29 | 2006-03-09 | International Business Machines Corp. | SOI-Transistor mit einem Substrat-Kontakt und Verfahren zu dessen Herstellung |
JP2001077368A (ja) * | 1999-09-03 | 2001-03-23 | Mitsubishi Electric Corp | 半導体装置及びその製造方法 |
JP2001119024A (ja) * | 1999-10-21 | 2001-04-27 | Nec Ic Microcomput Syst Ltd | 半導体装置およびその製造方法 |
JP2001319978A (ja) * | 2000-05-01 | 2001-11-16 | Toshiba Corp | 半導体装置及びその製造方法 |
US7352454B2 (en) * | 2000-11-09 | 2008-04-01 | Canesta, Inc. | Methods and devices for improved charge management for three-dimensional and color sensing |
US6521946B2 (en) * | 2000-11-30 | 2003-02-18 | Texas Instruments Incorporated | Electrostatic discharge resistant extended drain metal oxide semiconductor transistor |
JP2002231886A (ja) | 2001-01-31 | 2002-08-16 | Matsushita Electric Ind Co Ltd | Esd保護回路および半導体集積回路装置 |
TW483143B (en) * | 2001-02-05 | 2002-04-11 | Vanguard Int Semiconduct Corp | Voltage control device for electrostatic discharge protection and its related circuit |
JP2002246601A (ja) * | 2001-02-16 | 2002-08-30 | Seiko Epson Corp | 半導体装置及び半導体装置の製造方法 |
TWI291734B (en) * | 2002-01-17 | 2007-12-21 | Macronix Int Co Ltd | MOSFET with low junction capacitance |
US6660602B1 (en) * | 2002-03-12 | 2003-12-09 | National Semiconductor Corp. | Stand-alone triggering structure for ESD protection of high voltage CMOS |
US6934136B2 (en) * | 2002-04-24 | 2005-08-23 | Texas Instrument Incorporated | ESD protection of noise decoupling capacitors |
US6624487B1 (en) * | 2002-05-07 | 2003-09-23 | Texas Instruments Incorporated | Drain-extended MOS ESD protection structure |
JP2004241529A (ja) * | 2003-02-05 | 2004-08-26 | Matsushita Electric Ind Co Ltd | 半導体回路装置及びその回路シミュレーション方法 |
JP3897730B2 (ja) * | 2003-04-23 | 2007-03-28 | 松下電器産業株式会社 | 半導体記憶装置および半導体集積回路 |
US6905919B2 (en) * | 2003-07-29 | 2005-06-14 | Chartered Semiconductor Manufacturing Ltd. | Method of forming a partially depleted silicon on insulator (PDSOI) transistor with a pad lock body extension |
JPWO2005069377A1 (ja) * | 2004-01-19 | 2007-07-26 | 松下電器産業株式会社 | 固体撮像装置およびその製造方法 |
JP4168995B2 (ja) * | 2004-09-30 | 2008-10-22 | セイコーエプソン株式会社 | 半導体装置及びその製造方法 |
JP2006210463A (ja) * | 2005-01-26 | 2006-08-10 | Elpida Memory Inc | 半導体装置及びその製造方法 |
JP2006222329A (ja) * | 2005-02-14 | 2006-08-24 | Elpida Memory Inc | 半導体装置 |
US7535063B2 (en) * | 2005-06-28 | 2009-05-19 | United Microelectronics Corp. | ESD protection device structure |
US7453127B2 (en) * | 2006-02-13 | 2008-11-18 | Taiwan Semiconductor Manufacturing Co., Ltd. | Double-diffused-drain MOS device with floating non-insulator spacers |
JP2007266569A (ja) * | 2006-02-28 | 2007-10-11 | Toshiba Corp | 半導体記憶装置およびその製造方法 |
US20080203470A1 (en) * | 2007-02-28 | 2008-08-28 | Infineon Technologies Austria Ag | Lateral compensation component |
-
2007
- 2007-08-22 JP JP2007215947A patent/JP5270876B2/ja not_active Expired - Fee Related
-
2008
- 2008-08-14 US US12/191,661 patent/US8907443B2/en not_active Expired - Fee Related
- 2008-08-20 TW TW097131725A patent/TWI453891B/zh not_active IP Right Cessation
- 2008-08-22 KR KR1020080082594A patent/KR101549701B1/ko active IP Right Grant
- 2008-08-22 CN CN 200810168672 patent/CN101373767B/zh not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
KR101549701B1 (ko) | 2015-09-02 |
CN101373767B (zh) | 2012-07-11 |
CN101373767A (zh) | 2009-02-25 |
US8907443B2 (en) | 2014-12-09 |
TWI453891B (zh) | 2014-09-21 |
KR20090020530A (ko) | 2009-02-26 |
JP2009049295A (ja) | 2009-03-05 |
US20090050966A1 (en) | 2009-02-26 |
TW200917463A (en) | 2009-04-16 |
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