JP2000286254A - 半導体集積回路装置およびその製造方法 - Google Patents

半導体集積回路装置およびその製造方法

Info

Publication number
JP2000286254A
JP2000286254A JP11093871A JP9387199A JP2000286254A JP 2000286254 A JP2000286254 A JP 2000286254A JP 11093871 A JP11093871 A JP 11093871A JP 9387199 A JP9387199 A JP 9387199A JP 2000286254 A JP2000286254 A JP 2000286254A
Authority
JP
Japan
Prior art keywords
insulating film
integrated circuit
circuit device
film
semiconductor integrated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11093871A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000286254A5 (https=
Inventor
Masayoshi Saito
政良 齊藤
Katsuhiko Hotta
勝彦 堀田
Masanari Hirasawa
賢斉 平沢
Masayuki Kojima
雅之 児島
Hiroyuki Uchiyama
博之 内山
Hiroyuki Maruyama
裕之 丸山
Takuya Fukuda
琢也 福田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Hitachi Solutions Technology Ltd
Original Assignee
Hitachi Ltd
Hitachi ULSI Systems Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd, Hitachi ULSI Systems Co Ltd filed Critical Hitachi Ltd
Priority to JP11093871A priority Critical patent/JP2000286254A/ja
Priority to TW089105602A priority patent/TW492111B/zh
Priority to KR1020000016051A priority patent/KR100787266B1/ko
Priority to US09/664,381 priority patent/US6509277B1/en
Publication of JP2000286254A publication Critical patent/JP2000286254A/ja
Priority to US10/303,935 priority patent/US6833331B2/en
Publication of JP2000286254A5 publication Critical patent/JP2000286254A5/ja
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/66—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials
    • H10P14/668—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials
    • H10P14/6681—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si
    • H10P14/6684—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen
    • H10P14/6686—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the type of materials the materials being characterised by the deposition precursor materials the precursor containing a compound comprising Si the compound comprising silicon and oxygen the compound being a molecule comprising at least one silicon-oxygen bond and the compound having hydrogen or an organic group attached to the silicon or oxygen, e.g. a siloxane
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/65—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials
    • H10P14/6516—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials
    • H10P14/6529—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by treatments performed before or after the formation of the materials of treatments performed after formation of the materials by exposure to a gas or vapour
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/074—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
    • H10W20/076—Manufacture or treatment of dielectric parts thereof of dielectric parts comprising thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H10W20/089—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts using processes for implementing desired shapes or dispositions of the openings, e.g. double patterning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/095—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by irradiating with electromagnetic or particle radiation
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/096—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by contacting with gases, liquids or plasmas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/093—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts
    • H10W20/097—Manufacture or treatment of dielectric parts thereof by modifying materials of the dielectric parts by thermally treating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/01—Manufacture or treatment
    • H10B12/09—Manufacture or treatment with simultaneous manufacture of the peripheral circuit region and memory cells
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B12/00—Dynamic random access memory [DRAM] devices
    • H10B12/30—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells
    • H10B12/31—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor
    • H10B12/315—DRAM devices comprising one-transistor - one-capacitor [1T-1C] memory cells having a storage electrode stacked over the transistor with the capacitor higher than a bit line
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/63—Formation of materials, e.g. in the shape of layers or pillars of insulating materials characterised by the formation processes
    • H10P14/6326—Deposition processes
    • H10P14/6342—Liquid deposition, e.g. spin-coating, sol-gel techniques or spray coating
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/6922—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material containing Si, O and at least one of H, N, C, F or other non-metal elements, e.g. SiOC, SiOC:H or SiONC

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Formation Of Insulating Films (AREA)
JP11093871A 1999-03-31 1999-03-31 半導体集積回路装置およびその製造方法 Pending JP2000286254A (ja)

Priority Applications (5)

Application Number Priority Date Filing Date Title
JP11093871A JP2000286254A (ja) 1999-03-31 1999-03-31 半導体集積回路装置およびその製造方法
TW089105602A TW492111B (en) 1999-03-31 2000-03-27 Semiconductor integrated circuit device and manufacture thereof
KR1020000016051A KR100787266B1 (ko) 1999-03-31 2000-03-29 반도체 집적회로장치 및 그 제조방법
US09/664,381 US6509277B1 (en) 1999-03-31 2000-09-18 Method of manufacturing semiconductor integrated circuit device having insulatro film formed from liquid containing polymer of silicon, oxygen, and hydrogen
US10/303,935 US6833331B2 (en) 1999-03-31 2002-11-26 Method of manufacturing semiconductor integrated circuit device having insulating film formed from liquid substance containing polymer of silicon, oxygen, and hydrogen

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11093871A JP2000286254A (ja) 1999-03-31 1999-03-31 半導体集積回路装置およびその製造方法

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2006239148A Division JP2007036267A (ja) 2006-09-04 2006-09-04 Ｓｏｇ膜の形成方法

Publications (2)

Publication Number Publication Date
JP2000286254A true JP2000286254A (ja) 2000-10-13
JP2000286254A5 JP2000286254A5 (https=) 2005-03-17

Family

ID=14094535

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11093871A Pending JP2000286254A (ja) 1999-03-31 1999-03-31 半導体集積回路装置およびその製造方法

Country Status (4)

Country Link
US (2) US6509277B1 (https=)
JP (1) JP2000286254A (https=)
KR (1) KR100787266B1 (https=)
TW (1) TW492111B (https=)

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JP2005340327A (ja) * 2004-05-25 2005-12-08 Renesas Technology Corp 半導体装置及びその製造方法
JP2008504713A (ja) * 2004-06-28 2008-02-14 マイクロン テクノロジー、インコーポレイテッド メモリデバイス用分離トレンチ
US7420237B2 (en) 2004-01-29 2008-09-02 Matsushita Electric Industrial Co., Ltd. Capacitor element
JP2010004081A (ja) * 2003-04-23 2010-01-07 Tokyo Electron Ltd 層間絶縁膜の表面改質方法及び表面改質装置
WO2026063332A1 (ja) * 2024-09-18 2026-03-26 キヤノン株式会社 コンタクトホールの形成方法、半導体デバイスの製造方法

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JP2004140198A (ja) * 2002-10-18 2004-05-13 Oki Electric Ind Co Ltd 半導体装置およびその製造方法
US7208389B1 (en) 2003-03-31 2007-04-24 Novellus Systems, Inc. Method of porogen removal from porous low-k films using UV radiation
US7223693B2 (en) * 2003-12-12 2007-05-29 Samsung Electronics Co., Ltd. Methods for fabricating memory devices using sacrificial layers and memory devices fabricated by same
US7265050B2 (en) * 2003-12-12 2007-09-04 Samsung Electronics Co., Ltd. Methods for fabricating memory devices using sacrificial layers
US7291556B2 (en) * 2003-12-12 2007-11-06 Samsung Electronics Co., Ltd. Method for forming small features in microelectronic devices using sacrificial layers
US20070284743A1 (en) * 2003-12-12 2007-12-13 Samsung Electronics Co., Ltd. Fabricating Memory Devices Using Sacrificial Layers and Memory Devices Fabricated by Same
US20050272220A1 (en) * 2004-06-07 2005-12-08 Carlo Waldfried Ultraviolet curing process for spin-on dielectric materials used in pre-metal and/or shallow trench isolation applications
US7589362B1 (en) * 2004-07-01 2009-09-15 Netlogic Microsystems, Inc. Configurable non-volatile logic structure for characterizing an integrated circuit device
US7215004B1 (en) * 2004-07-01 2007-05-08 Netlogic Microsystems, Inc. Integrated circuit device with electronically accessible device identifier
US7166531B1 (en) 2005-01-31 2007-01-23 Novellus Systems, Inc. VLSI fabrication processes for introducing pores into dielectric materials
US7414275B2 (en) * 2005-06-24 2008-08-19 International Business Machines Corporation Multi-level interconnections for an integrated circuit chip
KR100888202B1 (ko) * 2006-09-28 2009-03-12 주식회사 하이닉스반도체 반도체 소자 제조방법
US20100015731A1 (en) * 2007-02-20 2010-01-21 Lam Research Corporation Method of low-k dielectric film repair
WO2008155085A1 (de) * 2007-06-18 2008-12-24 Microgan Gmbh Elektrische schaltung mit vertikaler kontaktierung
KR100885895B1 (ko) * 2007-07-02 2009-02-26 삼성전자주식회사 반도체 장치의 제조 방법
JP2010171327A (ja) 2009-01-26 2010-08-05 Toshiba Corp 半導体装置の製造方法
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US8951907B2 (en) * 2010-12-14 2015-02-10 GlobalFoundries, Inc. Semiconductor devices having through-contacts and related fabrication methods
US9337068B2 (en) 2012-12-18 2016-05-10 Lam Research Corporation Oxygen-containing ceramic hard masks and associated wet-cleans
TWI607510B (zh) * 2012-12-28 2017-12-01 半導體能源研究所股份有限公司 半導體裝置及半導體裝置的製造方法
KR102246277B1 (ko) * 2014-03-14 2021-04-29 에스케이하이닉스 주식회사 반도체 소자 및 그 제조 방법
CN104952724B (zh) * 2014-03-31 2018-10-23 中芯国际集成电路制造(上海)有限公司 介电薄膜的后处理方法、互连层及半导体器件
US9847221B1 (en) 2016-09-29 2017-12-19 Lam Research Corporation Low temperature formation of high quality silicon oxide films in semiconductor device manufacturing
CN116133436A (zh) * 2021-11-12 2023-05-16 联华电子股份有限公司 半导体元件及其制作方法
CN116801611A (zh) * 2022-03-15 2023-09-22 长鑫存储技术有限公司 存储器、半导体结构及其制备方法

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2010004081A (ja) * 2003-04-23 2010-01-07 Tokyo Electron Ltd 層間絶縁膜の表面改質方法及び表面改質装置
US7420237B2 (en) 2004-01-29 2008-09-02 Matsushita Electric Industrial Co., Ltd. Capacitor element
JP2005340327A (ja) * 2004-05-25 2005-12-08 Renesas Technology Corp 半導体装置及びその製造方法
JP2008504713A (ja) * 2004-06-28 2008-02-14 マイクロン テクノロジー、インコーポレイテッド メモリデバイス用分離トレンチ
JP4918695B2 (ja) * 2004-06-28 2012-04-18 マイクロン テクノロジー， インク． メモリデバイス用分離トレンチ
WO2026063332A1 (ja) * 2024-09-18 2026-03-26 キヤノン株式会社 コンタクトホールの形成方法、半導体デバイスの製造方法

Also Published As

Publication number Publication date
US20030077896A1 (en) 2003-04-24
US6509277B1 (en) 2003-01-21
KR20010006900A (ko) 2001-01-26
KR100787266B1 (ko) 2007-12-21
TW492111B (en) 2002-06-21
US6833331B2 (en) 2004-12-21

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