JP2000048570A - 半導体記憶装置 - Google Patents

半導体記憶装置

Info

Publication number
JP2000048570A
JP2000048570A JP10212492A JP21249298A JP2000048570A JP 2000048570 A JP2000048570 A JP 2000048570A JP 10212492 A JP10212492 A JP 10212492A JP 21249298 A JP21249298 A JP 21249298A JP 2000048570 A JP2000048570 A JP 2000048570A
Authority
JP
Japan
Prior art keywords
data
read
signal
data bus
bus
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10212492A
Other languages
English (en)
Japanese (ja)
Other versions
JP2000048570A5 (enExample
Inventor
Takeshi Hamamoto
武史 濱本
Takuya Ariki
卓弥 有木
Mikio Asakura
幹雄 朝倉
Takayuki Nishiyama
崇之 西山
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP10212492A priority Critical patent/JP2000048570A/ja
Priority to US09/261,153 priority patent/US6166989A/en
Publication of JP2000048570A publication Critical patent/JP2000048570A/ja
Priority to US09/666,133 priority patent/US6377512B1/en
Publication of JP2000048570A5 publication Critical patent/JP2000048570A5/ja
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C8/00—Arrangements for selecting an address in a digital store
    • G11C8/12—Group selection circuits, e.g. for memory block selection, chip selection, array selection
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1006—Data managing, e.g. manipulating data before writing or reading out, data bus switches or control circuits therefor
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1051—Data output circuits, e.g. read-out amplifiers, data output buffers, data output registers, data output level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1072—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers for memories with random access ports synchronised on clock signal pulse trains, e.g. synchronous memories, self timed memories

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Dram (AREA)
  • Static Random-Access Memory (AREA)
JP10212492A 1998-07-28 1998-07-28 半導体記憶装置 Pending JP2000048570A (ja)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP10212492A JP2000048570A (ja) 1998-07-28 1998-07-28 半導体記憶装置
US09/261,153 US6166989A (en) 1998-07-28 1999-03-03 Clock synchronous type semiconductor memory device that can switch word configuration
US09/666,133 US6377512B1 (en) 1998-07-28 2000-09-20 Clock synchronous type semiconductor memory device that can switch word configuration

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10212492A JP2000048570A (ja) 1998-07-28 1998-07-28 半導体記憶装置

Related Child Applications (1)

Application Number Title Priority Date Filing Date
JP2005207254A Division JP4397357B2 (ja) 2005-07-15 2005-07-15 半導体記憶装置

Publications (2)

Publication Number Publication Date
JP2000048570A true JP2000048570A (ja) 2000-02-18
JP2000048570A5 JP2000048570A5 (enExample) 2005-10-27

Family

ID=16623559

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10212492A Pending JP2000048570A (ja) 1998-07-28 1998-07-28 半導体記憶装置

Country Status (2)

Country Link
US (2) US6166989A (enExample)
JP (1) JP2000048570A (enExample)

Cited By (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004213888A (ja) * 2004-03-02 2004-07-29 Matsushita Electric Ind Co Ltd 半導体記憶装置
KR100670707B1 (ko) 2005-03-31 2007-01-17 주식회사 하이닉스반도체 멀티-포트 메모리 소자
JP2007012242A (ja) * 2005-06-30 2007-01-18 Hynix Semiconductor Inc 半導体メモリ装置
KR100766386B1 (ko) 2006-10-13 2007-10-12 주식회사 하이닉스반도체 반도체 메모리 장치의 데이터 입출력 회로
JP2008130155A (ja) * 2006-11-21 2008-06-05 Renesas Technology Corp 半導体記憶装置
JP2009087525A (ja) * 2007-09-28 2009-04-23 Hynix Semiconductor Inc 半導体メモリ素子
JP2009110570A (ja) * 2007-10-26 2009-05-21 Elpida Memory Inc 半導体記憶装置
JP2015533009A (ja) * 2012-09-25 2015-11-16 インテル・コーポレーション パフォーマンスおよび電力のために構成可能な３ｄメモリ

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JP2000048570A (ja) * 1998-07-28 2000-02-18 Mitsubishi Electric Corp 半導体記憶装置
JP3856596B2 (ja) * 1999-05-28 2006-12-13 富士通株式会社 半導体記憶装置
JP2001222899A (ja) * 1999-11-30 2001-08-17 Seiko Epson Corp 半導体集積回路
US6414899B2 (en) 2000-02-02 2002-07-02 Broadcom Corporation Limited swing driver circuit
US6411557B2 (en) 2000-02-02 2002-06-25 Broadcom Corporation Memory architecture with single-port cell and dual-port (read and write) functionality
US6535025B2 (en) 2000-02-02 2003-03-18 Broadcom Corp. Sense amplifier with offset cancellation and charge-share limited swing drivers
US8164362B2 (en) * 2000-02-02 2012-04-24 Broadcom Corporation Single-ended sense amplifier with sample-and-hold reference
US6603712B2 (en) 2000-02-02 2003-08-05 Broadcom Corporation High precision delay measurement circuit
US6724681B2 (en) 2000-02-02 2004-04-20 Broadcom Corporation Asynchronously-resettable decoder with redundancy
US6417697B2 (en) 2000-02-02 2002-07-09 Broadcom Corporation Circuit technique for high speed low power data transfer bus
US6745354B2 (en) 2000-02-02 2004-06-01 Broadcom Corporation Memory redundancy implementation
US7173867B2 (en) 2001-02-02 2007-02-06 Broadcom Corporation Memory redundancy circuit techniques
US6492844B2 (en) 2000-02-02 2002-12-10 Broadcom Corporation Single-ended sense amplifier with sample-and-hold reference
US6611465B2 (en) 2000-02-02 2003-08-26 Broadcom Corporation Diffusion replica delay circuit
US6937538B2 (en) * 2000-02-02 2005-08-30 Broadcom Corporation Asynchronously resettable decoder for a semiconductor memory
JP2002049447A (ja) * 2000-08-03 2002-02-15 Matsushita Electric Ind Co Ltd 信号伝送システム
US6714467B2 (en) * 2002-03-19 2004-03-30 Broadcom Corporation Block redundancy implementation in heirarchical RAM's
JP2002298580A (ja) 2001-03-28 2002-10-11 Mitsubishi Electric Corp 半導体記憶装置
KR100400311B1 (ko) 2001-06-29 2003-10-01 주식회사 하이닉스반도체 반도체 메모리 소자의 신호 지연 제어 장치
US6782467B1 (en) 2001-06-29 2004-08-24 Cypress Semiconductor Corp. Method and apparatus for fast limited core area access and cross-port word size multiplication in synchronous multiport memories
JP2003023091A (ja) * 2001-07-10 2003-01-24 Mitsubishi Electric Corp バージョン管理回路およびその製造方法
US6707740B2 (en) * 2001-08-03 2004-03-16 Fujitsu Limited Semiconductor memory
DE10148521B4 (de) * 2001-10-01 2010-01-28 Qimonda Ag Integrierter Speicher sowie Verfahren zum Betrieb eines integrierten Speichers und eines Speichersystems mit mehreren integrierten Speichern
JP2003132681A (ja) * 2001-10-29 2003-05-09 Mitsubishi Electric Corp 半導体記憶装置
JP2003331598A (ja) * 2002-05-13 2003-11-21 Mitsubishi Electric Corp 半導体記憶装置
DE10224742B4 (de) * 2002-06-04 2004-07-08 Infineon Technologies Ag Datenverarbeitungsschaltung und Verfahren zum Übertragen von Daten
US6696874B2 (en) * 2002-07-23 2004-02-24 Bae Systems, Information And Electronic Systems Integration, Inc. Single-event upset immune flip-flop circuit
JP4044389B2 (ja) * 2002-08-19 2008-02-06 富士通株式会社 半導体記憶装置
US7796464B1 (en) 2003-06-27 2010-09-14 Cypress Semiconductor Corporation Synchronous memory with a shadow-cycle counter
JP2005149662A (ja) * 2003-11-19 2005-06-09 Oki Electric Ind Co Ltd 同期型半導体記憶装置
US8253196B2 (en) 2004-01-29 2012-08-28 Enpirion, Inc. Integrated circuit with a laterally diffused metal oxide semiconductor device and method of forming the same
US7230302B2 (en) 2004-01-29 2007-06-12 Enpirion, Inc. Laterally diffused metal oxide semiconductor device and method of forming the same
KR100572333B1 (ko) * 2004-11-03 2006-04-18 삼성전자주식회사 데이터 라인을 간단하게 디스차지할 수 있는 노어 플래시메모리 장치
DE102005006343B4 (de) * 2005-02-11 2010-01-14 Qimonda Ag Integrierter Halbleiterspeicher mit taktsynchroner Zugriffssteuerung
US7656954B1 (en) * 2005-11-30 2010-02-02 Nvidia Corporation Single-ended tri-level encoding/decoding
US7573940B2 (en) * 2005-12-07 2009-08-11 Intel Corporation Data transmission at energy efficient rates
JP4890369B2 (ja) * 2007-07-10 2012-03-07 エルピーダメモリ株式会社 デューティ検知回路及びこれを用いたｄｌｌ回路、半導体記憶装置、並びに、データ処理システム
US8156353B2 (en) 2007-09-17 2012-04-10 Intel Corporation Techniques for communications power management based on system states
US8312307B2 (en) 2007-11-07 2012-11-13 Intel Corporation Systems and methods for reducing power consumption during communication between link partners
KR100903372B1 (ko) * 2008-05-06 2009-06-23 주식회사 하이닉스반도체 반도체 메모리 소자
US8213303B2 (en) 2008-09-12 2012-07-03 Intel Corporation Generating, at least in part, and/or receiving, at least in part, at least one request
US8477558B2 (en) * 2008-10-30 2013-07-02 Intel Corporation Memory apparatuses with low supply voltages
JP2010113765A (ja) * 2008-11-06 2010-05-20 Elpida Memory Inc 半導体記憶装置
US8201005B2 (en) 2009-03-17 2012-06-12 Intel Corporation Negotiating a transmit wake time
US8381144B2 (en) * 2010-03-03 2013-02-19 Qualcomm Incorporated System and method of test mode gate operation
KR101124332B1 (ko) * 2010-07-02 2012-03-19 주식회사 하이닉스반도체 비휘발성 메모리 장치 및 그 설정정보 처리방법
KR101672978B1 (ko) * 2010-08-30 2016-11-07 에스케이하이닉스 주식회사 반도체 메모리 장치
US8873314B2 (en) 2010-11-05 2014-10-28 Micron Technology, Inc. Circuits and methods for providing data to and from arrays of memory cells
KR20130129784A (ko) * 2012-05-21 2013-11-29 에스케이하이닉스 주식회사 데이터출력회로 및 반도체메모리장치
KR101919415B1 (ko) * 2012-08-08 2018-11-16 에스케이하이닉스 주식회사 반도체 장치
EP2738813A3 (en) 2012-11-30 2015-07-22 Enpirion, Inc. Semiconductor device including alternating source and drain regions, and respective source and drain metallic strips
US9673192B1 (en) 2013-11-27 2017-06-06 Altera Corporation Semiconductor device including a resistor metallic layer and method of forming the same
US9536938B1 (en) 2013-11-27 2017-01-03 Altera Corporation Semiconductor device including a resistor metallic layer and method of forming the same
US10020739B2 (en) 2014-03-27 2018-07-10 Altera Corporation Integrated current replicator and method of operating the same
KR20150120557A (ko) * 2014-04-17 2015-10-28 에스케이하이닉스 주식회사 반도체 메모리를 포함하는 전자 장치 및 이의 동작 방법
US10103627B2 (en) 2015-02-26 2018-10-16 Altera Corporation Packaged integrated circuit including a switch-mode regulator and method of forming the same
KR102393425B1 (ko) * 2015-10-20 2022-05-03 에스케이하이닉스 주식회사 반도체장치 및 반도체시스템
US11671142B2 (en) * 2021-01-19 2023-06-06 Axonne Inc. Electromagnetic interference cancellation for wireline receivers, with safety function

Family Cites Families (7)

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JPH04114395A (ja) * 1990-09-05 1992-04-15 Nec Corp 半導体記憶回路
JPH04252494A (ja) * 1991-01-28 1992-09-08 Hitachi Ltd 半導体記憶装置
KR0167235B1 (ko) * 1995-03-28 1999-02-01 문정환 메모리의 데이타 전송장치
JPH1186541A (ja) * 1997-09-02 1999-03-30 Mitsubishi Electric Corp 半導体記憶装置
KR100265610B1 (ko) * 1997-12-31 2000-10-02 김영환 데이터 전송속도를 증가시킨 더블 데이터 레이트 싱크로너스 디램
JPH11213665A (ja) * 1998-01-26 1999-08-06 Mitsubishi Electric Corp 半導体回路装置およびその使用方法
JP2000048570A (ja) * 1998-07-28 2000-02-18 Mitsubishi Electric Corp 半導体記憶装置

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2004213888A (ja) * 2004-03-02 2004-07-29 Matsushita Electric Ind Co Ltd 半導体記憶装置
KR100670707B1 (ko) 2005-03-31 2007-01-17 주식회사 하이닉스반도체 멀티-포트 메모리 소자
US7283420B2 (en) 2005-03-31 2007-10-16 Hynix Semiconductor Inc. Multi-port memory device
JP2007012242A (ja) * 2005-06-30 2007-01-18 Hynix Semiconductor Inc 半導体メモリ装置
KR100766386B1 (ko) 2006-10-13 2007-10-12 주식회사 하이닉스반도체 반도체 메모리 장치의 데이터 입출력 회로
JP2008130155A (ja) * 2006-11-21 2008-06-05 Renesas Technology Corp 半導体記憶装置
JP2009087525A (ja) * 2007-09-28 2009-04-23 Hynix Semiconductor Inc 半導体メモリ素子
JP2009110570A (ja) * 2007-10-26 2009-05-21 Elpida Memory Inc 半導体記憶装置
JP2015533009A (ja) * 2012-09-25 2015-11-16 インテル・コーポレーション パフォーマンスおよび電力のために構成可能な３ｄメモリ

Also Published As

Publication number Publication date
US6166989A (en) 2000-12-26
US6377512B1 (en) 2002-04-23

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