IT1112298B - Processo per formare regioni isolate di silicio - Google Patents

Processo per formare regioni isolate di silicio

Info

Publication number
IT1112298B
IT1112298B IT26393/78A IT2639378A IT1112298B IT 1112298 B IT1112298 B IT 1112298B IT 26393/78 A IT26393/78 A IT 26393/78A IT 2639378 A IT2639378 A IT 2639378A IT 1112298 B IT1112298 B IT 1112298B
Authority
IT
Italy
Prior art keywords
form silicon
isolated regions
silicon isolated
regions
silicon
Prior art date
Application number
IT26393/78A
Other languages
English (en)
Other versions
IT7826393A0 (it
Original Assignee
Ibm
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibm filed Critical Ibm
Publication of IT7826393A0 publication Critical patent/IT7826393A0/it
Application granted granted Critical
Publication of IT1112298B publication Critical patent/IT1112298B/it

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic System or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/76224—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials
    • H01L21/76232—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using trench refilling with dielectric materials of trenches having a shape other than rectangular or V-shape, e.g. rounded corners, oblique or rounded trench walls
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/051—Etching
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/131—Reactive ion etching rie
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/161—Tapered edges
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/168—V-Grooves
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00—Semiconductor device manufacturing: process
    • Y10S438/978—Semiconductor device manufacturing: process forming tapered edges on substrate or adjacent layers

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Plasma & Fusion (AREA)
  • Element Separation (AREA)
  • Drying Of Semiconductors (AREA)
IT26393/78A 1977-08-15 1978-08-02 Processo per formare regioni isolate di silicio IT1112298B (it)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US05/824,361 US4104086A (en) 1977-08-15 1977-08-15 Method for forming isolated regions of silicon utilizing reactive ion etching

Publications (2)

Publication Number Publication Date
IT7826393A0 IT7826393A0 (it) 1978-08-02
IT1112298B true IT1112298B (it) 1986-01-13

Family

ID=25241194

Family Applications (1)

Application Number Title Priority Date Filing Date
IT26393/78A IT1112298B (it) 1977-08-15 1978-08-02 Processo per formare regioni isolate di silicio

Country Status (6)

Country Link
US (1) US4104086A (it)
EP (1) EP0000897B1 (it)
JP (1) JPS5432277A (it)
CA (1) CA1097826A (it)
DE (1) DE2861453D1 (it)
IT (1) IT1112298B (it)

Families Citing this family (150)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4140558A (en) * 1978-03-02 1979-02-20 Bell Telephone Laboratories, Incorporated Isolation of integrated circuits utilizing selective etching and diffusion
US4264382A (en) * 1978-05-25 1981-04-28 International Business Machines Corporation Method for making a lateral PNP or NPN with a high gain utilizing reactive ion etching of buried high conductivity regions
US4196440A (en) * 1978-05-25 1980-04-01 International Business Machines Corporation Lateral PNP or NPN with a high gain
US4276099A (en) * 1978-10-11 1981-06-30 The Secretary Of State For Defence In Her Britannic Majesty's Government Of The United Kingdom Of Great Britain And Northern Ireland Fabrication of infra-red charge coupled devices
US4256514A (en) * 1978-11-03 1981-03-17 International Business Machines Corporation Method for forming a narrow dimensioned region on a body
US4229233A (en) * 1979-02-05 1980-10-21 International Business Machines Corporation Method for fabricating non-reflective semiconductor surfaces by anisotropic reactive ion etching
JPS55107780A (en) * 1979-02-07 1980-08-19 Hitachi Ltd Etching method
US4214946A (en) * 1979-02-21 1980-07-29 International Business Machines Corporation Selective reactive ion etching of polysilicon against SiO2 utilizing SF6 -Cl2 -inert gas etchant
US4252579A (en) * 1979-05-07 1981-02-24 International Business Machines Corporation Method for making single electrode U-MOSFET random access memory utilizing reactive ion etching and polycrystalline deposition
US4238278A (en) * 1979-06-14 1980-12-09 International Business Machines Corporation Polycrystalline silicon oxidation method for making shallow and deep isolation trenches
US4211582A (en) * 1979-06-28 1980-07-08 International Business Machines Corporation Process for making large area isolation trenches utilizing a two-step selective etching technique
US4259145A (en) * 1979-06-29 1981-03-31 International Business Machines Corporation Ion source for reactive ion etching
US4222792A (en) * 1979-09-10 1980-09-16 International Business Machines Corporation Planar deep oxide isolation process utilizing resin glass and E-beam exposure
US4303933A (en) * 1979-11-29 1981-12-01 International Business Machines Corporation Self-aligned micrometer bipolar transistor device and process
US4333227A (en) * 1979-11-29 1982-06-08 International Business Machines Corporation Process for fabricating a self-aligned micrometer bipolar transistor device
JPS5681968A (en) * 1979-12-07 1981-07-04 Toshiba Corp Manufacture of semiconductor device
US4383885A (en) * 1980-02-06 1983-05-17 Bell Telephone Laboratories, Incorporated Reactive sputter etching of polysilicon utilizing a chlorine etch gas
CA1148895A (en) * 1980-02-06 1983-06-28 Dan Maydan Reactive sputter etching of silicon
US4338138A (en) * 1980-03-03 1982-07-06 International Business Machines Corporation Process for fabricating a bipolar transistor
US4309812A (en) * 1980-03-03 1982-01-12 International Business Machines Corporation Process for fabricating improved bipolar transistor utilizing selective etching
US4318751A (en) * 1980-03-13 1982-03-09 International Business Machines Corporation Self-aligned process for providing an improved high performance bipolar transistor
US4274909A (en) * 1980-03-17 1981-06-23 International Business Machines Corporation Method for forming ultra fine deep dielectric isolation
US4287661A (en) * 1980-03-26 1981-09-08 International Business Machines Corporation Method for making an improved polysilicon conductor structure utilizing reactive-ion etching and thermal oxidation
US4359816A (en) * 1980-07-08 1982-11-23 International Business Machines Corporation Self-aligned metal process for field effect transistor integrated circuits
US4758528A (en) * 1980-07-08 1988-07-19 International Business Machines Corporation Self-aligned metal process for integrated circuit metallization
JPS585537Y2 (ja) * 1980-07-09 1983-01-31 聡 田原 なべ蓋の支持脚
US4394196A (en) * 1980-07-16 1983-07-19 Tokyo Shibaura Denki Kabushiki Kaisha Method of etching, refilling and etching dielectric grooves for isolating micron size device regions
US4307180A (en) * 1980-08-22 1981-12-22 International Business Machines Corp. Process of forming recessed dielectric regions in a monocrystalline silicon substrate
DE3174468D1 (en) * 1980-09-17 1986-05-28 Hitachi Ltd Semiconductor device and method of manufacturing the same
JPS589333A (ja) * 1981-07-08 1983-01-19 Hitachi Ltd 半導体装置
JPS5760851A (en) * 1980-09-17 1982-04-13 Hitachi Ltd Dielectric isolation of semiconductor integrated circuit
US4331708A (en) * 1980-11-04 1982-05-25 Texas Instruments Incorporated Method of fabricating narrow deep grooves in silicon
US4391531A (en) * 1980-12-19 1983-07-05 Timex Corporation Electrooptical display/lead frame subassembly and timepiece module including same
US4356211A (en) * 1980-12-19 1982-10-26 International Business Machines Corporation Forming air-dielectric isolation regions in a monocrystalline silicon substrate by differential oxidation of polysilicon
US4374011A (en) * 1981-05-08 1983-02-15 Fairchild Camera & Instrument Corp. Process for fabricating non-encroaching planar insulating regions in integrated circuit structures
JPS583248A (ja) * 1981-06-30 1983-01-10 Toshiba Corp バイポ−ラ型半導体装置の製造方法
US4506435A (en) * 1981-07-27 1985-03-26 International Business Machines Corporation Method for forming recessed isolated regions
US4532701A (en) * 1981-08-21 1985-08-06 Tokyo Shibaura Denki Kabushiki Kaisha Method of manufacturing semiconductor device
US4454647A (en) * 1981-08-27 1984-06-19 International Business Machines Corporation Isolation for high density integrated circuits
US4454646A (en) * 1981-08-27 1984-06-19 International Business Machines Corporation Isolation for high density integrated circuits
JPS5848936A (ja) * 1981-09-10 1983-03-23 Fujitsu Ltd 半導体装置の製造方法
US4491486A (en) * 1981-09-17 1985-01-01 Tokyo Shibaura Denki Kabushiki Kaisha Method for manufacturing a semiconductor device
JPS5873163A (ja) * 1981-10-27 1983-05-02 Toshiba Corp Ｍｏｓ型半導体装置
US4390393A (en) * 1981-11-12 1983-06-28 General Electric Company Method of forming an isolation trench in a semiconductor substrate
US4419810A (en) * 1981-12-30 1983-12-13 International Business Machines Corporation Self-aligned field effect transistor process
US4419809A (en) * 1981-12-30 1983-12-13 International Business Machines Corporation Fabrication process of sub-micrometer channel length MOSFETs
US4435898A (en) 1982-03-22 1984-03-13 International Business Machines Corporation Method for making a base etched transistor integrated circuit
US4535531A (en) * 1982-03-22 1985-08-20 International Business Machines Corporation Method and resulting structure for selective multiple base width transistor structures
JPS58202545A (ja) * 1982-05-21 1983-11-25 Toshiba Corp 半導体装置の製造方法
US4502913A (en) * 1982-06-30 1985-03-05 International Business Machines Corporation Total dielectric isolation for integrated circuits
US4712125A (en) * 1982-08-06 1987-12-08 International Business Machines Corporation Structure for contacting a narrow width PN junction region
US4444605A (en) * 1982-08-27 1984-04-24 Texas Instruments Incorporated Planar field oxide for semiconductor devices
JPS5961045A (ja) * 1982-09-29 1984-04-07 Fujitsu Ltd 半導体装置の製造方法
USRE34400E (en) * 1982-09-29 1993-10-05 Fujitsu Limited Method for fabricating isolation region in semiconductor devices
JPS5992548A (ja) * 1982-11-18 1984-05-28 Toshiba Corp 半導体装置及びその製造方法
JPS59119848A (ja) * 1982-12-27 1984-07-11 Fujitsu Ltd 半導体装置の製造方法
US4492008A (en) * 1983-08-04 1985-01-08 International Business Machines Corporation Methods for making high performance lateral bipolar transistors
US4546536A (en) * 1983-08-04 1985-10-15 International Business Machines Corporation Fabrication methods for high performance lateral bipolar transistors
US4573256A (en) * 1983-08-26 1986-03-04 International Business Machines Corporation Method for making a high performance transistor integrated circuit
JPS61500140A (ja) * 1983-10-11 1986-01-23 アメリカン テレフオン アンド テレグラフ カムパニ− 相補型金属−酸化物−半導体デバイスを含む半導体回路
US4656050A (en) * 1983-11-30 1987-04-07 International Business Machines Corporation Method of producing electronic components utilizing cured vinyl and/or acetylene terminated copolymers
US4551906A (en) * 1983-12-12 1985-11-12 International Business Machines Corporation Method for making self-aligned lateral bipolar transistors
US4456501A (en) * 1983-12-22 1984-06-26 Advanced Micro Devices, Inc. Process for dislocation-free slot isolations in device fabrication
US4534826A (en) * 1983-12-29 1985-08-13 Ibm Corporation Trench etch process for dielectric isolation
EP0172878B1 (en) * 1984-02-03 1992-07-15 Advanced Micro Devices, Inc. A bipolar transistor with active elements formed in slots
US4691222A (en) * 1984-03-12 1987-09-01 Harris Corporation Method to reduce the height of the bird's head in oxide isolated processes
US4569701A (en) * 1984-04-05 1986-02-11 At&T Bell Laboratories Technique for doping from a polysilicon transfer layer
US4549914A (en) * 1984-04-09 1985-10-29 At&T Bell Laboratories Integrated circuit contact technique
US4689656A (en) * 1984-06-25 1987-08-25 International Business Machines Corporation Method for forming a void free isolation pattern and resulting structure
US4528047A (en) * 1984-06-25 1985-07-09 International Business Machines Corporation Method for forming a void free isolation structure utilizing etch and refill techniques
US4526631A (en) * 1984-06-25 1985-07-02 International Business Machines Corporation Method for forming a void free isolation pattern utilizing etch and refill techniques
US4570330A (en) * 1984-06-28 1986-02-18 Gte Laboratories Incorporated Method of producing isolated regions for an integrated circuit substrate
US4860081A (en) * 1984-06-28 1989-08-22 Gte Laboratories Incorporated Semiconductor integrated circuit structure with insulative partitions
JPS6181653A (ja) * 1984-09-28 1986-04-25 Nec Corp 半導体装置の自己整合誘電体分離方法
US4571819A (en) * 1984-11-01 1986-02-25 Ncr Corporation Method for forming trench isolation structures
US4656497A (en) * 1984-11-01 1987-04-07 Ncr Corporation Trench isolation structures
JPS61121341A (ja) * 1984-11-16 1986-06-09 Mitsubishi Electric Corp ガラスパツシベ−シヨン形半導体装置の製造方法
US4665010A (en) * 1985-04-29 1987-05-12 International Business Machines Corporation Method of fabricating photopolymer isolation trenches in the surface of a semiconductor wafer
US4702795A (en) * 1985-05-03 1987-10-27 Texas Instruments Incorporated Trench etch process
US4984039A (en) * 1985-05-03 1991-01-08 Texas Instruments Incorporated Tapered trench structure and process
US4916511A (en) * 1985-05-03 1990-04-10 Texas Instruments Incorporated Trench structure and process
US4855017A (en) * 1985-05-03 1989-08-08 Texas Instruments Incorporated Trench etch process for a single-wafer RIE dry etch reactor
US4648173A (en) * 1985-05-28 1987-03-10 International Business Machines Corporation Fabrication of stud-defined integrated circuit structure
US4714520A (en) * 1985-07-25 1987-12-22 Advanced Micro Devices, Inc. Method for filling a trench in an integrated circuit structure without producing voids
US4665007A (en) * 1985-08-19 1987-05-12 International Business Machines Corporation Planarization process for organic filling of deep trenches
US4630356A (en) * 1985-09-19 1986-12-23 International Business Machines Corporation Method of forming recessed oxide isolation with reduced steepness of the birds' neck
US5462767A (en) * 1985-09-21 1995-10-31 Semiconductor Energy Laboratory Co., Ltd. CVD of conformal coatings over a depression using alkylmetal precursors
JPS6269520A (ja) * 1985-09-21 1987-03-30 Semiconductor Energy Lab Co Ltd 光ｃｖｄ法により凹部を充填する方法
JPS6281727A (ja) * 1985-10-05 1987-04-15 Fujitsu Ltd 埋込型素子分離溝の形成方法
US4824797A (en) * 1985-10-31 1989-04-25 International Business Machines Corporation Self-aligned channel stop
US5104816A (en) * 1986-01-30 1992-04-14 Texas Instruments Incorporated Polysilicon self-aligned bipolar device including trench isolation and process of manufacturing same
US4666556A (en) * 1986-05-12 1987-05-19 International Business Machines Corporation Trench sidewall isolation by polysilicon oxidation
US4726879A (en) * 1986-09-08 1988-02-23 International Business Machines Corporation RIE process for etching silicon isolation trenches and polycides with vertical surfaces
US4903107A (en) * 1986-12-29 1990-02-20 General Electric Company Buried oxide field isolation structure with composite dielectric
US4745087A (en) * 1987-01-13 1988-05-17 Advanced Micro Devices, Inc. Method of making fully self-aligned bipolar transistor involving a polysilicon collector contact formed in a slot with an oxide sidewall
US5545290A (en) * 1987-07-09 1996-08-13 Texas Instruments Incorporated Etching method
JPH0446880Y2 (it) * 1987-08-31 1992-11-05
US4897362A (en) * 1987-09-02 1990-01-30 Harris Corporation Double epitaxial method of fabricating semiconductor devices on bonded wafers
EP0313683A1 (en) * 1987-10-30 1989-05-03 International Business Machines Corporation Method for fabricating a semiconductor integrated circuit structure having a submicrometer length device element
JPS63313834A (ja) * 1988-01-13 1988-12-21 Hitachi Ltd 半導体集積回路
US4942449A (en) * 1988-03-28 1990-07-17 General Electric Company Fabrication method and structure for field isolation in field effect transistors on integrated circuit chips
JPH0727974B2 (ja) * 1988-04-26 1995-03-29 三菱電機株式会社 半導体記憶装置の製造方法
US5082791A (en) * 1988-05-13 1992-01-21 Mobil Solar Energy Corporation Method of fabricating solar cells
US5061653A (en) * 1989-02-22 1991-10-29 Texas Instruments Incorporated Trench isolation process
US5066603A (en) * 1989-09-06 1991-11-19 Gte Laboratories Incorporated Method of manufacturing static induction transistors
JP2870054B2 (ja) * 1989-10-25 1999-03-10 ソニー株式会社 半導体装置の製造方法
US5159429A (en) * 1990-01-23 1992-10-27 International Business Machines Corporation Semiconductor device structure employing a multi-level epitaxial structure and method of manufacturing same
US4997775A (en) * 1990-02-26 1991-03-05 Cook Robert K Method for forming a complementary bipolar transistor structure including a self-aligned vertical PNP transistor
US5306940A (en) * 1990-10-22 1994-04-26 Nec Corporation Semiconductor device including a locos type field oxide film and a U trench penetrating the locos film
US5106770A (en) * 1990-11-16 1992-04-21 Gte Laboratories Incorporated Method of manufacturing semiconductor devices
US6146135A (en) * 1991-08-19 2000-11-14 Tadahiro Ohmi Oxide film forming method
US5433794A (en) * 1992-12-10 1995-07-18 Micron Technology, Inc. Spacers used to form isolation trenches with improved corners
US5294558A (en) * 1993-06-01 1994-03-15 International Business Machines Corporation Method of making double-self-aligned bipolar transistor structure
US5356828A (en) * 1993-07-01 1994-10-18 Digital Equipment Corporation Method of forming micro-trench isolation regions in the fabrication of semiconductor devices
CA2131668C (en) * 1993-12-23 1999-03-02 Carol Galli Isolation structure using liquid phase oxide deposition
US5516720A (en) * 1994-02-14 1996-05-14 United Microelectronics Corporation Stress relaxation in dielectric before metallization
US5492858A (en) * 1994-04-20 1996-02-20 Digital Equipment Corporation Shallow trench isolation process for high aspect ratio trenches
WO1996024161A1 (en) * 1995-01-30 1996-08-08 The Whitaker Corporation Electronic device and process for making same
DE19538005A1 (de) * 1995-10-12 1997-04-17 Fraunhofer Ges Forschung Verfahren zum Erzeugen einer Grabenisolation in einem Substrat
JPH09260484A (ja) * 1996-03-25 1997-10-03 Toshiba Corp 半導体装置の製造方法
US5888876A (en) * 1996-04-09 1999-03-30 Kabushiki Kaisha Toshiba Deep trench filling method using silicon film deposition and silicon migration
US6091129A (en) * 1996-06-19 2000-07-18 Cypress Semiconductor Corporation Self-aligned trench isolated structure
US5770484A (en) * 1996-12-13 1998-06-23 International Business Machines Corporation Method of making silicon on insulator buried plate trench capacitor
US5889293A (en) * 1997-04-04 1999-03-30 International Business Machines Corporation Electrical contact to buried SOI structures
JP2002510139A (ja) 1998-01-15 2002-04-02 コーネル・リサーチ・ファンデーション・インコーポレイテッド ミクロ加工デバイスのトレンチアイソレーション
US6107206A (en) * 1998-09-14 2000-08-22 Taiwan Semiconductor Manufacturing Company Method for etching shallow trenches in a semiconductor body
KR100312943B1 (ko) * 1999-03-18 2001-11-03 김영환 반도체장치 및 그의 제조방법
US6420757B1 (en) 1999-09-14 2002-07-16 Vram Technologies, Llc Semiconductor diodes having low forward conduction voltage drop, low reverse current leakage, and high avalanche energy capability
US6232229B1 (en) 1999-11-19 2001-05-15 Micron Technology, Inc. Microelectronic device fabricating method, integrated circuit, and intermediate construction
US20020071169A1 (en) 2000-02-01 2002-06-13 Bowers John Edward Micro-electro-mechanical-system (MEMS) mirror device
US6753638B2 (en) 2000-02-03 2004-06-22 Calient Networks, Inc. Electrostatic actuator for micromechanical systems
US6433370B1 (en) 2000-02-10 2002-08-13 Vram Technologies, Llc Method and apparatus for cylindrical semiconductor diodes
JP2001332614A (ja) 2000-03-17 2001-11-30 Mitsubishi Electric Corp トレンチ型素子分離構造の製造方法
US6628041B2 (en) 2000-05-16 2003-09-30 Calient Networks, Inc. Micro-electro-mechanical-system (MEMS) mirror device having large angle out of plane motion using shaped combed finger actuators and method for fabricating the same
US6825967B1 (en) 2000-09-29 2004-11-30 Calient Networks, Inc. Shaped electrodes for micro-electro-mechanical-system (MEMS) devices to improve actuator performance and methods for fabricating the same
US6580150B1 (en) 2000-11-13 2003-06-17 Vram Technologies, Llc Vertical junction field effect semiconductor diodes
SG112804A1 (en) * 2001-05-10 2005-07-28 Inst Of Microelectronics Sloped trench etching process
US6537921B2 (en) 2001-05-23 2003-03-25 Vram Technologies, Llc Vertical metal oxide silicon field effect semiconductor diodes
US6891209B2 (en) * 2001-08-13 2005-05-10 Amberwave Systems Corporation Dynamic random access memory trench capacitors
US6544863B1 (en) 2001-08-21 2003-04-08 Calient Networks, Inc. Method of fabricating semiconductor wafers having multiple height subsurface layers
JP2003158178A (ja) 2001-11-22 2003-05-30 Mitsubishi Electric Corp 半導体装置およびその製造方法
US7728339B1 (en) 2002-05-03 2010-06-01 Calient Networks, Inc. Boundary isolation for microelectromechanical devices
US6958275B2 (en) * 2003-03-11 2005-10-25 Integrated Discrete Devices, Llc MOSFET power transistors and methods
US7396732B2 (en) * 2004-12-17 2008-07-08 Interuniversitair Microelektronica Centrum Vzw (Imec) Formation of deep trench airgaps and related applications
US20080299780A1 (en) * 2007-06-01 2008-12-04 Uv Tech Systems, Inc. Method and apparatus for laser oxidation and reduction
US7772097B2 (en) * 2007-11-05 2010-08-10 Asm America, Inc. Methods of selectively depositing silicon-containing films
JP2010021532A (ja) * 2008-06-12 2010-01-28 Sanyo Electric Co Ltd メサ型半導体装置及びその製造方法
US10607880B2 (en) 2018-08-30 2020-03-31 Nxp Usa, Inc. Die with buried doped isolation region
US11887945B2 (en) * 2020-09-30 2024-01-30 Wolfspeed, Inc. Semiconductor device with isolation and/or protection structures
US11545577B2 (en) 2020-12-08 2023-01-03 Globalfoundries U.S. Inc. Semiconductor structure with in-device high resistivity polycrystalline semiconductor element and method

Family Cites Families (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3577044A (en) * 1966-03-08 1971-05-04 Ibm Integrated semiconductor devices and fabrication methods therefor
GB1224803A (en) * 1967-03-01 1971-03-10 Sony Corp Semiconductor devices
FR1527898A (fr) * 1967-03-16 1968-06-07 Radiotechnique Coprim Rtc Agencement de dispositifs semi-conducteurs portés par un support commun et son procédé de fabrication
US3508980A (en) * 1967-07-26 1970-04-28 Motorola Inc Method of fabricating an integrated circuit structure with dielectric isolation
US3796612A (en) * 1971-08-05 1974-03-12 Scient Micro Syst Inc Semiconductor isolation method utilizing anisotropic etching and differential thermal oxidation
US3979237A (en) * 1972-04-24 1976-09-07 Harris Corporation Device isolation in integrated circuits
FR2240528A1 (en) * 1973-08-07 1975-03-07 Radiotechnique Compelec Formation of insulation barriers in silicon wafers - by gas etching hollows through a mask, then filling with insulation
US3966577A (en) * 1973-08-27 1976-06-29 Trw Inc. Dielectrically isolated semiconductor devices
US3901737A (en) * 1974-02-15 1975-08-26 Signetics Corp Method for forming a semiconductor structure having islands isolated by moats
GB1485015A (en) * 1974-10-29 1977-09-08 Mullard Ltd Semi-conductor device manufacture
FR2312114A1 (fr) * 1975-05-22 1976-12-17 Ibm Attaque de materiaux par ions reactifs
JPS5255877A (en) * 1975-11-01 1977-05-07 Fujitsu Ltd Semiconductor device

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JPS6220696B2 (it) 1987-05-08
EP0000897A1 (de) 1979-03-07
CA1097826A (en) 1981-03-17
DE2861453D1 (en) 1982-02-11
JPS5432277A (en) 1979-03-09
US4104086A (en) 1978-08-01
EP0000897B1 (de) 1981-12-23

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