FR2439478A1 - Boitier plat pour dispositifs a circuits integres - Google Patents

Boitier plat pour dispositifs a circuits integres

Info

Publication number
FR2439478A1
FR2439478A1 FR7829844A FR7829844A FR2439478A1 FR 2439478 A1 FR2439478 A1 FR 2439478A1 FR 7829844 A FR7829844 A FR 7829844A FR 7829844 A FR7829844 A FR 7829844A FR 2439478 A1 FR2439478 A1 FR 2439478A1
Authority
FR
France
Prior art keywords
devices
integrated circuits
flat housing
box
thickness
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
FR7829844A
Other languages
English (en)
Other versions
FR2439478B1 (fr
Inventor
Michel Ugon
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Bull SA
Original Assignee
Bull SA
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Bull SA filed Critical Bull SA
Priority to FR7829844A priority Critical patent/FR2439478A1/fr
Priority to NLAANVRAGE7905082,A priority patent/NL190090C/xx
Priority to CH740579A priority patent/CH632870A5/fr
Priority to SE7906962A priority patent/SE440292B/sv
Priority to US06/069,253 priority patent/US4264917A/en
Priority to GB7929895A priority patent/GB2035701B/en
Priority to JP13007679A priority patent/JPS5556647A/ja
Priority to IT26530/79A priority patent/IT1123868B/it
Priority to CA000337863A priority patent/CA1148267A/fr
Priority to DE19792942422 priority patent/DE2942422A1/de
Publication of FR2439478A1 publication Critical patent/FR2439478A1/fr
Application granted granted Critical
Publication of FR2439478B1 publication Critical patent/FR2439478B1/fr
Priority to JP1983095034U priority patent/JPS5936249U/ja
Granted legal-status Critical Current

Links

Classifications

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    • H01L24/85—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a wire connector
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06K—GRAPHICAL DATA READING; PRESENTATION OF DATA; RECORD CARRIERS; HANDLING RECORD CARRIERS
    • G06K19/00—Record carriers for use with machines and with at least a part designed to carry digital markings
    • G06K19/06—Record carriers for use with machines and with at least a part designed to carry digital markings characterised by the kind of the digital marking, e.g. shape, nature, code
    • G06K19/067—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components
    • G06K19/07—Record carriers with conductive marks, printed circuits or semiconductor circuit elements, e.g. credit or identity cards also with resonating or responding marks without active components with integrated circuit chips
    • G06K19/077—Constructional details, e.g. mounting of circuits in the carrier
    • G06K19/07745—Mounting details of integrated circuit chips
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Abstract

L'INVENTION A POUR OBJET UN BOITIER POUR UN OU PLUSIEURS DISPOSITIFS A CIRCUITS INTEGRES, POUVANT ETRE REDUIT A UN TRES FAIBLE ENCOMBREMENT, TANT EN EPAISSEUR QU'EN SURFACE. PAR EXEMPLE UN BOITIER 40 CONFORME A L'INVENTION SE COMPOSE D'UNE PLAQUETTE 42 PORTANT LES BORNES DE SORTIE 41 DU BOITIER ET LE CIRCUIT D'INTERCONNEXION 47A-47D DE DEUX DISPOSITIFS 43, 44. UN ENROBAGE 49 PROTEGE LE DISPOSITIF ET AU MOINS EN PARTIE LEUR CIRCUIT D'INTERCONNEXION, EN LAISSANT DEGAGEES LES BORNES DE SORTIE 41. AVEC UNE PLAQUETTE EN VERRE EPOXY, L'EPAISSEUR DU BOITIER PEUT ETRE INFERIEURE AU MILLIMETRE. L'INVENTION S'APPLIQUE NOTAMMENT AUX BOITIERS POUR CARTES PORTATIVES, DU GENRE CARTES DE CREDIT.
FR7829844A 1978-10-19 1978-10-19 Boitier plat pour dispositifs a circuits integres Granted FR2439478A1 (fr)

Priority Applications (11)

Application Number Priority Date Filing Date Title
FR7829844A FR2439478A1 (fr) 1978-10-19 1978-10-19 Boitier plat pour dispositifs a circuits integres
NLAANVRAGE7905082,A NL190090C (nl) 1978-10-19 1979-06-29 Platte doos voor inrichtingen met geintegreerde ketens.
CH740579A CH632870A5 (fr) 1978-10-19 1979-08-13 Boitier plat contenant un dispositif a circuits integres.
SE7906962A SE440292B (sv) 1978-10-19 1979-08-21 Flat kapsel for integrerade kretsar
US06/069,253 US4264917A (en) 1978-10-19 1979-08-24 Flat package for integrated circuit devices
GB7929895A GB2035701B (en) 1978-10-19 1979-08-29 Flat package for integrated circuit devices
JP13007679A JPS5556647A (en) 1978-10-19 1979-10-11 Flat package for at least one integrated circuit device
IT26530/79A IT1123868B (it) 1978-10-19 1979-10-16 Involucro piatto per dispositivi a circuiti integrati
CA000337863A CA1148267A (fr) 1978-10-19 1979-10-17 Boitier plat pour dispositifs a circuits integres
DE19792942422 DE2942422A1 (de) 1978-10-19 1979-10-19 Traegerplatte fuer integrierte schaltkreise
JP1983095034U JPS5936249U (ja) 1978-10-19 1983-06-22 少くとも１つの集積回路デバイスのためのフラツト・パツケ−ジ

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR7829844A FR2439478A1 (fr) 1978-10-19 1978-10-19 Boitier plat pour dispositifs a circuits integres

Publications (2)

Publication Number Publication Date
FR2439478A1 true FR2439478A1 (fr) 1980-05-16
FR2439478B1 FR2439478B1 (fr) 1981-04-17

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Application Number Title Priority Date Filing Date
FR7829844A Granted FR2439478A1 (fr) 1978-10-19 1978-10-19 Boitier plat pour dispositifs a circuits integres

Country Status (10)

Country Link
US (1) US4264917A (fr)
JP (2) JPS5556647A (fr)
CA (1) CA1148267A (fr)
CH (1) CH632870A5 (fr)
DE (1) DE2942422A1 (fr)
FR (1) FR2439478A1 (fr)
GB (1) GB2035701B (fr)
IT (1) IT1123868B (fr)
NL (1) NL190090C (fr)
SE (1) SE440292B (fr)

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FR2490917A1 (fr) * 1980-09-02 1982-03-26 Motorola Semiconducteurs Boitier pour circuit electrique et procede de fabrication
US4549247A (en) * 1980-11-21 1985-10-22 Gao Gesellschaft Fur Automation Und Organisation Mbh Carrier element for IC-modules
EP0238282A2 (fr) * 1986-03-17 1987-09-23 Fujitsu Limited Dispositif à circuit intégré hybride et procédé pour sa fabrication
US4774633A (en) * 1985-06-26 1988-09-27 Bull S.A. Method for assembling an integrated circuit with raised contacts on a substrate, device thereby produced and an electronic microcircuit card incorporating said device
EP0343379A2 (fr) * 1988-05-26 1989-11-29 International Business Machines Corporation Empaquetage à film mince pour la connexion mixte d'une puce
EP0344259A1 (fr) * 1987-10-30 1989-12-06 Lsi Logic Corporation Procede et agencement de fabrication de boitiers de dispositifs semi-conducteurs
WO2003063077A1 (fr) * 2002-01-24 2003-07-31 Infineon Technologies Ag Substrat de support pour un module de puce, module de puce et carte à puce

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JPS5948985A (ja) * 1982-09-13 1984-03-21 大日本印刷株式会社 Ｉｃカ−ドの製造方法
DE3235650A1 (de) * 1982-09-27 1984-03-29 Philips Patentverwaltung Gmbh, 2000 Hamburg Informationskarte und verfahren zu ihrer herstellung
GB2129223A (en) * 1982-10-09 1984-05-10 Welwyn Electronics Ltd Printed circuit boards
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JPS59193596A (ja) * 1983-04-18 1984-11-02 Kyodo Printing Co Ltd Ｉｃカ−ド用ｉｃモジユ−ル
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Cited By (11)

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Publication number Priority date Publication date Assignee Title
FR2488446A1 (fr) * 1980-08-05 1982-02-12 Gao Ges Automation Org Element support pour un module de circuits integres
FR2490917A1 (fr) * 1980-09-02 1982-03-26 Motorola Semiconducteurs Boitier pour circuit electrique et procede de fabrication
US4549247A (en) * 1980-11-21 1985-10-22 Gao Gesellschaft Fur Automation Und Organisation Mbh Carrier element for IC-modules
US4774633A (en) * 1985-06-26 1988-09-27 Bull S.A. Method for assembling an integrated circuit with raised contacts on a substrate, device thereby produced and an electronic microcircuit card incorporating said device
EP0238282A2 (fr) * 1986-03-17 1987-09-23 Fujitsu Limited Dispositif à circuit intégré hybride et procédé pour sa fabrication
EP0238282A3 (fr) * 1986-03-17 1988-12-21 Fujitsu Limited Dispositif à circuit intégré hybride et procédé pour sa fabrication
EP0344259A1 (fr) * 1987-10-30 1989-12-06 Lsi Logic Corporation Procede et agencement de fabrication de boitiers de dispositifs semi-conducteurs
EP0344259A4 (en) * 1987-10-30 1991-04-24 Lsi Logic Corporation Method and means of fabricating a semiconductor device package
EP0343379A2 (fr) * 1988-05-26 1989-11-29 International Business Machines Corporation Empaquetage à film mince pour la connexion mixte d'une puce
EP0343379A3 (fr) * 1988-05-26 1991-04-10 International Business Machines Corporation Empaquetage à film mince pour la connexion mixte d'une puce
WO2003063077A1 (fr) * 2002-01-24 2003-07-31 Infineon Technologies Ag Substrat de support pour un module de puce, module de puce et carte à puce

Also Published As

Publication number Publication date
CH632870A5 (fr) 1982-10-29
DE2942422A1 (de) 1980-04-30
NL190090B (nl) 1993-05-17
US4264917A (en) 1981-04-28
IT1123868B (it) 1986-04-30
IT7926530A0 (it) 1979-10-16
SE440292B (sv) 1985-07-22
NL190090C (nl) 1993-10-18
JPS5556647A (en) 1980-04-25
CA1148267A (fr) 1983-06-14
JPS5936249U (ja) 1984-03-07
NL7905082A (nl) 1980-04-22
SE7906962L (sv) 1980-04-20
GB2035701A (en) 1980-06-18
FR2439478B1 (fr) 1981-04-17
GB2035701B (en) 1983-06-29

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