EP1793656B1 - Flexible printed wiring board - Google Patents

Flexible printed wiring board Download PDF

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Publication number
EP1793656B1
EP1793656B1 EP05785562A EP05785562A EP1793656B1 EP 1793656 B1 EP1793656 B1 EP 1793656B1 EP 05785562 A EP05785562 A EP 05785562A EP 05785562 A EP05785562 A EP 05785562A EP 1793656 B1 EP1793656 B1 EP 1793656B1
Authority
EP
European Patent Office
Prior art keywords
printed wiring
flexible printed
wiring board
conductor
layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Not-in-force
Application number
EP05785562A
Other languages
German (de)
English (en)
French (fr)
Other versions
EP1793656A2 (en
EP1793656A4 (en
Inventor
Kiyotaka Tsukada
Terumasa Ninomaru
Masaki Kizaki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
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Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Publication of EP1793656A2 publication Critical patent/EP1793656A2/en
Publication of EP1793656A4 publication Critical patent/EP1793656A4/en
Application granted granted Critical
Publication of EP1793656B1 publication Critical patent/EP1793656B1/en
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Anticipated expiration legal-status Critical

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    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/0277—Bendability or stretchability details
    • H05K1/028—Bending or folding regions of flexible printed circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01R—ELECTRICALLY-CONDUCTIVE CONNECTIONS; STRUCTURAL ASSOCIATIONS OF A PLURALITY OF MUTUALLY-INSULATED ELECTRICAL CONNECTING ELEMENTS; COUPLING DEVICES; CURRENT COLLECTORS
    • H01R12/00—Structural associations of a plurality of mutually-insulated electrical connecting elements, specially adapted for printed circuits, e.g. printed circuit boards [PCB], flat or ribbon cables, or like generally planar structures, e.g. terminal strips, terminal blocks; Coupling devices specially adapted for printed circuits, flat or ribbon cables, or like generally planar structures; Terminals specially adapted for contact with, or insertion into, printed circuits, flat or ribbon cables, or like generally planar structures
    • H01R12/70—Coupling devices
    • H01R12/71—Coupling devices for rigid printing circuits or like structures
    • H01R12/712—Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit
    • H01R12/714—Coupling devices for rigid printing circuits or like structures co-operating with the surface of the printed circuit or with a coupling device exclusively provided on the surface of the printed circuit with contacts abutting directly the printed circuit; Button contacts therefore provided on the printed circuit
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/03—Use of materials for the substrate
    • H05K1/0313—Organic insulating material
    • H05K1/0353—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0366—Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4682—Manufacture of core-less build-up multilayer circuits on a temporary carrier or on a metal foil
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00—Printed circuits
    • H05K1/02—Details
    • H05K1/14—Structural association of two or more printed circuits
    • H05K1/141—One or more single auxiliary printed circuits mounted on a main printed circuit, e.g. modules, adapters
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00—Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/02—Fillers; Particles; Fibers; Reinforcement materials
    • H05K2201/0275—Fibers and reinforcement materials
    • H05K2201/029—Woven fibrous reinforcement or textile
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2203/00—Indexing scheme relating to apparatus or processes for manufacturing printed circuits covered by H05K3/00
    • H05K2203/15—Position of the PCB during processing
    • H05K2203/1536—Temporarily stacked PCBs
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/22—Secondary treatment of printed circuits
    • H05K3/28—Applying non-metallic protective coatings
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/36—Assembling printed circuits with other printed circuits
    • H05K3/361—Assembling flexible printed circuits with other printed circuits
    • H05K3/363—Assembling flexible printed circuits with other printed circuits by soldering
    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/46—Manufacturing multilayer circuits
    • H05K3/4644—Manufacturing multilayer circuits by building the multilayer layer by layer, i.e. build-up multilayer circuits
    • H05K3/4652—Adding a circuit layer by laminating a metal foil or a preformed metal foil pattern

Definitions

  • This invention relates to a flexible printed wiring board, and more particularly, to a flexible printed wiring board having an element mounting part where circuit elements are mounted and a bending part to be bent around a bending axis.
  • Such a flexible printed wiring board with CSPs mounted on both surfaces is arranged to have a layered structure throughout the substrate surface, as shown in Fig. 15 , typically consisting of three conductor layers (PT1 to PT3), two insulating layers (IN 1 and IN2) isolating these conductor layers, and two coverlay layers (CL1 and CL2) (hereafter referred to as "related art example").
  • memory elements for example, are mounted on both surfaces of an element mounting part 60' as shown in Fig. 15 .
  • a bending part 70' is bent around the bending axis AX', so that a motherboard connecting part 80', which is formed at the top surface on the other end, is made in electric contact with the motherboard MB ( Fig. 15 ). Consequently, the efficiency in implementation of memory elements on a motherboard can be improved.
  • An object of the present invention is to provide a flexible printed wiring board that has improved crack resistance.
  • An inner conductor layer is formed on the inside of the board.
  • element mounting part conductor layers are formed on both surfaces at outer sides of the wiring board, respectively, and in the bending part, a bending part conductor layer is formed only on the surface on the outer side that faces the exterior when the wiring board is bent.
  • the element mounting part conductor layers are formed on both surfaces at the outer sides of the wiring board, respectively.
  • the bending part conductor layer is formed only on the side that faces the exterior when it is bent. Therefore, as compared with the related art example described above, this configuration allows a reduction of the number of conductor layers in the bending part by one and the number of coverlay layer by one as well.
  • the total thickness can be made thin as compared with the related art flexible printed wiring boards. Consequently, when the flexible wiring board is bent at the same curvature, the stress is reduced, and therefore crack resistance is improved.
  • a conductor pattern that imparts a ground potential in terms of alternating current may be formed.
  • a conductor pattern to impart a ground potential in terms of alternating current as an interior layer conductor layer, the characteristic impedance of a signal circuit pattern (also referred to as "outer layer conductor pattern") formed at the side that faces the exterior can be stabilized even when the flexible printed wiring board is bent along the bending axis.
  • a conductor pattern to impart the ground potential in terms of alternating current may be formed in a plane pattern.
  • signal lines of the outer layer conductor pattern in the bending part can be formed to constitute a microstrip configuration, thereby further stabilizing the characteristic impedance.
  • the insulating layer formed between the above described conductor patterns are preferably made of fiber-reinforced plastic.
  • fiber-reinforced plastics there are mentioned fiber-glass reinforced plastics (GFRP), carbon fiber reinforced plastics (CFRP) and the like. More specifically, glass-fiber-reinforced epoxy, glass-fiber-reinforced polyester resin and the like may be used.
  • the thickness of the above described insulating layer is preferably between about 25 ⁇ m and about 65 ⁇ m. In this case, when the thickness of the above described insulating layer is less than about 25 ⁇ m, it is difficult to form an insulating layer with a uniform thickness, while when the thickness exceeds about 65 ⁇ m, preferable crack resistance may not be obtained.
  • the warp and the weft contained in the above described fiber-reinforced plastic preferably extend in the directions intersecting the direction of the above described bending axis by an angle of about 30° or more and about 60° or less. With this configuration, when the wiring board is bent, the warp and the weft mechanically cooperate to improve crack resistance.
  • the signal conductive pattern formed in the above described bending part conductor layer preferably extends in the direction that is obliquely disposed relative to the direction of the above described bending axis. This way, when the bending part is bent around the bending axis, the crack-prevention performance of the signal conductor pattern is further improved and the occurrence of cracks can be further reduced.
  • the above described circuit element can be a memory element.
  • high density implementation of memory elements which has been desired more and more in recent years, becomes possible.
  • one advantage of the present invention is that a flexible printed wiring board with improved crack resistance can be provided.
  • Fig. 1 shows a configuration of a flexible printed wiring board 10 according to an embodiment of the present invention as a perspective view.
  • Fig.1(A) is a perspective view thereof.
  • Fig. 1(B) is an XZ side view of the flexible printed wiring board 10 which is bent at a bending part along the bending axis AX and is attached to a motherboard MB.
  • pads 44U I to 44U N for mounting a circuit element 100A and pads 47L I to 47L N are provided, and pads 44U I to 44U N and pads 47L I to 47L N are electrically connected, respectively, for example.
  • pads 45U 1 to 45U N for mounting a circuit element 100B are formed at locations that correspond to the pads 44U 1 to 44U N .
  • these pads 45U I to 45U N and pads 47L I to 47L N are also electrically connected, respectively.
  • circuit element 100A and circuit element 100B can be memory elements of the same type.
  • the element 100A is mounted on the upper surface and the element 1008 is mounted on the lower surface of the flexible printed wiring board 10.
  • the flexible printed wiring board 10 In mounting the flexible printed wiring board 10 on a host board, such as a mother board, the flexible printed wiring board 10 is bent around the bending axis AX, and is mounted on the motherboard MB, as shown in Fig. 1(B) .
  • the circuit element 100B of the flexible printed wiring board 10 is bonded via a bonding layer 90 to a surface of the folded-over portion of the flexible printed wiring board, which is opposite to the surface having the pads 47L I to 47L N .
  • Fig. 2 shows an XZ cross-sectional view of the flexible printed wiring board 10 of the present embodiment.
  • the flexible printed wiring board 10 of the present embodiment includes an element mounting parts 60A and 60B (also referred to as "element mounting part 60" collectively) where the circuit elements 100A and 100B as described above are to be mounted, a bending part 70 where this flexible printed wiring board is bent around the bending axis AX, and a motherboard connecting part 80, which is to be connected to a motherboard.
  • the flexible printed wiring board 10 includes, in the element mounting part 60, (a) an insulating layer 13, (b) an insulating layer 17U formed on a surface in the +Z direction side of the insulating layer 13, (c) an insulating layer 20U, which is the outmost layer formed on a surface in the +Z direction side of the insulating layer 17U and (d) an insulating layer 22 formed on a surface in the -Z direction side of the insulating layer 13.
  • the insulating layers 20U and 22 respectively function as coverlay layers. Since the insulating layer 22 is not formed in the bending part 70, the bending part 70 includes the layers (a) to (c), but does not include the insulating layer 22 (d).
  • the flexible printed wiring board 10 includes (e) a conductor pattern 34U' formed on the surface in the +Z direction of the insulating layer 13, (f) a first conductor pattern 36U', which is a signal line pattern, formed on the surface in the +Z direction of the insulating layer 17U and (g) a second conductor pattern 33L, which is a signal line pattern, formed on the surface in the -Z direction of the insulating layer 13 in the element mounting part 60.
  • this conductor pattern 34U' includes a conductor pattern to impart a ground potential in terms of alternating current (hereinafter also referred to as "ground pattern” or “GNP”), and additionally includes circuit patterns formed at through holes, which intersects ground pattern and each layer.
  • the GNP may be formed in a solid pattern to cover substantially the entire area at the bending part 70.
  • the first conductor pattern 36U' includes a power supply pattern as well. Note that, in the bending part 70, the first conductor pattern 36U' is arranged to extend in the direction that intersects the bending axis AX (the Y direction) at an angle ⁇ .
  • the GNP is formed as a planar pattern which is made by a conductive material and substantially covers the entire area of the insulating layer 13 in the bending part 70.
  • conductor patterns P I to P N (which electrically connect the pads 44U 1 - 44U N to 47L 1 - 47L N , respectively, for example) are not disposed parallel to the X direction, but intersect a virtual line extending in the Y direction at angle ⁇ .
  • the ground pattern in the conductor pattern 34U' which is arranged in the bending part 70, is formed to cover the substantially entire area as the planar ground pattern. Since signal lines of the signal line pattern 33L, which forms the outer conductive pattern line, in the bending part 70 can be made as a microstrip configuration, the characteristic impedance can be stabilized.
  • the flexible printed wiring board 10 includes (h) non-through via holes on the surface in the - Z direction of the insulating layers 13 and 17U, respectively, for providing interconnections among GNP, the first conductor pattern 36U', and the second conductor pattern 33L.
  • non-through via holes are also provided in the motherboard connecting part 80 to provide interconnections between the GNP (conductor pattern 34U') and the first conductor pattern 36U'.
  • Pads 44U 1 to 44U N for mounting circuit element 100A are formed on the surface in the + Z direction of the first conductor pattern 36U' of the flexible printed wiring board 10.
  • pads 45U 1 to 45U N for mounting another circuit element 100B are formed on the surface in the - Z direction of the second conductive pattern 33L.
  • epoxy resin, glass-fiber-reinforced epoxy resin obtained by impregnating epoxy resin into glass fiber, glass-fiber-reinforced polyimide resin obtained by impregnating polyimide resin into glass fiber, and the like can be used.
  • glass epoxy is preferably used in terms of dimensional stability, mass productivity and thermal stability.
  • the insulating layers 13 and 17U may be formed of the same material selected from the above described materials, or may be formed with mutually different materials, and, when the glass-fiber- reinforced epoxy resin is used, the direction of the glass-fiber may not be limited.
  • polyimide resin coated with epoxy-based adhesive and the like can be used as for the insulating layers 20U and 22 forming coverlay layers.
  • polyimide resin is preferable.
  • conductive metal such as copper, aluminum, stainless steel and the like can be used.
  • copper is preferably used.
  • a supporting member (hereinafter also referred to as "reinforcing layer") 11 shown in Fig. 4(A) is prepared.
  • the supporting member 11 from the viewpoint of ease in handling during manufacturing steps, prepreg is preferably used.
  • GHPL830 manufactured by Mitsubishi Gas Chemical Company, Inc.
  • E679 manufactured by Hitachi Chemical Co., Ltd.
  • R1661 manufactured by Matsushita Electric Works, Ltd.
  • R1661 is preferable.
  • a conductor film with a carrier (31L, 32U), an insulating layer 12, and a conductor foil 32L are prepared.
  • the conductor film with a carrier (31L, 32U) is to be laminated on the surface in the -Z direction of the supporting member 11.
  • the insulating layer 12 is to be laminated on the surface in the -Z direction of the conductor film with a carrier (31L, 32U).
  • the conductor foil 32L is to be laminated on the surface in the -Z direction of the insulating layer 12.
  • a conductor film with a carrier (31U, 33L), an insulating layer 13, and a conductor foil 33U are prepared.
  • the conductor film with a carrier (31U, 33L) is to be laminated on the surface in the +Z direction of the supporting member 11.
  • the insulating layer 13 is to be laminated on the surface in the +Z direction of the conductor film with a carrier (31U, 33L).
  • the conductor foil 33U is to be laminated on the surface in the +Z direction of the insulating layer 13.
  • the above-mentioned conductor film with a carrier can be manufactured by pressing a conductor film (32U or 33L) to adhere onto the surface of a carrier member (31L or 31U).
  • the conductor film (32U or 33L) is attached to the carrier member by an adhesive, such as an adhesive that contains benzotriazole or benzotriazole derivative.
  • an adhesive such as an adhesive that contains benzotriazole or benzotriazole derivative.
  • VERZONE SF-310, manufactured by DAIWA KASEI K. K.
  • commercially available products may be appropriately selected and used.
  • Such commercially available products allow subsequent delamination of a carrier member from the conductor film.
  • the examples include Micro-thin (manufactured by Mitsui Mining and Smelting Co., Ltd.), XTR (manufactured by Olin Brass), and UTC-Foil (manufactured by METFOILS AB).
  • Prepreg is preferably used as the insulating layers 12 and 13.
  • prepreg with a thickness of between bout 25 ⁇ m and about 100 ⁇ m such as GHPL830 (manufactured by Mitsubishi Gas Chemical Company, Inc.), E679 (manufactured by Hitachi Chemical Co., Ltd.), and R1661 (manufactured by Matsushita Electric Works, Ltd.) and the like can preferably be used in terms of the required thickness of the final product.
  • those with a thickness of between about 25 ⁇ m and about 65 ⁇ m are more preferable.
  • the direction of the warp WA (and therefore the weft WE) of the prepreg is preferably arranged to obliquely intersects the direction of the bending axis AX (i.e., the Y direction).
  • the intersection angle ⁇ is not particularly limited. However, from the viewpoint of improvement in crack resistance at the time of bending, the angle ⁇ is preferably about 30° to about 60°. When the angle ⁇ is about 45°, it provides the greatest prevention effect on crack occurrence in insulating layers.
  • the conductor film with a carrier (31L, 32U) is laminated on the reinforcing layer 11 so that the surface in the -Z direction of the reinforcing layer 11 and the surface in the +Z direction of the conductor film with a carrier (31L, 32U) are brought into contact.
  • the insulating layer 12 is formed on the conductor film with a carrier (31L, 32U) so that the surface in the -Z direction of the conductor film with a carrier (31L, 32U) and the surface in the +Z direction of the insulating layer 12 are brought into contact.
  • the conductor film with a carrier (31 U, 33L) is laminated on the reinforcing layer 11 so that the surface in the +Z direction of the reinforcing layer 11 and the surface in the - Z direction of the conductor film with a carrier (31U, 33L) are brought into contact.
  • the insulating layer 13 is formed on the conductor film with a carrier (31U, 33L) so that the surface in the +Z direction of the conductor film with a carrier (31U, 33L) and the surface in the -Z direction of the insulating layer 13 are brought into contact.
  • the reinforcing layer 11 and the two insulating layers laminated as shown in Fig. 4(A) are pressed under predetermined conditions, for example, at about 185°C under a pressure of about 40 kg/m 2 for about an hour, to produce a laminated body (see Fig. 4(A) ).
  • a CO 2 laser process is performed to form a via hole 41 U.
  • the opening 41 U is formed so as to reach the surface in the +Z direction of the conductor layer 33L from the surface in the +Z direction of the insulating layer 13 (see Fig. 4(B) ).
  • a conductor layer 33U is formed on the insulating layer 13, and a black oxide forming is performed on a region of the conductor layer 33U at which the non-through via hole 41U is formed on the surface in the +Z direction of the conductor layer 33U. Subsequently, this region performed by the black oxide forming is irradiated with a laser beam having a predetermined energy from the above to form the opening 41U.
  • the remaining upper surface in the +Z direction of the conductor pattern 33U, the side surface of the opening 41U and the bottom surface of the opening 41U undergo metal plating so that a plated opening is formed and a conductor film 34U is formed.
  • the side surface of the opening 41L, and the bottom surface of the opening 41L undergo metal plating so that a plated opening is formed and a conductor film 34L is also formed (see Fig. 6(A) ).
  • the plating can be performed with a copper plating bath with a composition shown in Table 1 below.
  • Copper sulfate plating bath composition Plating bath Name of compound Quantity (g/L) Copper sulfate 125 to 250 Sulfuric acid 30 to 100
  • a resist layer 16U is formed on the entire surface of the conductor pattern 33U, which includes the plated via hole 41U' formed on the entire surface of a laminated body in the +Z direction.
  • a resist pattern 16L is formed on the entire surface of the conductor pattern 32L, which includes the plated via hole 41L' formed on the entire surface of a laminated body in the -Z direction.
  • an acrylic dry film resist such as HW440 (manufactured by Hitachi Chemical Co., Ltd.), was laminated on the whole surface of the conductor film 33U. Then, the resist is removed by a known lithography method from the regions of the conductor pattern 33U, where the conductor pattern is not formed in the +Z direction.
  • an acrylic dry film resist such as HW440 (manufactured by Hitachi Chemical Co., Ltd.), for example, can be used.
  • NIT1025 manufactured by Nippon Synthetic Chemical Industry Co., Ltd.
  • SA-50 manufactured by DuPont
  • the conductor pattern 32L undergoes a similar process with the conductor pattern 33U, then the resist is removed by a known lithography method from the regions of the conductor pattern 32L, where the conductor pattern is not formed in the -Z direction.
  • etching is performed until the surface in the +Z direction of the insulating layer 13 and the surface in the -Z direction of the insulating layer 12 are exposed (see Fig. 7(A) ).
  • a conductor pattern 34U' is formed on the surface in the Z direction of the insulating layer 13. Also, a plated non-through via hole 41 U' for electrically connecting the conductor pattern 34U to the conductor layer 33L is formed. Likewise, on the surface in the -Z direction of the insulating layer 12, a conductor pattern 34L' is formed, and a plated non-through via hole 41 L' for electrically connecting the conductor pattern 34L' to the conductor layer 32U is formed.
  • an insulating layer 17U is formed on the surface in the +Z direction of the insulating layer 13, and an insulating layer 17L is formed on the surface in the -Z direction of the insulating layer 12.
  • the insulating layers 17U and 17L may be formed by lamination pressing through pin lamination.
  • a material similar to that used for the insulating layers 12 and 13 can be used.
  • conductor layers 35U and 35L are formed on the surface in the +Z direction of the insulating layer 17U and on the surface in the -Z direction of the insulating layer 17L, respectively (see Fig. 7(B) ).
  • the conductor layers 35U and 35L are formed by pressing the conductor film 35U and the conductor film 35L to adhere onto the surface in the +Z direction of the insulating layer 17U and the surface in the -Z direction of the insulating layer 17L, respectively
  • Copper foil and the like can be used as the conductor films 35U and 35L.
  • a conductor film with a carrier may be used to form a very thin layer of the conductor films 35U and 35L.
  • the conductor film with a carrier is laminated on the corresponding insulating layer, and thereafter the carrier member is pealed off to leave the thin conductor film on the insulating layer.
  • a conductor film with a carrier having a conductor film thickness of between about 3 ⁇ m and about 9 ⁇ m such as Micro-Thin (manufactured by Mitsui Mining and Smelting Co., Ltd.), XTR (manufactured by Olin Brass), UTC-Foil (manufactured by METFOILS AB) or the like.
  • a conductor film with a carrier having a conductor film thickness of about 5 ⁇ m is used.
  • an opening 42U is formed on the insulating layer 17U and an opening 42L is formed on the insulating layer 17L (see Fig. 8(A) ).
  • conductor films 36U and 36L are formed (see Fig. 8(B) ).
  • formation of a resist layer, and etching and removal of the resist layer are performed to form conductor pattern 36U' and 36L' (see Fig. 9 ).
  • an ink is printed and hardened to form a coverlay layer 20U having openings 43U 1 to 43U N in a manner similar to the photolithography method.
  • the cover layer 20L having openings 43L I to 43L N is formed.
  • polyimide resin such as CKSE (manufactured by NIKKAN INDUSTRIES Co., Ltd.), for example, can be used to form the coverlay layers 20U and 20L.
  • CKSE manufactured by NIKKAN INDUSTRIES Co., Ltd.
  • a resist film may be laminated to form the coverlay layers.
  • laminated bodies 10U and 10L are formed on the respective surfaces of the reinforcing layer 11 (see Fig. 10 ).
  • the laminated body 10U includes the conductor layer 33L, the insulating layer 13, the insulating layer 17U and the coverlay layer 20U.
  • the insulating layers 13 and 17U are respectively provided with non-through via holes for inter-layer connection. Then, the via holes are through on the surface in the -Z direction of respective insulating layer.
  • the laminated body 10L includes the conductor layer 32U, the insulating layer 12, the insulating layer 17L and the coverlay layer 20L.
  • the insulating layers 12 and 17L are respectively provided with via holes for inter-layer connection. Then, the via holes are through on the surface in the +Z direction of respective insulating layer.
  • the laminated body 10U is processed in the same or similar manner.
  • the laminated body 10U formed on the surface in the +Z direction of the reinforcing layer 11 is separated from the reinforcing layer 11 at the interface between the carrier member 31 U and the conductor layer 33L (see Fig. 11(A) ).
  • nickel plating is carried out on the surface in the +Z direction of the laminated body 10U that are not covered by the coverlay layer 20U.
  • the nickel plating can be conducted with a plating bath shown in Table 2 under the following conditions: pH between 4 and 5, liquid temperature of between 40°C and 60°C and current density of approximately between 2 and 6 A/dm
  • Nickel electrolytic plating bath composition Plating bath Name of compound Quantity (g/L) Nickel sulfate Approximately 300 Nickel chloride Approximately 50 Boric acid Approximately 40
  • gold plating can be performed on the portion that has undergone nickel plating using a plating bath with a composition shown in Table 3 under the following conditions: liquid temperature of between 20 and 25°C and current density of between 0.2 and 1.0 A/dm 2 . Note that, in Fig. 11(A) , the two plated layers are illustrated as one layer.
  • Au electrolytic plating bath composition Plating bath Name of compound Quantity (g/L) Gold 10 Sodium cyanide 30 to 35 Ammonia 50 to 60
  • an ink is printed and hardened on the conductor layer 33L provided on the surface in the -Z direction of the laminated body 10U to form a resist layer 21L in a matter similar to the photolithography method.
  • AUS series manufactured by TAIYO INK MFG. CO., LTD.
  • DSR series manufactured by TAMURA Corporation
  • the resist layer 21L can be formed only in the element mounting part where circuit elements will be mounted on the surface in the -Z direction of the conductor layer 33L. Alternatively, it may be formed on the entire surface except the bending part.
  • pads 44U 1 to 44U N are formed (see Fig. 12 ).
  • the uncovered portion of conductor layer 33L is etched to expose the surface in the -Z direction of the insulating layer 13. Then, the resist layer 21L is removed by making it come up using NaOH, thereby the conductor pattern 33L is exposed.
  • the resist layer 22L is formed to cover the surface in the -Z direction of the insulating layer 13 and the surface in the -Z direction of the conductor layer 33L N . Then, by using the lithography method mentioned above, the openings 43L I to 43L N are formed.
  • pads 45U I and 45U N are formed at the openings 43L I . to 43L N , thereby completing a coreless thin type flexible printed wiring board 10.
  • the manufacturing process of the flexible printed wiring board 10 described above provides an excellent yield.
  • the conductor layer 33L which corresponds to an inner layer of a conductor layer laminated at the reinforcing layer 11 on the start of manufacturing, is used as the plating lead for plating, and this conductor layer 33L is processed after plating to form a conductor pattern. Therefore, the step of providing a plating lead and the step of pealing it off, which are required in the conventional art, is no longer required. This expedites the production of flexible printed wiring boards.
  • the laminated body 10L formed on the surface in the -Z direction of the reinforcing layer 11 undergoes the same process as the above-described process for the laminated body 10U so that a flexible printed wiring board having the same structure as the laminated body 10U is manufactured.
  • the ground pattern included in the conductor pattern 34U' in the bending part 70 is formed as a planar pattern.
  • a power source pattern that imparts a ground potential in terms of alternating current may be formed in a similar planar pattern.
  • signal lines by the outer layer conductor pattern 36U' can be formed to constitute a microstrip configuration in the bending part 70. Therefore, the characteristic impedance can be further stabilized.
  • nickel plating and subsequent gold plating were employed.
  • a different combination of the same or different metal materials may be used in the plating.
  • the equal length wiring was realized by providing element mounting parts 60A and 60B on the one side.
  • the other side of the flexible printed wiring board 10 may be provided with the circuit pattern 33L and the resist layer 22 to implement equal length wiring.
  • the flexible printed wiring board of the present embodiment is useful as a thin type flexible printed wiring board.
  • the flexible printed wiring board of the present embodiment has a stable in-line impedance when high-speed multi-pin logic LSIs and the like are mounted thereon and has excellent crack resistance.
  • the method of manufacturing a flexible printed wiring board of the present embodiment is suitable for manufacturing a thin type flexible printed wiring board with an excellent yield.
  • the flexible printed wiring board 10 manufactured as described above is bent (folded over) along the bending axis AX after electronic circuit chips, such as the memory elements 100A and 100B, are mounted onto the element mounting parts 60A and 60B, respectively. Then, the surface in the -X direction of the memory element 100B is affixed to the surface in the -Z direction of the flexible printed wiring board 10 with an adhesive. Subsequently, as shown in FIG. 1B , the motherboard MB and the motherboard connecting part 80 are electrically connected so that the flexible printed wiring board with the circuit chips is mounted on electronic information apparatus.
  • R1661 manufactured by Matsushita Electric Works, Ltd.
  • a carrier 31L, 32U
  • the conductor film with a carrier 31 U, 33L
  • Micro-thin manufactured by Mitsui Mining and Smelting Co., Ltd.
  • XTR manufactured by Olin Brass
  • UTC-Foil manufactured by METFOILS AB
  • GHPL830 manufactured by Mitsubishi Gas Chemical Company, Inc.
  • E679 manufactured by Hitachi Chemical Co., Ltd.
  • R1661 manufactured by Matsushita Electric Works, Ltd.
  • the thickness of the prepreg ranged from about 25 ⁇ m to about 65 ⁇ m
  • the prepregs used as the insulating layers 12 and 13 were arranged so that the direction of the fabric of the warp WA (and therefore the weft WE) of the prepreg obliquely intersects a line extending in the X direction to form an angle ranging between 30° and 60°, depending on Working Examples.
  • the reinforcing layer 11 and the insulating layers 12 and 13 were laminated as shown in Fig. 4A and were pressed under a pressure of about 40 kg/m 2 at about 185°C for about one hour to form a laminated body.
  • the black oxide forming is performed on portions at which the non-through via holes 41 U' should be formed and irradiated with a CO 2 laser beam to form the openings 41U and 41L, respectively.
  • the remaining surface of the conductor pattern 33U and the interior of the opening 41U as well as the remaining surface of the conductor pattern 32L and the interior of the opening 41L underwent metal plating with a plating bath using the composition shown in Table 4 below to form the conductor films 34U and 34L.
  • Copper Sulfate Plating Bath Composition Plating bath Name of compound Quantity (g/L) Copper sulfate 125 to 250 Sulfuric acid 30 to 100
  • an acrylic dry film resist for example HW440 (manufactured by Hitachi Chemical Co., Ltd.), was laminated on the whole surface of conductor film 34U, and the resist is removed by a known lithography method from regions on the surface in the +Z direction of the conductor pattern 34 where a conductor pattern is not formed.
  • the resist is removed from regions on the surface in the -Z direction of the conductor pattern where a conductor pattern is not formed.
  • etching was performed until the surface in the +Z direction of the insulating layer 13 and the surface in the -Z direction of the insulating layer 12 were exposed.
  • a conductor pattern was formed on the surface in the +Z direction of the insulating layer 13, and a plated non-through via hole 41U' for electrically connecting the conductor pattern 34U to the conductor layer 33L was formed.
  • a conductor pattern was formed, and a plated non-through via hole 41L' for electrically connecting the conductor pattern 34L to the conductor layer 32U was formed.
  • an insulating layer 17U was formed on the surface in the +Z direction of the insulating layer 13, and an insulating layer 17L was formed on the surface in the -Z direction of the insulating layer 12.
  • Micro-Thin with thickness of approximately 5 ⁇ m, manufactured by Mitsui Mining and Smelting Co., Ltd.
  • an opening 42U was formed in the insulating layer 17U and an opening 42L was formed in the insulating layer 17L.
  • a plating process similar to the process mentioned above for forming the conductor layers 34U and 34L conductor films 36U were formed.
  • forming of resist layer, etching and removal of resist layer from the conductor pattern was performed.
  • an ink is printed and hardened to form a coverlay layer 20U having openings 43U, to 43U N in a manner similar to the photolithography method.
  • the cover layer 20L having openings 43L, to 43L N is formed on the opposite side.
  • laminated bodies 10U and 10L were formed on the respective surfaces of the reinforcing layer 11.
  • the laminated body 10U formed on the surface in the +Z direction of the reinforcing layer 11 was separated from the reinforcing layer 11 at the interface between the carrier member 31U and the conductor layer 33L.
  • nickel plating was carried out on the whole surface of the portions that were not covered by the coverlay layer using a plating bath with the composition shown in Table 5 under the following conditions: pH 4 to 5, liquid temperature of 40 to 60°C and current density of approximately 2 to 6 A/dm 2 .
  • Nickel Electrolytic Plating Bath Composition Plating bath Name of compound Quantity (g/L) Nickel sulfate Approximately 300 Nickel chloride Approximately 50 Boric acid Approximately 40
  • a resist layer 21 L was formed on the conductor layer 33L provided on the surface in the -Z direction of the laminated body 10U using AUS series (manufactured by TAIYO INK MFG. CO., LTD.).
  • AUS series manufactured by TAIYO INK MFG. CO., LTD.
  • DSR series manufactured by TAMURA Corporation
  • the resist layer 22 is formed only in the element mounting part 60A where circuit elements is mounted on the surface in the -Z direction of the conductor layer 33L.
  • soldering paste onto the openings 43U I to 43U N by screen printing and by solder reflowing, pads 44U I to 44U N were formed.
  • the solder ball direct formation method may be used to form the pads.
  • etching was performed to expose the surface in the -Z direction of the insulating layer 13 and the resist layer 21L was removed by making it come up using NaOH of 20 to 40 g/L, thereby conductor pattern 33L is exposed on the insulating layer 13.
  • a coverlay layer 22 was formed so as to cover the surface in the -Z direction of the exposed insulating layer 13 and the surface in the -Z direction of the conductor layer 33L, and openings 43L 1 to 43L N were formed by the lithography method (see Fig. 13(B) ).
  • pads 45U 1 and 45U N were formed inside the openings 43L I to 43L N , thereby working examples of a coreless thin type flexible printed wiring board 10.
  • the flexible printed wiring boards of comparative examples 1 to 5 were manufactured in the same way as that of the flexible printed wiring boards of working Examples 1 to 10, except that the number of the insulating layer in the bending part was three, the angle ⁇ of the warp and the weft of the glass fiber in the insulating layers relative to the bending axis was set to 0° and 45°, and then, bending tests and continuity tests were carried out. The result of these tests is shown in Table 8.
  • the flexible printed wiring boards of reference examples 1 and 2 were manufactured in the same way as in the manufacture of the flexible printed wiring boards of working examples 1 to 10 except that the number of the insulating layer in the bending part was two, the angle ⁇ of the warp and the weft of the glass fiber in the insulating layers 17L and 13 relative to the bending axis was set to 25° and 65°, respectively, and that the bending angle ⁇ of the conductor pattern was set to 0°, and then bending tests and continuity tests were carried out.
  • the flexible printed wiring boards of reference examples 3 and 4 were manufactured in the same way as in the manufacture of the flexible printed wiring boards of working examples 1 to 10 except that the number of the insulating layer in the bending part was two, the thickness of the insulating layers was set to 100 ⁇ m, the angle ⁇ of the warp and the weft of the glass fiber in the insulating layers relative to the bending axis was set to 45°, and that the bending angle ⁇ of the conductor pattern was set to 0°. These parameters and the results of the bending and continuity tests are listed in Table 7.
  • Table 8 Classification Conductor layer counts Conductor layer Insulating layer Angle of glass fiber ( ⁇ ) Bending angle of pattern ( ⁇ ) lmpedance* Status of crack occurrence at the time of bending Continuity test lmplementation surface Bending part Width ( ⁇ m) Thickness ( ⁇ m) Thickness ( ⁇ m) Number of cycles Insulating layer Conductor layer 50 100 Comp. Ex. 1 3 3 50 20 40 0 0 50 Occurred Occurred NG - Comp. Ex. 2 3 3 50 20 40 15 0 50 Occurred Occurred NG - Comp. Ex. 3 3 3 50 20 40 45 0 50 None Occurred NG - Comp. Ex.
  • thin-type flexible printed wiring boards of working examples 1 to 10 excelled in crack resistance.
  • the flexible printed wiring board of the present invention is useful as a thin-type flexible printed wiring board and is particularly suitable for miniaturizing high-speed and large-capacity memories and the like.
  • the method of manufacturing the flexible printed wiring board of the present invention is suitable for manufacturing thin-type flexible printed wiring boards that have superior crack resistance and has an excellent yield.

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Structure Of Printed Boards (AREA)
EP05785562A 2004-09-21 2005-09-21 Flexible printed wiring board Not-in-force EP1793656B1 (en)

Applications Claiming Priority (2)

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JP2004273669 2004-09-21
PCT/JP2005/017374 WO2006033346A2 (ja) 2004-09-21 2005-09-21 フレキシブルプリント配線板

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JPWO2006033346A1 (ja) 2008-05-15
US7786389B2 (en) 2010-08-31
TW200638811A (en) 2006-11-01
EP1793656A2 (en) 2007-06-06
CN101023716A (zh) 2007-08-22
US20080115963A1 (en) 2008-05-22
US20060068613A1 (en) 2006-03-30
US7312401B2 (en) 2007-12-25
WO2006033346A2 (ja) 2006-03-30
EP1793656A4 (en) 2007-11-07
JP5006649B2 (ja) 2012-08-22
WO2006033346A3 (ja) 2006-05-11
TWI304712B (ja) 2008-12-21

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