DE69815770D1 - PLL-Schaltkreis mit maskiertem Phasenfehler-Signal - Google Patents
PLL-Schaltkreis mit maskiertem Phasenfehler-SignalInfo
- Publication number
- DE69815770D1 DE69815770D1 DE69815770T DE69815770T DE69815770D1 DE 69815770 D1 DE69815770 D1 DE 69815770D1 DE 69815770 T DE69815770 T DE 69815770T DE 69815770 T DE69815770 T DE 69815770T DE 69815770 D1 DE69815770 D1 DE 69815770D1
- Authority
- DE
- Germany
- Prior art keywords
- error signal
- phase error
- pll circuit
- masked phase
- masked
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/20—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits characterised by logic function, e.g. AND, OR, NOR, NOT circuits
- H03K19/21—EXCLUSIVE-OR circuits, i.e. giving output if input signal exists at only one input; COINCIDENCE circuits, i.e. giving output only if all input signals are identical
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/081—Details of the phase-locked loop provided with an additional controlled phase shifter
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/085—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal
- H03L7/089—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses
- H03L7/0891—Details of the phase-locked loop concerning mainly the frequency- or phase-detection arrangement including the filtering or amplification of its output signal the phase or frequency detector generating up-down pulses the up-down pulses controlling source and sink current generators, e.g. a charge pump
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
- H03L7/00—Automatic control of frequency or phase; Synchronisation
- H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
- H03L7/08—Details of the phase-locked loop
- H03L7/14—Details of the phase-locked loop for assuring constant frequency when supply or correction voltages fail or are interrupted
Landscapes
- Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
- Signal Processing For Digital Recording And Reproducing (AREA)
Applications Claiming Priority (2)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP23140697A JP3179382B2 (ja) | 1997-08-27 | 1997-08-27 | Pll回路 |
JP23140697 | 1997-08-27 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69815770D1 true DE69815770D1 (de) | 2003-07-31 |
DE69815770T2 DE69815770T2 (de) | 2004-08-05 |
Family
ID=16923112
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69815770T Expired - Fee Related DE69815770T2 (de) | 1997-08-27 | 1998-08-25 | PLL-Schaltkreis mit maskiertem Phasenfehler-Signal |
Country Status (7)
Country | Link |
---|---|
US (1) | US6154071A (de) |
EP (1) | EP0899883B1 (de) |
JP (1) | JP3179382B2 (de) |
KR (1) | KR100324189B1 (de) |
CN (1) | CN1212522A (de) |
DE (1) | DE69815770T2 (de) |
TW (1) | TW421921B (de) |
Families Citing this family (31)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6356610B1 (en) * | 1998-06-23 | 2002-03-12 | Vlsi Technology, Inc. | System to avoid unstable data transfer between digital systems |
KR100318842B1 (ko) * | 1998-11-26 | 2002-04-22 | 윤종용 | 디지털위상제어루프에서의주파수검출방법 |
JP3279274B2 (ja) * | 1998-12-28 | 2002-04-30 | 日本電気株式会社 | 半導体装置 |
US6606364B1 (en) * | 1999-03-04 | 2003-08-12 | Harris Corporation | Multiple data rate bit synchronizer having phase/frequency detector gain constant proportional to PLL clock divider ratio |
FR2793091B1 (fr) | 1999-04-30 | 2001-06-08 | France Telecom | Dispositif d'asservissement de frequence |
JP3998861B2 (ja) * | 1999-06-16 | 2007-10-31 | 株式会社小松製作所 | 排気還流装置およびその制御方法 |
JP3324647B2 (ja) | 1999-08-23 | 2002-09-17 | 日本電気株式会社 | 水平同期信号に対する位相同期ループ回路 |
JP2001127627A (ja) * | 1999-10-27 | 2001-05-11 | Nec Miyagi Ltd | Pll回路 |
JP4288178B2 (ja) * | 2002-02-01 | 2009-07-01 | エヌエックスピー ビー ヴィ | 低減されたクロックジッタを備える位相ロックループ |
US6781469B2 (en) * | 2002-09-13 | 2004-08-24 | Mediatek Incorporation | Phase-locked loop having phase detector error signal reshaping and method thereof |
JP3738390B2 (ja) * | 2002-09-30 | 2006-01-25 | 富士通株式会社 | ディジタル位相同期回路 |
US7269217B2 (en) * | 2002-10-04 | 2007-09-11 | Intersil Americas Inc. | PWM controller with integrated PLL |
US6853252B2 (en) | 2002-10-04 | 2005-02-08 | Intersil Corporation | Phase-lock loop having programmable bandwidth |
JP2005182850A (ja) * | 2003-12-16 | 2005-07-07 | Hitachi Ltd | Pll回路及びそれを用いた光ディスク装置 |
US6998890B2 (en) | 2004-01-14 | 2006-02-14 | Intersil Americas Inc. | Programmable bandwidth and frequency slewing for phase-lock loop |
JP4050303B2 (ja) * | 2004-05-17 | 2008-02-20 | 三菱電機株式会社 | フェイズ・ロックド・ループ(pll)回路及びその位相同期方法及びその動作解析方法 |
JP2006050778A (ja) * | 2004-08-04 | 2006-02-16 | Sanyo Electric Co Ltd | チャージポンプ回路 |
JP4587030B2 (ja) * | 2004-09-13 | 2010-11-24 | ソニー株式会社 | 信号処理装置、信号処理方法及び信号処理プログラム |
JP2007189404A (ja) | 2006-01-12 | 2007-07-26 | Toshiba Corp | 半導体装置 |
KR100873008B1 (ko) * | 2007-06-27 | 2008-12-10 | 한국표준과학연구원 | 원자시계의 주파수 오프셋 측정장치 및 제어방법 |
US7659783B2 (en) * | 2007-07-16 | 2010-02-09 | Micrel, Inc. | System and method for phase-locked loop (PLL) for high-speed memory interface (HSMI) |
JP2009153027A (ja) * | 2007-12-21 | 2009-07-09 | Fujitsu Ltd | 伝送装置および位相同期基準周波数信号切り替え方法 |
KR100910863B1 (ko) * | 2007-12-27 | 2009-08-06 | 주식회사 하이닉스반도체 | 차지 펌핑 회로와 이를 이용한 클럭 동기화 회로 |
TWI368398B (en) * | 2008-03-05 | 2012-07-11 | Tse Hsien Yeh | Phase lock loop apparatus |
US9008254B2 (en) * | 2013-08-30 | 2015-04-14 | Realtek Semiconductor Corp. | Method and apparatus for suppressing a deterministic clock jitter |
JP6264852B2 (ja) * | 2013-11-14 | 2018-01-24 | 株式会社ソシオネクスト | タイミング調整回路および半導体集積回路装置 |
US9537492B2 (en) | 2014-06-20 | 2017-01-03 | Analog Devices, Inc. | Sampled analog loop filter for phase locked loops |
US9397670B2 (en) * | 2014-07-02 | 2016-07-19 | Teradyne, Inc. | Edge generator-based phase locked loop reference clock generator for automated test system |
US10139449B2 (en) | 2016-01-26 | 2018-11-27 | Teradyne, Inc. | Automatic test system with focused test hardware |
CN111948629B (zh) * | 2020-07-31 | 2023-03-31 | 哈尔滨工程大学 | 一种高稳健性大多普勒单频脉冲信号检测方法 |
JP2022098601A (ja) * | 2020-12-22 | 2022-07-04 | ルネサスエレクトロニクス株式会社 | 位相同期回路 |
Family Cites Families (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US4200845A (en) * | 1978-12-22 | 1980-04-29 | Sperry Rand Corporation | Phase comparator with dual phase detectors |
JPS60244130A (ja) * | 1984-05-18 | 1985-12-04 | Hitachi Ltd | 識別位相検出方式 |
JPS63107231A (ja) * | 1986-10-24 | 1988-05-12 | Mitsubishi Electric Corp | デジタル・フエ−ズ・ロツク・ル−プ回路 |
JPH01180118A (ja) * | 1988-01-12 | 1989-07-18 | Mitsubishi Electric Corp | ディジタルpll回路 |
JPH04162263A (ja) * | 1990-10-26 | 1992-06-05 | Canon Inc | 情報再生装置 |
JPH0537370A (ja) * | 1991-07-03 | 1993-02-12 | Hitachi Ltd | 周波数シンセサイザ |
JPH06197101A (ja) * | 1992-12-25 | 1994-07-15 | Fujitsu Ltd | 従属同期網におけるクロック再生回路 |
JPH0799446A (ja) * | 1993-03-02 | 1995-04-11 | Mitsubishi Electric Corp | Pll回路 |
DE4432755A1 (de) * | 1994-04-04 | 1995-10-05 | Hitachi Ltd | Einstellbare Bildröhren-Anzeigevorrichtung und phasensynchrone Schaltung zur Verwendung in einer Anzeigevorrichtung |
JPH07302072A (ja) * | 1994-05-06 | 1995-11-14 | Hitachi Ltd | 耐ノイズ,高速引込形ディスプレイ用位相同期回路 |
JPH09154037A (ja) * | 1995-11-28 | 1997-06-10 | Sony Corp | デジタルpll及び同期分離回路 |
-
1997
- 1997-08-27 JP JP23140697A patent/JP3179382B2/ja not_active Expired - Fee Related
-
1998
- 1998-08-25 DE DE69815770T patent/DE69815770T2/de not_active Expired - Fee Related
- 1998-08-25 EP EP98116034A patent/EP0899883B1/de not_active Expired - Lifetime
- 1998-08-25 TW TW087114020A patent/TW421921B/zh not_active IP Right Cessation
- 1998-08-27 CN CN98117395A patent/CN1212522A/zh active Pending
- 1998-08-27 KR KR1019980034762A patent/KR100324189B1/ko not_active IP Right Cessation
- 1998-08-27 US US09/141,720 patent/US6154071A/en not_active Expired - Fee Related
Also Published As
Publication number | Publication date |
---|---|
JP3179382B2 (ja) | 2001-06-25 |
DE69815770T2 (de) | 2004-08-05 |
EP0899883B1 (de) | 2003-06-25 |
KR100324189B1 (ko) | 2002-06-22 |
EP0899883A1 (de) | 1999-03-03 |
US6154071A (en) | 2000-11-28 |
CN1212522A (zh) | 1999-03-31 |
KR19990023908A (ko) | 1999-03-25 |
TW421921B (en) | 2001-02-11 |
JPH1173739A (ja) | 1999-03-16 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
8332 | No legal effect for de | ||
8370 | Indication related to discontinuation of the patent is to be deleted | ||
8327 | Change in the person/name/address of the patent owner |
Owner name: NEC ELECTRONICS CORP., KAWASAKI, KANAGAWA, JP |
|
8339 | Ceased/non-payment of the annual fee |