DE69424759D1 - Gasphasenabscheidungsverfahren in einer einzigen Kammer für Dünnfilmtransistoren - Google Patents
Gasphasenabscheidungsverfahren in einer einzigen Kammer für DünnfilmtransistorenInfo
- Publication number
- DE69424759D1 DE69424759D1 DE69424759T DE69424759T DE69424759D1 DE 69424759 D1 DE69424759 D1 DE 69424759D1 DE 69424759 T DE69424759 T DE 69424759T DE 69424759 T DE69424759 T DE 69424759T DE 69424759 D1 DE69424759 D1 DE 69424759D1
- Authority
- DE
- Germany
- Prior art keywords
- thin film
- vapor deposition
- deposition process
- film transistors
- single chamber
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired - Fee Related
Links
- 239000010409 thin film Substances 0.000 title 1
- 238000005019 vapor deposition process Methods 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/66007—Multistep manufacturing processes
- H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
- H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
- H01L29/66409—Unipolar field-effect transistors
- H01L29/66477—Unipolar field-effect transistors with an insulated gate, i.e. MISFET
- H01L29/66742—Thin film unipolar transistors
- H01L29/6675—Amorphous silicon or polysilicon transistors
- H01L29/66765—Lateral single gate single channel transistors with inverted structure, i.e. the channel layer is formed after the gate
-
- C—CHEMISTRY; METALLURGY
- C23—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; CHEMICAL SURFACE TREATMENT; DIFFUSION TREATMENT OF METALLIC MATERIAL; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL; INHIBITING CORROSION OF METALLIC MATERIAL OR INCRUSTATION IN GENERAL
- C23C—COATING METALLIC MATERIAL; COATING MATERIAL WITH METALLIC MATERIAL; SURFACE TREATMENT OF METALLIC MATERIAL BY DIFFUSION INTO THE SURFACE, BY CHEMICAL CONVERSION OR SUBSTITUTION; COATING BY VACUUM EVAPORATION, BY SPUTTERING, BY ION IMPLANTATION OR BY CHEMICAL VAPOUR DEPOSITION, IN GENERAL
- C23C16/00—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes
- C23C16/44—Chemical coating by decomposition of gaseous compounds, without leaving reaction products of surface material in the coating, i.e. chemical vapour deposition [CVD] processes characterised by the method of coating
- C23C16/4401—Means for minimising impurities, e.g. dust, moisture or residual gas, in the reaction chamber
- C23C16/4404—Coatings or surface treatment on the inside of the reaction chamber or on parts thereof
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02367—Substrates
- H01L21/0237—Materials
- H01L21/02422—Non-crystalline insulating materials, e.g. glass, polymers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02441—Group 14 semiconducting materials
- H01L21/0245—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02439—Materials
- H01L21/02488—Insulating materials
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02436—Intermediate layers between substrates and deposited layers
- H01L21/02494—Structure
- H01L21/02496—Layer structure
- H01L21/02502—Layer structure consisting of two layers
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/02521—Materials
- H01L21/02524—Group 14 semiconducting materials
- H01L21/02532—Silicon, silicon germanium, germanium
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02576—N-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02518—Deposited layers
- H01L21/0257—Doping during depositing
- H01L21/02573—Conductivity type
- H01L21/02579—P-type
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/02104—Forming layers
- H01L21/02365—Forming inorganic semiconducting materials on a substrate
- H01L21/02612—Formation types
- H01L21/02617—Deposition types
- H01L21/0262—Reduction or decomposition of gaseous compounds, e.g. CVD
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
- Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y10S438/00—Semiconductor device manufacturing: process
- Y10S438/905—Cleaning of reaction chamber
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Chemical & Material Sciences (AREA)
- Materials Engineering (AREA)
- General Chemical & Material Sciences (AREA)
- Chemical Kinetics & Catalysis (AREA)
- Mechanical Engineering (AREA)
- Metallurgy (AREA)
- Organic Chemistry (AREA)
- Ceramic Engineering (AREA)
- Thin Film Transistor (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US17410393A | 1993-12-28 | 1993-12-28 |
Publications (2)
Publication Number | Publication Date |
---|---|
DE69424759D1 true DE69424759D1 (de) | 2000-07-06 |
DE69424759T2 DE69424759T2 (de) | 2001-02-08 |
Family
ID=22634830
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
DE69424759T Expired - Fee Related DE69424759T2 (de) | 1993-12-28 | 1994-11-22 | Gasphasenabscheidungsverfahren in einer einzigen Kammer für Dünnfilmtransistoren |
Country Status (4)
Country | Link |
---|---|
US (1) | US5589233A (de) |
EP (1) | EP0661731B1 (de) |
JP (3) | JP2918792B2 (de) |
DE (1) | DE69424759T2 (de) |
Families Citing this family (77)
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KR0171982B1 (ko) * | 1995-12-02 | 1999-03-30 | 김주용 | 반도체 소자의 필드 산화막 형성방법 |
DE19712233C2 (de) * | 1996-03-26 | 2003-12-11 | Lg Philips Lcd Co | Flüssigkristallanzeige und Herstellungsverfahren dafür |
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US20030143410A1 (en) * | 1997-03-24 | 2003-07-31 | Applied Materials, Inc. | Method for reduction of contaminants in amorphous-silicon film |
US5904542A (en) * | 1997-03-26 | 1999-05-18 | Advanced Micro Devices, Inc. | Performing a semiconductor fabrication sequence within a common chamber and without opening the chamber beginning with forming a field dielectric and concluding with a gate dielectric |
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US5266504A (en) * | 1992-03-26 | 1993-11-30 | International Business Machines Corporation | Low temperature emitter process for high performance bipolar devices |
JP3204735B2 (ja) * | 1992-06-01 | 2001-09-04 | 株式会社東芝 | 水素化アモルファスシリコン薄膜トランジスタの製造方法 |
US5281546A (en) * | 1992-09-02 | 1994-01-25 | General Electric Company | Method of fabricating a thin film transistor using hydrogen plasma treatment of the intrinsic silicon/doped layer interface |
JPH07169700A (ja) * | 1993-12-16 | 1995-07-04 | Sanyo Electric Co Ltd | 基板の処理装置 |
-
1994
- 1994-11-22 EP EP94118349A patent/EP0661731B1/de not_active Expired - Lifetime
- 1994-11-22 DE DE69424759T patent/DE69424759T2/de not_active Expired - Fee Related
- 1994-12-28 JP JP6327116A patent/JP2918792B2/ja not_active Expired - Lifetime
-
1995
- 1995-06-06 US US08/466,915 patent/US5589233A/en not_active Expired - Lifetime
-
1999
- 1999-01-27 JP JP11018760A patent/JPH11265855A/ja active Pending
-
2006
- 2006-11-06 JP JP2006300796A patent/JP2007134706A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPH11265855A (ja) | 1999-09-28 |
US5589233A (en) | 1996-12-31 |
EP0661731A3 (de) | 1995-11-15 |
DE69424759T2 (de) | 2001-02-08 |
JPH07326589A (ja) | 1995-12-12 |
JP2007134706A (ja) | 2007-05-31 |
EP0661731A2 (de) | 1995-07-05 |
JP2918792B2 (ja) | 1999-07-12 |
EP0661731B1 (de) | 2000-05-31 |
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