DE69130993T2 - Nichtflüchtige Halbleiterspeicheranordnung - Google Patents

Nichtflüchtige Halbleiterspeicheranordnung

Info

Publication number
DE69130993T2
DE69130993T2 DE69130993T DE69130993T DE69130993T2 DE 69130993 T2 DE69130993 T2 DE 69130993T2 DE 69130993 T DE69130993 T DE 69130993T DE 69130993 T DE69130993 T DE 69130993T DE 69130993 T2 DE69130993 T2 DE 69130993T2
Authority
DE
Germany
Prior art keywords
memory device
semiconductor memory
volatile semiconductor
volatile
semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69130993T
Other languages
English (en)
Other versions
DE69130993D1 (de
Inventor
Masamichi Asano
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Application granted granted Critical
Publication of DE69130993D1 publication Critical patent/DE69130993D1/de
Publication of DE69130993T2 publication Critical patent/DE69130993T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/56—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency
    • G11C11/5621—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using storage elements with more than two stable states represented by steps, e.g. of voltage, current, phase, frequency using charge storage in a floating gate
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/04—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS
    • G11C16/0408—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors
    • G11C16/0441—Erasable programmable read-only memories electrically programmable using variable threshold transistors, e.g. FAMOS comprising cells containing floating gate transistors comprising cells containing multiple floating gate devices, e.g. separate read-and-write FAMOS transistors with connected floating gates
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/34—Determination of programming status, e.g. threshold voltage, overprogramming or underprogramming, retention
    • G11C16/349—Arrangements for evaluating degradation, retention or wearout, e.g. by counting erase cycles
    • G11C16/3495—Circuits or methods to detect or delay wearout of nonvolatile EPROM or EEPROM memory devices, e.g. by counting numbers of erase or reprogram cycles, by using multiple memory areas serially or cyclically
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B69/00—Erasable-and-programmable ROM [EPROM] devices not provided for in groups H10B41/00 - H10B63/00, e.g. ultraviolet erasable-and-programmable ROM [UVEPROM] devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)
  • Read Only Memory (AREA)
DE69130993T 1990-06-22 1991-06-21 Nichtflüchtige Halbleiterspeicheranordnung Expired - Fee Related DE69130993T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP16467890A JP2685966B2 (ja) 1990-06-22 1990-06-22 不揮発性半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69130993D1 DE69130993D1 (de) 1999-04-22
DE69130993T2 true DE69130993T2 (de) 1999-07-29

Family

ID=15797767

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69130993T Expired - Fee Related DE69130993T2 (de) 1990-06-22 1991-06-21 Nichtflüchtige Halbleiterspeicheranordnung

Country Status (5)

Country Link
US (1) US5592001A (de)
EP (1) EP0463580B1 (de)
JP (1) JP2685966B2 (de)
KR (1) KR950010725B1 (de)
DE (1) DE69130993T2 (de)

Families Citing this family (33)

* Cited by examiner, † Cited by third party
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JP2596695B2 (ja) * 1993-05-07 1997-04-02 インターナショナル・ビジネス・マシーンズ・コーポレイション Ｅｅｐｒｏｍ
US5434815A (en) * 1994-01-19 1995-07-18 Atmel Corporation Stress reduction for non-volatile memory cell
JP3469362B2 (ja) * 1994-08-31 2003-11-25 株式会社東芝 半導体記憶装置
JP2980012B2 (ja) * 1995-10-16 1999-11-22 日本電気株式会社 不揮発性半導体記憶装置
US5966601A (en) * 1997-01-21 1999-10-12 Holtek Microelectronics Inc. Method of making non-volatile semiconductor memory arrays
JPH1187658A (ja) * 1997-09-05 1999-03-30 Mitsubishi Electric Corp メモリセルおよびそれを備える不揮発性半導体記憶装置
TW397982B (en) * 1997-09-18 2000-07-11 Sanyo Electric Co Nonvolatile semiconductor memory device
JPH1196776A (ja) * 1997-09-18 1999-04-09 Sanyo Electric Co Ltd 不揮発性半導体メモリ装置
US6055185A (en) 1998-04-01 2000-04-25 National Semiconductor Corporation Single-poly EPROM cell with CMOS compatible programming voltages
US6141246A (en) * 1998-04-01 2000-10-31 National Semiconductor Corporation Memory device with sense amplifier that sets the voltage drop across the cells of the device
US6118691A (en) * 1998-04-01 2000-09-12 National Semiconductor Corporation Memory cell with a Frohmann-Bentchkowsky EPROM memory transistor that reduces the voltage across an unprogrammed memory transistor during a read
US6081451A (en) * 1998-04-01 2000-06-27 National Semiconductor Corporation Memory device that utilizes single-poly EPROM cells with CMOS compatible programming voltages
US6157574A (en) * 1998-04-01 2000-12-05 National Semiconductor Corporation Erasable frohmann-bentchkowsky memory transistor that stores multiple bits of data
JP3999900B2 (ja) * 1998-09-10 2007-10-31 株式会社東芝 不揮発性半導体メモリ
TW445649B (en) * 1999-06-09 2001-07-11 Sanyo Electric Co Semiconductor memory and method for operating a semiconductor memory
DE19946883A1 (de) * 1999-09-30 2001-04-12 Micronas Gmbh Verfahren zur Herstellung eines integrierten CMOS-Halbleiterspeichers
JP4484344B2 (ja) * 2000-09-08 2010-06-16 ローム株式会社 不揮発性半導体記憶装置
EP1227496A1 (de) * 2001-01-17 2002-07-31 Cavendish Kinetics Limited Nichtflüchtiger speicher
JP4256222B2 (ja) * 2003-08-28 2009-04-22 株式会社東芝 不揮発性半導体記憶装置
JP2006048749A (ja) * 2004-07-30 2006-02-16 Seiko Epson Corp 不揮発性記憶装置及び不揮発性記憶装置のデータ書き込み方法
JP2007141286A (ja) * 2005-11-15 2007-06-07 Nec Electronics Corp 半導体集積回路装置及びその制御方法
JP2007266377A (ja) * 2006-03-29 2007-10-11 Fujitsu Ltd 半導体装置
US7626868B1 (en) * 2007-05-04 2009-12-01 Flashsilicon, Incorporation Level verification and adjustment for multi-level cell (MLC) non-volatile memory (NVM)
JP5417853B2 (ja) * 2009-01-15 2014-02-19 凸版印刷株式会社 不揮発性半導体メモリセル及び不揮発性半導体メモリ装置
JP5629968B2 (ja) * 2008-09-19 2014-11-26 凸版印刷株式会社 不揮発性半導体メモリセル及び不揮発性半導体メモリ装置
JP5572953B2 (ja) * 2009-01-15 2014-08-20 凸版印刷株式会社 不揮発性半導体メモリセル及び不揮発性半導体メモリ装置
JP2010231872A (ja) * 2009-03-30 2010-10-14 Toppan Printing Co Ltd 不揮発性半導体メモリ装置
JP5347649B2 (ja) * 2009-03-30 2013-11-20 凸版印刷株式会社 不揮発性半導体メモリ装置
JP5522296B2 (ja) * 2013-06-03 2014-06-18 凸版印刷株式会社 不揮発性半導体記憶装置
US9847133B2 (en) 2016-01-19 2017-12-19 Ememory Technology Inc. Memory array capable of performing byte erase operation
US10892266B2 (en) 2016-01-19 2021-01-12 Ememory Technology Inc. Nonvolatile memory structure and array
US10924112B2 (en) * 2019-04-11 2021-02-16 Ememory Technology Inc. Bandgap reference circuit
CN112086115B (zh) * 2019-06-14 2023-03-28 力旺电子股份有限公司 存储器系统

Family Cites Families (8)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6046554B2 (ja) * 1978-12-14 1985-10-16 株式会社東芝 半導体記憶素子及び記憶回路
JPH0715973B2 (ja) * 1984-11-29 1995-02-22 新技術事業団 半導体不揮発性メモリ
JP2607504B2 (ja) * 1987-02-20 1997-05-07 株式会社東芝 不揮発性半導体メモリ
IT1215380B (it) * 1987-03-12 1990-02-08 Sgs Microelettronica Spa Cella di memoria eprom a due semicelle simmetriche con gate flottante separata.
IT1214246B (it) * 1987-05-27 1990-01-10 Sgs Microelettronica Spa Dispositivo di memoria non volatile ad elevato numero di cicli di modifica.
JP2664685B2 (ja) * 1987-07-31 1997-10-15 株式会社東芝 半導体装置の製造方法
JPH01196794A (ja) * 1988-01-30 1989-08-08 Toshiba Corp 不揮発性半導体記憶装置
FR2635410B1 (fr) * 1988-08-11 1991-08-02 Sgs Thomson Microelectronics Memoire de type eprom a haute densite d'integration avec une organisation en damier et un facteur de couplage ameliore et procede de fabrication

Also Published As

Publication number Publication date
KR950010725B1 (ko) 1995-09-22
EP0463580A3 (en) 1993-06-09
JP2685966B2 (ja) 1997-12-08
EP0463580B1 (de) 1999-03-17
KR920001720A (ko) 1992-01-30
US5592001A (en) 1997-01-07
EP0463580A2 (de) 1992-01-02
JPH0457293A (ja) 1992-02-25
DE69130993D1 (de) 1999-04-22

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee