DE69033802D1 - Verfahren zur Herstellung eines Leitermusters einer integrierten Schaltungshalbleiteranordnung - Google Patents

Verfahren zur Herstellung eines Leitermusters einer integrierten Schaltungshalbleiteranordnung

Info

Publication number
DE69033802D1
DE69033802D1 DE69033802T DE69033802T DE69033802D1 DE 69033802 D1 DE69033802 D1 DE 69033802D1 DE 69033802 T DE69033802 T DE 69033802T DE 69033802 T DE69033802 T DE 69033802T DE 69033802 D1 DE69033802 D1 DE 69033802D1
Authority
DE
Germany
Prior art keywords
producing
integrated circuit
conductor pattern
semiconductor arrangement
circuit semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE69033802T
Other languages
English (en)
Other versions
DE69033802T2 (de
Inventor
Masahiro Abe
Yasukazu Mase
Tomie Yamamoto
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Publication of DE69033802D1 publication Critical patent/DE69033802D1/de
Application granted granted Critical
Publication of DE69033802T2 publication Critical patent/DE69033802T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/50—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor for integrated circuit devices, e.g. power bus, number of leads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/528—Geometry or layout of the interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
    • H01L23/482—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body
    • H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
    • H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
    • H01L23/5226—Via connections in a multilevel interconnection structure
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01005—Boron [B]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01006—Carbon [C]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01015—Phosphorus [P]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01033—Arsenic [As]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01074—Tungsten [W]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Manufacturing & Machinery (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Design And Manufacture Of Integrated Circuits (AREA)
  • Semiconductor Integrated Circuits (AREA)
DE69033802T 1989-11-10 1990-11-07 Verfahren zur Herstellung eines Leitermusters einer integrierten Schaltungshalbleiteranordnung Expired - Lifetime DE69033802T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1293490A JPH03154341A (ja) 1989-11-10 1989-11-10 半導体装置

Publications (2)

Publication Number Publication Date
DE69033802D1 true DE69033802D1 (de) 2001-10-25
DE69033802T2 DE69033802T2 (de) 2002-04-04

Family

ID=17795414

Family Applications (2)

Application Number Title Priority Date Filing Date
DE69034215T Expired - Lifetime DE69034215T2 (de) 1989-11-10 1990-11-07 Leitermuster einer integrierten Halbleiterschaltungsanordnung
DE69033802T Expired - Lifetime DE69033802T2 (de) 1989-11-10 1990-11-07 Verfahren zur Herstellung eines Leitermusters einer integrierten Schaltungshalbleiteranordnung

Family Applications Before (1)

Application Number Title Priority Date Filing Date
DE69034215T Expired - Lifetime DE69034215T2 (de) 1989-11-10 1990-11-07 Leitermuster einer integrierten Halbleiterschaltungsanordnung

Country Status (5)

Country Link
US (4) US5126819A (de)
EP (2) EP0702407B1 (de)
JP (1) JPH03154341A (de)
KR (1) KR930010077B1 (de)
DE (2) DE69034215T2 (de)

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3801331C2 (de) * 1988-01-19 1999-04-08 Gefinex Gmbh Zielscheibe zum Bogenschießen
JPH03154341A (ja) * 1989-11-10 1991-07-02 Toshiba Corp 半導体装置
EP0480580A3 (en) * 1990-09-10 1992-09-02 Canon Kabushiki Kaisha Electrode structure of semiconductor device and method for manufacturing the same
US5539156A (en) * 1994-11-16 1996-07-23 International Business Machines Corporation Non-annular lands
US5506450A (en) * 1995-05-04 1996-04-09 Motorola, Inc. Semiconductor device with improved electromigration resistance and method for making the same
KR100215847B1 (ko) * 1996-05-16 1999-08-16 구본준 반도체 장치의 금속 배선 및 그의 형성 방법
US6081035A (en) * 1996-10-24 2000-06-27 Tessera, Inc. Microelectronic bond ribbon design
DE19743264C2 (de) * 1997-09-30 2002-01-17 Infineon Technologies Ag Verfahren zur Herstellung einer Emulationsschaltkreisanordnung sowie Emulationsschaltkreisanordnung mit zwei integrierten Schaltkreisen
US6103623A (en) * 1998-10-05 2000-08-15 Vanguard International Semiconductor Corporation Method for fabricating a tungsten plug structure and an overlying interconnect metal structure without a tungsten etch back or CMP procedure
US7183653B2 (en) * 2003-12-17 2007-02-27 Intel Corporation Via including multiple electrical paths
US8089160B2 (en) * 2007-12-12 2012-01-03 International Business Machines Corporation IC interconnect for high current
JP5552261B2 (ja) * 2009-05-12 2014-07-16 パナソニック株式会社 半導体装置

Family Cites Families (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4196443A (en) * 1978-08-25 1980-04-01 Rca Corporation Buried contact configuration for CMOS/SOS integrated circuits
US4381215A (en) * 1980-05-27 1983-04-26 Burroughs Corporation Method of fabricating a misaligned, composite electrical contact on a semiconductor substrate
JPS57112027A (en) * 1980-12-29 1982-07-12 Fujitsu Ltd Manufacture of semiconductor device
JPS57201171A (en) * 1981-06-02 1982-12-09 Meinan Mach Works Inc Polishing device
JPS5914649A (ja) * 1982-07-16 1984-01-25 Nec Corp 半導体装置
JPS59169150A (ja) * 1983-03-16 1984-09-25 Hitachi Ltd 多層配線構造
JPS60208845A (ja) * 1984-04-02 1985-10-21 Oki Electric Ind Co Ltd 半導体装置の配線形成法
JPS59188149A (ja) * 1984-04-02 1984-10-25 Hitachi Ltd 半導体装置
US4577212A (en) * 1984-06-29 1986-03-18 International Business Machines Corporation Structure for inhibiting forward bias beta degradation
JPS61131469A (ja) * 1984-11-29 1986-06-19 Fujitsu Ltd 半導体装置の製造方法
JPS61194848A (ja) * 1985-02-25 1986-08-29 Hitachi Ltd 半導体装置
JPS60242643A (ja) * 1985-03-22 1985-12-02 Hitachi Ltd 電子部品の配線
JPS6378554A (ja) * 1986-09-20 1988-04-08 Mitsubishi Electric Corp 半導体装置
US4812419A (en) * 1987-04-30 1989-03-14 Hewlett-Packard Company Via connection with thin resistivity layer
JPS63292672A (ja) * 1987-05-26 1988-11-29 Nec Corp 半導体装置
JPH01191195A (ja) * 1988-01-27 1989-08-01 Toshiba Corp 表示システム
JPH01191914A (ja) * 1988-01-27 1989-08-02 Toshiba Corp コンピュータシステム
JPH01305531A (ja) * 1988-06-03 1989-12-08 Nec Corp 改良されたボンディングパッドを有する半導体装置
JPH0277090A (ja) * 1988-09-13 1990-03-16 Toshiba Corp 表示構成設定方式
JPH0379059A (ja) * 1989-08-22 1991-04-04 Hitachi Ltd 半導体集積回路装置およびその製造方法
JPH03154341A (ja) * 1989-11-10 1991-07-02 Toshiba Corp 半導体装置

Also Published As

Publication number Publication date
US5411916A (en) 1995-05-02
EP0427226A2 (de) 1991-05-15
USRE37059E1 (en) 2001-02-20
DE69034215T2 (de) 2006-09-21
DE69034215D1 (de) 2006-04-06
EP0702407A2 (de) 1996-03-20
JPH0578172B2 (de) 1993-10-28
EP0702407A3 (de) 1997-01-29
KR910010688A (ko) 1991-06-29
US5126819A (en) 1992-06-30
EP0427226B1 (de) 2001-09-19
EP0702407B1 (de) 2006-01-11
US5523627A (en) 1996-06-04
EP0427226A3 (en) 1991-08-21
DE69033802T2 (de) 2002-04-04
KR930010077B1 (ko) 1993-10-14
JPH03154341A (ja) 1991-07-02

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