DE69022312D1 - Halbleiterspeichergerät. - Google Patents

Halbleiterspeichergerät.

Info

Publication number
DE69022312D1
DE69022312D1 DE69022312T DE69022312T DE69022312D1 DE 69022312 D1 DE69022312 D1 DE 69022312D1 DE 69022312 T DE69022312 T DE 69022312T DE 69022312 T DE69022312 T DE 69022312T DE 69022312 D1 DE69022312 D1 DE 69022312D1
Authority
DE
Germany
Prior art keywords
storage device
semiconductor storage
semiconductor
storage
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Fee Related
Application number
DE69022312T
Other languages
English (en)
Other versions
DE69022312T2 (de
Inventor
Noriaki Suzuki
Junichi Miyamoto
Nobuaki Ohtsuka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Toshiba Electronic Device Solutions Corp
Original Assignee
Toshiba Corp
Toshiba Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Toshiba Microelectronics Corp filed Critical Toshiba Corp
Publication of DE69022312D1 publication Critical patent/DE69022312D1/de
Application granted granted Critical
Publication of DE69022312T2 publication Critical patent/DE69022312T2/de
Anticipated expiration legal-status Critical
Expired - Fee Related legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/78—Masking faults in memories by using spares or by reconfiguring using programmable devices
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C16/00—Erasable programmable read-only memories
    • G11C16/02—Erasable programmable read-only memories electrically programmable
    • G11C16/06—Auxiliary circuits, e.g. for writing into memory
    • G11C16/26—Sensing or reading circuits; Data output circuits
    • G11C16/28—Sensing or reading circuits; Data output circuits using differential sensing or reference cells, e.g. dummy cells
DE69022312T 1989-07-13 1990-07-13 Halbleiterspeichergerät. Expired - Fee Related DE69022312T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18140989A JPH0734314B2 (ja) 1989-07-13 1989-07-13 半導体記憶装置

Publications (2)

Publication Number Publication Date
DE69022312D1 true DE69022312D1 (de) 1995-10-19
DE69022312T2 DE69022312T2 (de) 1996-03-14

Family

ID=16100260

Family Applications (1)

Application Number Title Priority Date Filing Date
DE69022312T Expired - Fee Related DE69022312T2 (de) 1989-07-13 1990-07-13 Halbleiterspeichergerät.

Country Status (5)

Country Link
US (1) US5023839A (de)
EP (1) EP0408057B1 (de)
JP (1) JPH0734314B2 (de)
KR (1) KR930009539B1 (de)
DE (1) DE69022312T2 (de)

Families Citing this family (21)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03241598A (ja) * 1990-02-19 1991-10-28 Fujitsu Ltd シグネチャー回路
US5245574A (en) * 1991-12-23 1993-09-14 Intel Corporation Apparatus for increasing the speed of operation of non-volatile memory arrays
US5321660A (en) * 1992-05-06 1994-06-14 Waferscale Integration, Inc. Structure and method for compensating for programming threshold shift due to neighbor effect in an array
JP3212421B2 (ja) * 1993-09-20 2001-09-25 富士通株式会社 不揮発性半導体記憶装置
KR0172745B1 (ko) * 1995-12-29 1999-03-30 김주용 플래쉬 메모리 장치
US5602788A (en) * 1996-06-07 1997-02-11 International Business Machines Corporation Read only memory having localized reference bit lines
DE19944037C1 (de) 1999-09-14 2001-01-25 Infineon Technologies Ag Integrierter Speicher mit Speicherzellen und Referenzzellen
JP2001143487A (ja) * 1999-11-15 2001-05-25 Nec Corp 半導体記憶装置
EP1160795B1 (de) * 2000-05-31 2007-12-19 STMicroelectronics S.r.l. Referenzzellenmatrixanordnung zum Datenlesen in einer nichtflüchtigen Speicheranordnung
JP4212760B2 (ja) * 2000-06-02 2009-01-21 富士通マイクロエレクトロニクス株式会社 半導体記憶装置
US6950341B2 (en) * 2001-06-07 2005-09-27 Kabushiki Kaisha Toshiba Semiconductor memory device having plural sense amplifiers
US6717859B1 (en) * 2002-06-26 2004-04-06 Xilinx, Inc. Automatic program- and erase-voltage generation for EEPROM cells
JP2004164772A (ja) * 2002-11-14 2004-06-10 Matsushita Electric Ind Co Ltd 半導体記憶装置
JP3940730B2 (ja) * 2004-04-16 2007-07-04 株式会社東芝 半導体記憶装置
US7802156B2 (en) * 2006-05-31 2010-09-21 Lsi Corporation Identification circuit with repeatable output code
TWI316712B (en) * 2006-06-27 2009-11-01 Silicon Motion Inc Non-volatile memory, repair circuit, and repair method thereof
US7688102B2 (en) 2006-06-29 2010-03-30 Samsung Electronics Co., Ltd. Majority voter circuits and semiconductor devices including the same
KR100735758B1 (ko) * 2006-06-29 2007-07-06 삼성전자주식회사 다수 판정 회로, 데이터 버스 반전 회로 및 반도체 장치.
KR100827663B1 (ko) * 2006-12-20 2008-05-07 삼성전자주식회사 다수 판정 회로 및 반도체 장치.
KR100886353B1 (ko) * 2007-04-02 2009-03-03 삼성전자주식회사 이중 패터닝 기술을 사용한 반도체 메모리 장치 및 그레이아웃 방법
JP4464454B1 (ja) * 2008-11-27 2010-05-19 Ｎｅｃエレクトロニクス株式会社 半導体装置及び半導体装置におけるベリファイ方法

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE3043651A1 (de) * 1979-11-19 1981-08-27 Texas Instruments Inc., 75222 Dallas, Tex. Fehlertolerante halbleiterspeichervorrichtung und verfahren zur durchfuehrung eines zugriffs auf ersatzzellen in einer solchen vorrichtung
JPS58139399A (ja) * 1982-02-15 1983-08-18 Hitachi Ltd 半導体記憶装置
FR2600808A1 (fr) * 1986-06-26 1987-12-31 Dolphin Integration Sa Plan memoire a lecture rapide
JP2507529B2 (ja) * 1988-03-31 1996-06-12 株式会社東芝 不揮発性半導体記憶装置
US4885720A (en) * 1988-04-01 1989-12-05 International Business Machines Corporation Memory device and method implementing wordline redundancy without an access time penalty

Also Published As

Publication number Publication date
JPH0346196A (ja) 1991-02-27
US5023839A (en) 1991-06-11
DE69022312T2 (de) 1996-03-14
EP0408057B1 (de) 1995-09-13
EP0408057A2 (de) 1991-01-16
EP0408057A3 (en) 1992-07-15
KR910003674A (ko) 1991-02-28
KR930009539B1 (ko) 1993-10-06
JPH0734314B2 (ja) 1995-04-12

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Legal Events

Date Code Title Description
8364 No opposition during term of opposition
8339 Ceased/non-payment of the annual fee