DE68928482D1 - Verfahren zur Herstellung eines Bipolartransistors - Google Patents

Verfahren zur Herstellung eines Bipolartransistors

Info

Publication number
DE68928482D1
DE68928482D1 DE68928482T DE68928482T DE68928482D1 DE 68928482 D1 DE68928482 D1 DE 68928482D1 DE 68928482 T DE68928482 T DE 68928482T DE 68928482 T DE68928482 T DE 68928482T DE 68928482 D1 DE68928482 D1 DE 68928482D1
Authority
DE
Germany
Prior art keywords
manufacturing
bipolar transistor
bipolar
transistor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired - Lifetime
Application number
DE68928482T
Other languages
English (en)
Other versions
DE68928482T2 (de
Inventor
Takayuki C O Patents Divi Gomi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sony Corp
Original Assignee
Sony Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sony Corp filed Critical Sony Corp
Application granted granted Critical
Publication of DE68928482D1 publication Critical patent/DE68928482D1/de
Publication of DE68928482T2 publication Critical patent/DE68928482T2/de
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70—Bipolar devices
    • H01L29/72—Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234—Bipolar junction transistors [BJT]
    • H01L29/66272—Silicon vertical transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0804—Emitter regions of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/08—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/0821—Collector regions of bipolar transistors
    • H01L29/0826—Pedestal collectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/06—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions
    • H01L29/10—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by their shape; characterised by the shapes, relative sizes, or dispositions of the semiconductor regions ; characterised by the concentration or distribution of impurities within semiconductor regions with semiconductor regions connected to an electrode not carrying current to be rectified, amplified or switched and such electrode being part of a semiconductor device which comprises three or more electrodes
    • H01L29/1004—Base region of bipolar transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/02—Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/36—Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the concentration or distribution of impurities in the bulk material
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/157—Special diffusion and profiles
DE68928482T 1988-08-12 1989-08-08 Verfahren zur Herstellung eines Bipolartransistors Expired - Lifetime DE68928482T2 (de)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP63201360A JP2748420B2 (ja) 1988-08-12 1988-08-12 バイポーラトランジスタ及びその製造方法

Publications (2)

Publication Number Publication Date
DE68928482D1 true DE68928482D1 (de) 1998-01-22
DE68928482T2 DE68928482T2 (de) 1998-04-09

Family

ID=16439760

Family Applications (1)

Application Number Title Priority Date Filing Date
DE68928482T Expired - Lifetime DE68928482T2 (de) 1988-08-12 1989-08-08 Verfahren zur Herstellung eines Bipolartransistors

Country Status (5)

Country Link
US (1) US5010026A (de)
EP (1) EP0354765B1 (de)
JP (1) JP2748420B2 (de)
KR (1) KR0156544B1 (de)
DE (1) DE68928482T2 (de)

Families Citing this family (25)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5183768A (en) * 1989-04-04 1993-02-02 Matsushita Electric Industrial Co., Ltd. Method of fabricating semiconductor device by forming doped regions that limit width of the base
JPH03206621A (ja) * 1990-01-09 1991-09-10 Oki Electric Ind Co Ltd 半導体集積回路装置の製造方法
JP3127455B2 (ja) * 1990-08-31 2001-01-22 ソニー株式会社 半導体装置の製法
GB2248142A (en) * 1990-09-19 1992-03-25 Koninkl Philips Electronics Nv A method of manufacturing a semiconductor device
US5238872A (en) * 1990-12-11 1993-08-24 Samsung Semiconductor, Inc. Barrier metal contact architecture
JP2672199B2 (ja) * 1991-05-21 1997-11-05 シャープ株式会社 半導体装置の製造方法
JP3061891B2 (ja) * 1991-06-21 2000-07-10 キヤノン株式会社 半導体装置の製造方法
US5091321A (en) * 1991-07-22 1992-02-25 Allegro Microsystems, Inc. Method for making an NPN transistor with controlled base width compatible with making a Bi-MOS integrated circuit
JPH0529329A (ja) * 1991-07-24 1993-02-05 Canon Inc 半導体装置の製造方法
US5194926A (en) * 1991-10-03 1993-03-16 Motorola Inc. Semiconductor device having an inverse-T bipolar transistor
JP2855919B2 (ja) * 1991-10-24 1999-02-10 日本電気株式会社 半導体装置およびその製造方法
CA2124843A1 (en) * 1992-02-25 1993-09-02 James A. Matthews Bipolar junction transistor exhibiting suppressed kirk effect
US5302534A (en) * 1992-03-02 1994-04-12 Motorola, Inc. Forming a vertical PNP transistor
EP0608999B1 (de) * 1993-01-29 1997-03-26 National Semiconductor Corporation Bipolartransistoren und deren Herstellungsverfahren
US5380677A (en) * 1993-06-23 1995-01-10 Vlsi Technology, Inc. Method for reducing resistance at interface of single crystal silicon and deposited silicon
JPH07169771A (ja) * 1993-12-15 1995-07-04 Nec Corp 半導体装置及びその製造方法
US5620907A (en) * 1995-04-10 1997-04-15 Lucent Technologies Inc. Method for making a heterojunction bipolar transistor
JP2907323B2 (ja) * 1995-12-06 1999-06-21 日本電気株式会社 半導体装置およびその製造方法
FR2776828B1 (fr) * 1998-03-31 2003-01-03 Sgs Thomson Microelectronics Region de base-emetteur d'un transistor bipolaire submicronique
JP2000012553A (ja) * 1998-06-26 2000-01-14 Mitsubishi Electric Corp 半導体装置及びその製造方法
US6072223A (en) 1998-09-02 2000-06-06 Micron Technology, Inc. Circuit and method for a memory cell using reverse base current effect
JP2001274257A (ja) * 2000-03-27 2001-10-05 Mitsubishi Electric Corp 半導体装置およびその製造方法
IT1316871B1 (it) * 2000-03-31 2003-05-12 St Microelectronics Srl Dispositivo elettronico integrato monoliticamente e relativo processodi fabbricazione
US6995068B1 (en) * 2000-06-09 2006-02-07 Newport Fab, Llc Double-implant high performance varactor and method for manufacturing same
DE10205712A1 (de) * 2002-02-12 2003-08-28 Infineon Technologies Ag Polysilizium-Bipolartransistor und Verfahren zur Herstellung desselben

Family Cites Families (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4066473A (en) * 1976-07-15 1978-01-03 Fairchild Camera And Instrument Corporation Method of fabricating high-gain transistors
DE2728845A1 (de) * 1977-06-27 1979-01-18 Siemens Ag Verfahren zum herstellen eines hochfrequenztransistors
DE2946963A1 (de) * 1979-11-21 1981-06-04 Siemens AG, 1000 Berlin und 8000 München Schnelle bipolare transistoren
US4319932A (en) * 1980-03-24 1982-03-16 International Business Machines Corporation Method of making high performance bipolar transistor with polysilicon base contacts
US4495512A (en) * 1982-06-07 1985-01-22 International Business Machines Corporation Self-aligned bipolar transistor with inverted polycide base contact
US4693782A (en) * 1985-09-06 1987-09-15 Matsushita Electric Industrial Co., Ltd. Fabrication method of semiconductor device
US4887145A (en) * 1985-12-04 1989-12-12 Hitachi, Ltd. Semiconductor device in which electrodes are formed in a self-aligned manner
EP0255882A3 (de) * 1986-08-07 1990-05-30 Siemens Aktiengesellschaft npn-Bipolartransistor mit extrem flachen Emitter/Basis-Strukturen und Verfahren zu seiner Herstellung
JPS63261746A (ja) * 1987-04-20 1988-10-28 Oki Electric Ind Co Ltd バイポ−ラ型半導体集積回路装置の製造方法
JP2661050B2 (ja) * 1987-07-24 1997-10-08 ソニー株式会社 バイポーラトランジスタの製造方法
JPS6431461A (en) * 1987-07-28 1989-02-01 Sony Corp Manufacture of bipolar transistor
JP2625741B2 (ja) * 1987-07-28 1997-07-02 ソニー株式会社 バイポーラトランジスタの製造方法
US4851362A (en) * 1987-08-25 1989-07-25 Oki Electric Industry Co., Ltd. Method for manufacturing a semiconductor device
JP2623635B2 (ja) * 1988-02-16 1997-06-25 ソニー株式会社 バイポーラトランジスタ及びその製造方法

Also Published As

Publication number Publication date
EP0354765A2 (de) 1990-02-14
JP2748420B2 (ja) 1998-05-06
KR0156544B1 (ko) 1998-10-15
KR900004031A (ko) 1990-03-27
EP0354765B1 (de) 1997-12-10
DE68928482T2 (de) 1998-04-09
JPH0250435A (ja) 1990-02-20
EP0354765A3 (de) 1990-06-20
US5010026A (en) 1991-04-23

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